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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4declare i32 @llvm.abs.i32(i32, i1)5 6define i32 @pow2_multiplier(i32 %A) {7; CHECK-LABEL: @pow2_multiplier(8; CHECK-NEXT: [[B:%.*]] = shl i32 [[A:%.*]], 19; CHECK-NEXT: ret i32 [[B]]10;11 %B = mul i32 %A, 212 ret i32 %B13}14 15define <2 x i32> @pow2_multiplier_vec(<2 x i32> %A) {16; CHECK-LABEL: @pow2_multiplier_vec(17; CHECK-NEXT: [[B:%.*]] = shl <2 x i32> [[A:%.*]], splat (i32 3)18; CHECK-NEXT: ret <2 x i32> [[B]]19;20 %B = mul <2 x i32> %A, <i32 8, i32 8>21 ret <2 x i32> %B22}23 24define i8 @combine_shl(i8 %A) {25; CHECK-LABEL: @combine_shl(26; CHECK-NEXT: [[C:%.*]] = shl i8 [[A:%.*]], 627; CHECK-NEXT: ret i8 [[C]]28;29 %B = mul i8 %A, 830 %C = mul i8 %B, 831 ret i8 %C32}33 34define i32 @neg(i32 %i) {35; CHECK-LABEL: @neg(36; CHECK-NEXT: [[T:%.*]] = sub i32 0, [[I:%.*]]37; CHECK-NEXT: ret i32 [[T]]38;39 %t = mul i32 %i, -140 ret i32 %t41}42 43; Use the sign-bit as a mask:44; (zext (A < 0)) * B --> (A >> 31) & B45 46define i32 @test10(i32 %a, i32 %b) {47; CHECK-LABEL: @test10(48; CHECK-NEXT: [[ISNEG:%.*]] = icmp slt i32 [[A:%.*]], 049; CHECK-NEXT: [[E:%.*]] = select i1 [[ISNEG]], i32 [[B:%.*]], i32 050; CHECK-NEXT: ret i32 [[E]]51;52 %c = icmp slt i32 %a, 053 %d = zext i1 %c to i3254 %e = mul i32 %d, %b55 ret i32 %e56}57 58define i32 @test11(i32 %a, i32 %b) {59; CHECK-LABEL: @test11(60; CHECK-NEXT: [[ISNEG:%.*]] = icmp slt i32 [[A:%.*]], 061; CHECK-NEXT: [[E:%.*]] = select i1 [[ISNEG]], i32 [[B:%.*]], i32 062; CHECK-NEXT: ret i32 [[E]]63;64 %c = icmp sle i32 %a, -165 %d = zext i1 %c to i3266 %e = mul i32 %d, %b67 ret i32 %e68}69 70declare void @use32(i32)71 72define i32 @test12(i32 %a, i32 %b) {73; CHECK-LABEL: @test12(74; CHECK-NEXT: [[A_LOBIT:%.*]] = lshr i32 [[A:%.*]], 3175; CHECK-NEXT: [[ISNEG:%.*]] = icmp slt i32 [[A]], 076; CHECK-NEXT: [[E:%.*]] = select i1 [[ISNEG]], i32 [[B:%.*]], i32 077; CHECK-NEXT: call void @use32(i32 [[A_LOBIT]])78; CHECK-NEXT: ret i32 [[E]]79;80 %c = icmp ugt i32 %a, 214748364781 %d = zext i1 %c to i3282 %e = mul i32 %d, %b83 call void @use32(i32 %d)84 ret i32 %e85}86 87; rdar://729352788define i32 @test15(i32 %A, i32 %B) {89; CHECK-LABEL: @test15(90; CHECK-NEXT: [[M1:%.*]] = shl i32 [[A:%.*]], [[B:%.*]]91; CHECK-NEXT: ret i32 [[M1]]92;93 %shl = shl i32 1, %B94 %m = mul i32 %shl, %A95 ret i32 %m96}97 98; X * Y (when Y is a boolean) --> Y ? X : 099 100define i32 @mul_bool(i32 %x, i1 %y) {101; CHECK-LABEL: @mul_bool(102; CHECK-NEXT: [[M:%.*]] = select i1 [[Y:%.*]], i32 [[X:%.*]], i32 0103; CHECK-NEXT: ret i32 [[M]]104;105 %z = zext i1 %y to i32106 %m = mul i32 %x, %z107 ret i32 %m108}109 110; Commute and test vector type.111 112define <2 x i32> @mul_bool_vec(<2 x i32> %x, <2 x i1> %y) {113; CHECK-LABEL: @mul_bool_vec(114; CHECK-NEXT: [[M:%.*]] = select <2 x i1> [[Y:%.*]], <2 x i32> [[X:%.*]], <2 x i32> zeroinitializer115; CHECK-NEXT: ret <2 x i32> [[M]]116;117 %z = zext <2 x i1> %y to <2 x i32>118 %m = mul <2 x i32> %x, %z119 ret <2 x i32> %m120}121 122define <2 x i32> @mul_bool_vec_commute(<2 x i32> %x, <2 x i1> %y) {123; CHECK-LABEL: @mul_bool_vec_commute(124; CHECK-NEXT: [[M:%.*]] = select <2 x i1> [[Y:%.*]], <2 x i32> [[X:%.*]], <2 x i32> zeroinitializer125; CHECK-NEXT: ret <2 x i32> [[M]]126;127 %z = zext <2 x i1> %y to <2 x i32>128 %m = mul <2 x i32> %z, %x129 ret <2 x i32> %m130}131 132define <3 x i7> @mul_bools(<3 x i1> %x, <3 x i1> %y) {133; CHECK-LABEL: @mul_bools(134; CHECK-NEXT: [[MULBOOL:%.*]] = and <3 x i1> [[X:%.*]], [[Y:%.*]]135; CHECK-NEXT: [[R:%.*]] = zext <3 x i1> [[MULBOOL]] to <3 x i7>136; CHECK-NEXT: ret <3 x i7> [[R]]137;138 %zx = zext <3 x i1> %x to <3 x i7>139 %zy = zext <3 x i1> %y to <3 x i7>140 %r = mul <3 x i7> %zx, %zy141 ret <3 x i7> %r142}143 144define i32 @mul_bools_use1(i1 %x, i1 %y) {145; CHECK-LABEL: @mul_bools_use1(146; CHECK-NEXT: [[ZY:%.*]] = zext i1 [[Y:%.*]] to i32147; CHECK-NEXT: call void @use32(i32 [[ZY]])148; CHECK-NEXT: [[MULBOOL:%.*]] = and i1 [[X:%.*]], [[Y]]149; CHECK-NEXT: [[R:%.*]] = zext i1 [[MULBOOL]] to i32150; CHECK-NEXT: ret i32 [[R]]151;152 %zx = zext i1 %x to i32153 %zy = zext i1 %y to i32154 call void @use32(i32 %zy)155 %r = mul i32 %zx, %zy156 ret i32 %r157}158 159define i32 @mul_bools_use2(i1 %x, i1 %y) {160; CHECK-LABEL: @mul_bools_use2(161; CHECK-NEXT: [[ZY:%.*]] = zext i1 [[Y:%.*]] to i32162; CHECK-NEXT: call void @use32(i32 [[ZY]])163; CHECK-NEXT: [[MULBOOL:%.*]] = and i1 [[Y]], [[X:%.*]]164; CHECK-NEXT: [[R:%.*]] = zext i1 [[MULBOOL]] to i32165; CHECK-NEXT: ret i32 [[R]]166;167 %zx = zext i1 %x to i32168 %zy = zext i1 %y to i32169 call void @use32(i32 %zy)170 %r = mul i32 %zy, %zx171 ret i32 %r172}173 174define i32 @mul_bools_use3(i1 %x, i1 %y) {175; CHECK-LABEL: @mul_bools_use3(176; CHECK-NEXT: [[ZX:%.*]] = zext i1 [[X:%.*]] to i32177; CHECK-NEXT: call void @use32(i32 [[ZX]])178; CHECK-NEXT: [[ZY:%.*]] = zext i1 [[Y:%.*]] to i32179; CHECK-NEXT: call void @use32(i32 [[ZY]])180; CHECK-NEXT: [[R:%.*]] = select i1 [[X]], i32 [[ZY]], i32 0181; CHECK-NEXT: ret i32 [[R]]182;183 %zx = zext i1 %x to i32184 call void @use32(i32 %zx)185 %zy = zext i1 %y to i32186 call void @use32(i32 %zy)187 %r = mul i32 %zx, %zy188 ret i32 %r189}190 191define <3 x i32> @mul_bools_sext(<3 x i1> %x, <3 x i1> %y) {192; CHECK-LABEL: @mul_bools_sext(193; CHECK-NEXT: [[MULBOOL:%.*]] = and <3 x i1> [[X:%.*]], [[Y:%.*]]194; CHECK-NEXT: [[R:%.*]] = zext <3 x i1> [[MULBOOL]] to <3 x i32>195; CHECK-NEXT: ret <3 x i32> [[R]]196;197 %sx = sext <3 x i1> %x to <3 x i32>198 %sy = sext <3 x i1> %y to <3 x i32>199 %r = mul <3 x i32> %sx, %sy200 ret <3 x i32> %r201}202 203define i32 @mul_bools_sext_use1(i1 %x, i1 %y) {204; CHECK-LABEL: @mul_bools_sext_use1(205; CHECK-NEXT: [[SY:%.*]] = sext i1 [[Y:%.*]] to i32206; CHECK-NEXT: call void @use32(i32 [[SY]])207; CHECK-NEXT: [[MULBOOL:%.*]] = and i1 [[X:%.*]], [[Y]]208; CHECK-NEXT: [[R:%.*]] = zext i1 [[MULBOOL]] to i32209; CHECK-NEXT: ret i32 [[R]]210;211 %sx = sext i1 %x to i32212 %sy = sext i1 %y to i32213 call void @use32(i32 %sy)214 %r = mul i32 %sx, %sy215 ret i32 %r216}217 218define i32 @mul_bools_sext_use2(i1 %x, i1 %y) {219; CHECK-LABEL: @mul_bools_sext_use2(220; CHECK-NEXT: [[SY:%.*]] = sext i1 [[Y:%.*]] to i32221; CHECK-NEXT: call void @use32(i32 [[SY]])222; CHECK-NEXT: [[MULBOOL:%.*]] = and i1 [[Y]], [[X:%.*]]223; CHECK-NEXT: [[R:%.*]] = zext i1 [[MULBOOL]] to i32224; CHECK-NEXT: ret i32 [[R]]225;226 %sx = sext i1 %x to i32227 %sy = sext i1 %y to i32228 call void @use32(i32 %sy)229 %r = mul i32 %sy, %sx230 ret i32 %r231}232 233define i32 @mul_bools_sext_use3(i1 %x, i1 %y) {234; CHECK-LABEL: @mul_bools_sext_use3(235; CHECK-NEXT: [[SX:%.*]] = sext i1 [[X:%.*]] to i32236; CHECK-NEXT: call void @use32(i32 [[SX]])237; CHECK-NEXT: [[SY:%.*]] = sext i1 [[Y:%.*]] to i32238; CHECK-NEXT: call void @use32(i32 [[SY]])239; CHECK-NEXT: [[R:%.*]] = mul nsw i32 [[SY]], [[SX]]240; CHECK-NEXT: ret i32 [[R]]241;242 %sx = sext i1 %x to i32243 call void @use32(i32 %sx)244 %sy = sext i1 %y to i32245 call void @use32(i32 %sy)246 %r = mul i32 %sy, %sx247 ret i32 %r248}249 250define <3 x i32> @mul_bools_mixed_ext(<3 x i1> %x, <3 x i1> %y) {251; CHECK-LABEL: @mul_bools_mixed_ext(252; CHECK-NEXT: [[MULBOOL:%.*]] = and <3 x i1> [[X:%.*]], [[Y:%.*]]253; CHECK-NEXT: [[R:%.*]] = sext <3 x i1> [[MULBOOL]] to <3 x i32>254; CHECK-NEXT: ret <3 x i32> [[R]]255;256 %zx = zext <3 x i1> %x to <3 x i32>257 %sy = sext <3 x i1> %y to <3 x i32>258 %r = mul <3 x i32> %zx, %sy259 ret <3 x i32> %r260}261 262define i32 @mul_bools_mixed_ext_use1(i1 %x, i1 %y) {263; CHECK-LABEL: @mul_bools_mixed_ext_use1(264; CHECK-NEXT: [[ZY:%.*]] = zext i1 [[Y:%.*]] to i32265; CHECK-NEXT: call void @use32(i32 [[ZY]])266; CHECK-NEXT: [[MULBOOL:%.*]] = and i1 [[X:%.*]], [[Y]]267; CHECK-NEXT: [[R:%.*]] = sext i1 [[MULBOOL]] to i32268; CHECK-NEXT: ret i32 [[R]]269;270 %sx = sext i1 %x to i32271 %zy = zext i1 %y to i32272 call void @use32(i32 %zy)273 %r = mul i32 %sx, %zy274 ret i32 %r275}276 277define i32 @mul_bools_mixed_ext_use2(i1 %x, i1 %y) {278; CHECK-LABEL: @mul_bools_mixed_ext_use2(279; CHECK-NEXT: [[SY:%.*]] = sext i1 [[Y:%.*]] to i32280; CHECK-NEXT: call void @use32(i32 [[SY]])281; CHECK-NEXT: [[MULBOOL:%.*]] = and i1 [[Y]], [[X:%.*]]282; CHECK-NEXT: [[R:%.*]] = sext i1 [[MULBOOL]] to i32283; CHECK-NEXT: ret i32 [[R]]284;285 %zx = zext i1 %x to i32286 %sy = sext i1 %y to i32287 call void @use32(i32 %sy)288 %r = mul i32 %sy, %zx289 ret i32 %r290}291 292define i32 @mul_bools_mixed_ext_use3(i1 %x, i1 %y) {293; CHECK-LABEL: @mul_bools_mixed_ext_use3(294; CHECK-NEXT: [[SX:%.*]] = sext i1 [[X:%.*]] to i32295; CHECK-NEXT: call void @use32(i32 [[SX]])296; CHECK-NEXT: [[ZY:%.*]] = zext i1 [[Y:%.*]] to i32297; CHECK-NEXT: call void @use32(i32 [[ZY]])298; CHECK-NEXT: [[R:%.*]] = select i1 [[Y]], i32 [[SX]], i32 0299; CHECK-NEXT: ret i32 [[R]]300;301 %sx = sext i1 %x to i32302 call void @use32(i32 %sx)303 %zy = zext i1 %y to i32304 call void @use32(i32 %zy)305 %r = mul i32 %zy, %sx306 ret i32 %r307}308 309; (A >>u 31) * B --> (A >>s 31) & B310 311define i32 @signbit_mul(i32 %a, i32 %b) {312; CHECK-LABEL: @signbit_mul(313; CHECK-NEXT: [[ISNEG:%.*]] = icmp slt i32 [[A:%.*]], 0314; CHECK-NEXT: [[E:%.*]] = select i1 [[ISNEG]], i32 [[B:%.*]], i32 0315; CHECK-NEXT: ret i32 [[E]]316;317 %d = lshr i32 %a, 31318 %e = mul i32 %d, %b319 ret i32 %e320}321 322define i32 @signbit_mul_commute_extra_use(i32 %a, i32 %b) {323; CHECK-LABEL: @signbit_mul_commute_extra_use(324; CHECK-NEXT: [[D:%.*]] = lshr i32 [[A:%.*]], 31325; CHECK-NEXT: [[ISNEG:%.*]] = icmp slt i32 [[A]], 0326; CHECK-NEXT: [[E:%.*]] = select i1 [[ISNEG]], i32 [[B:%.*]], i32 0327; CHECK-NEXT: call void @use32(i32 [[D]])328; CHECK-NEXT: ret i32 [[E]]329;330 %d = lshr i32 %a, 31331 %e = mul i32 %b, %d332 call void @use32(i32 %d)333 ret i32 %e334}335 336; (A >>u 31)) * B --> (A >>s 31) & B337 338define <2 x i32> @signbit_mul_vec(<2 x i32> %a, <2 x i32> %b) {339; CHECK-LABEL: @signbit_mul_vec(340; CHECK-NEXT: [[ISNEG:%.*]] = icmp slt <2 x i32> [[A:%.*]], zeroinitializer341; CHECK-NEXT: [[E:%.*]] = select <2 x i1> [[ISNEG]], <2 x i32> [[B:%.*]], <2 x i32> zeroinitializer342; CHECK-NEXT: ret <2 x i32> [[E]]343;344 %d = lshr <2 x i32> %a, <i32 31, i32 31>345 %e = mul <2 x i32> %d, %b346 ret <2 x i32> %e347}348 349define <2 x i32> @signbit_mul_vec_commute(<2 x i32> %a, <2 x i32> %b) {350; CHECK-LABEL: @signbit_mul_vec_commute(351; CHECK-NEXT: [[ISNEG:%.*]] = icmp slt <2 x i32> [[A:%.*]], zeroinitializer352; CHECK-NEXT: [[E:%.*]] = select <2 x i1> [[ISNEG]], <2 x i32> [[B:%.*]], <2 x i32> zeroinitializer353; CHECK-NEXT: ret <2 x i32> [[E]]354;355 %d = lshr <2 x i32> %a, <i32 31, i32 31>356 %e = mul <2 x i32> %b, %d357 ret <2 x i32> %e358}359 360define i32 @test18(i32 %A, i32 %B) {361; CHECK-LABEL: @test18(362; CHECK-NEXT: ret i32 0363;364 %C = and i32 %A, 1365 %D = and i32 %B, 1366 %E = mul i32 %C, %D367 %F = and i32 %E, 16368 ret i32 %F369}370 371declare {i32, i1} @llvm.smul.with.overflow.i32(i32, i32)372declare void @use(i1)373 374define i32 @test19(i32 %A, i32 %B) {375; CHECK-LABEL: @test19(376; CHECK-NEXT: call void @use(i1 false)377; CHECK-NEXT: ret i32 0378;379 %C = and i32 %A, 1380 %D = and i32 %B, 1381 382; It would be nice if we also started proving that this doesn't overflow.383 %E = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %C, i32 %D)384 %F = extractvalue {i32, i1} %E, 0385 %G = extractvalue {i32, i1} %E, 1386 call void @use(i1 %G)387 %H = and i32 %F, 16388 ret i32 %H389}390 391define <2 x i64> @test20(<2 x i64> %A) {392; CHECK-LABEL: @test20(393; CHECK-NEXT: [[TMP1:%.*]] = mul <2 x i64> [[A:%.*]], <i64 3, i64 2>394; CHECK-NEXT: [[C:%.*]] = add <2 x i64> [[TMP1]], <i64 36, i64 28>395; CHECK-NEXT: ret <2 x i64> [[C]]396;397 %B = add <2 x i64> %A, <i64 12, i64 14>398 %C = mul <2 x i64> %B, <i64 3, i64 2>399 ret <2 x i64> %C400}401 402define <2 x i1> @test21(<2 x i1> %A, <2 x i1> %B) {403; CHECK-LABEL: @test21(404; CHECK-NEXT: [[C:%.*]] = and <2 x i1> [[A:%.*]], [[B:%.*]]405; CHECK-NEXT: ret <2 x i1> [[C]]406;407 %C = mul <2 x i1> %A, %B408 ret <2 x i1> %C409}410 411define i32 @test22(i32 %A) {412; CHECK-LABEL: @test22(413; CHECK-NEXT: [[B:%.*]] = sub nsw i32 0, [[A:%.*]]414; CHECK-NEXT: ret i32 [[B]]415;416 %B = mul nsw i32 %A, -1417 ret i32 %B418}419 420define i32 @test23(i32 %A) {421; CHECK-LABEL: @test23(422; CHECK-NEXT: [[C:%.*]] = mul nuw i32 [[A:%.*]], 6423; CHECK-NEXT: ret i32 [[C]]424;425 %B = shl nuw i32 %A, 1426 %C = mul nuw i32 %B, 3427 ret i32 %C428}429 430define i32 @test24(i32 %A) {431; CHECK-LABEL: @test24(432; CHECK-NEXT: [[C:%.*]] = mul nsw i32 [[A:%.*]], 6433; CHECK-NEXT: ret i32 [[C]]434;435 %B = shl nsw i32 %A, 1436 %C = mul nsw i32 %B, 3437 ret i32 %C438}439 440define i32 @neg_neg_mul(i32 %A, i32 %B) {441; CHECK-LABEL: @neg_neg_mul(442; CHECK-NEXT: [[E:%.*]] = mul i32 [[A:%.*]], [[B:%.*]]443; CHECK-NEXT: ret i32 [[E]]444;445 %C = sub i32 0, %A446 %D = sub i32 0, %B447 %E = mul i32 %C, %D448 ret i32 %E449}450 451define i32 @neg_neg_mul_nsw(i32 %A, i32 %B) {452; CHECK-LABEL: @neg_neg_mul_nsw(453; CHECK-NEXT: [[E:%.*]] = mul nsw i32 [[A:%.*]], [[B:%.*]]454; CHECK-NEXT: ret i32 [[E]]455;456 %C = sub nsw i32 0, %A457 %D = sub nsw i32 0, %B458 %E = mul nsw i32 %C, %D459 ret i32 %E460}461 462define i124 @neg_neg_mul_apint(i124 %A, i124 %B) {463; CHECK-LABEL: @neg_neg_mul_apint(464; CHECK-NEXT: [[E:%.*]] = mul i124 [[A:%.*]], [[B:%.*]]465; CHECK-NEXT: ret i124 [[E]]466;467 %C = sub i124 0, %A468 %D = sub i124 0, %B469 %E = mul i124 %C, %D470 ret i124 %E471}472 473define i32 @neg_mul_constant(i32 %A) {474; CHECK-LABEL: @neg_mul_constant(475; CHECK-NEXT: [[E:%.*]] = mul i32 [[A:%.*]], -7476; CHECK-NEXT: ret i32 [[E]]477;478 %C = sub i32 0, %A479 %E = mul i32 %C, 7480 ret i32 %E481}482 483define i55 @neg_mul_constant_apint(i55 %A) {484; CHECK-LABEL: @neg_mul_constant_apint(485; CHECK-NEXT: [[E:%.*]] = mul i55 [[A:%.*]], -7486; CHECK-NEXT: ret i55 [[E]]487;488 %C = sub i55 0, %A489 %E = mul i55 %C, 7490 ret i55 %E491}492 493define <3 x i8> @neg_mul_constant_vec(<3 x i8> %a) {494; CHECK-LABEL: @neg_mul_constant_vec(495; CHECK-NEXT: [[B:%.*]] = mul <3 x i8> [[A:%.*]], splat (i8 -5)496; CHECK-NEXT: ret <3 x i8> [[B]]497;498 %A = sub <3 x i8> zeroinitializer, %a499 %B = mul <3 x i8> %A, <i8 5, i8 5, i8 5>500 ret <3 x i8> %B501}502 503define <3 x i4> @neg_mul_constant_vec_weird(<3 x i4> %a) {504; CHECK-LABEL: @neg_mul_constant_vec_weird(505; CHECK-NEXT: [[B:%.*]] = mul <3 x i4> [[A:%.*]], splat (i4 -5)506; CHECK-NEXT: ret <3 x i4> [[B]]507;508 %A = sub <3 x i4> zeroinitializer, %a509 %B = mul <3 x i4> %A, <i4 5, i4 5, i4 5>510 ret <3 x i4> %B511}512 513define i32 @test26(i32 %A, i32 %B) {514; CHECK-LABEL: @test26(515; CHECK-NEXT: [[D1:%.*]] = shl nsw i32 [[A:%.*]], [[B:%.*]]516; CHECK-NEXT: ret i32 [[D1]]517;518 %C = shl nsw i32 1, %B519 %D = mul nsw i32 %A, %C520 ret i32 %D521}522 523define i32 @test27(i32 %A, i32 %B) {524; CHECK-LABEL: @test27(525; CHECK-NEXT: [[D1:%.*]] = shl nuw i32 [[A:%.*]], [[B:%.*]]526; CHECK-NEXT: ret i32 [[D1]]527;528 %C = shl i32 1, %B529 %D = mul nuw i32 %A, %C530 ret i32 %D531}532 533define i32 @test28(i32 %A) {534; CHECK-LABEL: @test28(535; CHECK-NEXT: [[B:%.*]] = shl nuw i32 1, [[A:%.*]]536; CHECK-NEXT: [[C1:%.*]] = shl i32 [[B]], [[A]]537; CHECK-NEXT: ret i32 [[C1]]538;539 %B = shl i32 1, %A540 %C = mul nsw i32 %B, %B541 ret i32 %C542}543 544define i64 @test29(i31 %A, i31 %B) {545; CHECK-LABEL: @test29(546; CHECK-NEXT: [[C:%.*]] = sext i31 [[A:%.*]] to i64547; CHECK-NEXT: [[D:%.*]] = sext i31 [[B:%.*]] to i64548; CHECK-NEXT: [[E:%.*]] = mul nsw i64 [[C]], [[D]]549; CHECK-NEXT: ret i64 [[E]]550;551 %C = sext i31 %A to i64552 %D = sext i31 %B to i64553 %E = mul i64 %C, %D554 ret i64 %E555}556 557define i64 @test30(i32 %A, i32 %B) {558; CHECK-LABEL: @test30(559; CHECK-NEXT: [[C:%.*]] = zext i32 [[A:%.*]] to i64560; CHECK-NEXT: [[D:%.*]] = zext i32 [[B:%.*]] to i64561; CHECK-NEXT: [[E:%.*]] = mul nuw i64 [[C]], [[D]]562; CHECK-NEXT: ret i64 [[E]]563;564 %C = zext i32 %A to i64565 %D = zext i32 %B to i64566 %E = mul i64 %C, %D567 ret i64 %E568}569 570@PR22087 = external global i32571define i32 @test31(i32 %V) {572; CHECK-LABEL: @test31(573; CHECK-NEXT: [[CMP:%.*]] = icmp ne ptr inttoptr (i64 4 to ptr), @PR22087574; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[CMP]] to i32575; CHECK-NEXT: [[MUL1:%.*]] = shl i32 [[V:%.*]], [[EXT]]576; CHECK-NEXT: ret i32 [[MUL1]]577;578 %cmp = icmp ne ptr inttoptr (i64 4 to ptr), @PR22087579 %ext = zext i1 %cmp to i32580 %shl = shl i32 1, %ext581 %mul = mul i32 %V, %shl582 ret i32 %mul583}584 585define i32 @test32(i32 %X) {586; CHECK-LABEL: @test32(587; CHECK-NEXT: [[MUL:%.*]] = shl i32 [[X:%.*]], 31588; CHECK-NEXT: ret i32 [[MUL]]589;590 %mul = mul nsw i32 %X, -2147483648591 ret i32 %mul592}593 594define <2 x i32> @test32vec(<2 x i32> %X) {595; CHECK-LABEL: @test32vec(596; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[X:%.*]], splat (i32 31)597; CHECK-NEXT: ret <2 x i32> [[MUL]]598;599 %mul = mul nsw <2 x i32> %X, <i32 -2147483648, i32 -2147483648>600 ret <2 x i32> %mul601}602 603define i32 @test33(i32 %X) {604; CHECK-LABEL: @test33(605; CHECK-NEXT: [[MUL:%.*]] = shl nsw i32 [[X:%.*]], 30606; CHECK-NEXT: ret i32 [[MUL]]607;608 %mul = mul nsw i32 %X, 1073741824609 ret i32 %mul610}611 612define <2 x i32> @test33vec(<2 x i32> %X) {613; CHECK-LABEL: @test33vec(614; CHECK-NEXT: [[MUL:%.*]] = shl nsw <2 x i32> [[X:%.*]], splat (i32 30)615; CHECK-NEXT: ret <2 x i32> [[MUL]]616;617 %mul = mul nsw <2 x i32> %X, <i32 1073741824, i32 1073741824>618 ret <2 x i32> %mul619}620 621define i128 @test34(i128 %X) {622; CHECK-LABEL: @test34(623; CHECK-NEXT: [[MUL:%.*]] = shl nsw i128 [[X:%.*]], 1624; CHECK-NEXT: ret i128 [[MUL]]625;626 %mul = mul nsw i128 %X, 2627 ret i128 %mul628}629 630define i32 @test_mul_canonicalize_op0(i32 %x, i32 %y) {631; CHECK-LABEL: @test_mul_canonicalize_op0(632; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[X:%.*]], [[Y:%.*]]633; CHECK-NEXT: [[MUL:%.*]] = sub i32 0, [[TMP1]]634; CHECK-NEXT: ret i32 [[MUL]]635;636 %neg = sub i32 0, %x637 %mul = mul i32 %neg, %y638 ret i32 %mul639}640 641define i32 @test_mul_canonicalize_op1(i32 %x, i32 %z) {642; CHECK-LABEL: @test_mul_canonicalize_op1(643; CHECK-NEXT: [[Y_NEG:%.*]] = mul i32 [[Z:%.*]], -3644; CHECK-NEXT: [[DOTNEG:%.*]] = mul i32 [[Y_NEG]], [[X:%.*]]645; CHECK-NEXT: ret i32 [[DOTNEG]]646;647 %y = mul i32 %z, 3648 %neg = sub i32 0, %x649 %mul = mul i32 %y, %neg650 ret i32 %mul651}652 653define i32 @test_mul_canonicalize_nsw(i32 %x, i32 %y) {654; CHECK-LABEL: @test_mul_canonicalize_nsw(655; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[X:%.*]], [[Y:%.*]]656; CHECK-NEXT: [[MUL:%.*]] = sub i32 0, [[TMP1]]657; CHECK-NEXT: ret i32 [[MUL]]658;659 %neg = sub nsw i32 0, %x660 %mul = mul nsw i32 %neg, %y661 ret i32 %mul662}663 664define <2 x i32> @test_mul_canonicalize_vec(<2 x i32> %x, <2 x i32> %y) {665; CHECK-LABEL: @test_mul_canonicalize_vec(666; CHECK-NEXT: [[TMP1:%.*]] = mul <2 x i32> [[X:%.*]], [[Y:%.*]]667; CHECK-NEXT: [[MUL:%.*]] = sub <2 x i32> zeroinitializer, [[TMP1]]668; CHECK-NEXT: ret <2 x i32> [[MUL]]669;670 %neg = sub <2 x i32> <i32 0, i32 0>, %x671 %mul = mul <2 x i32> %neg, %y672 ret <2 x i32> %mul673}674 675define i32 @test_mul_canonicalize_multiple_uses(i32 %x, i32 %y) {676; CHECK-LABEL: @test_mul_canonicalize_multiple_uses(677; CHECK-NEXT: [[MUL_NEG:%.*]] = mul i32 [[X:%.*]], [[Y:%.*]]678; CHECK-NEXT: [[MUL2:%.*]] = mul i32 [[MUL_NEG]], [[X]]679; CHECK-NEXT: ret i32 [[MUL2]]680;681 %neg = sub i32 0, %x682 %mul = mul i32 %neg, %y683 %mul2 = mul i32 %mul, %neg684 ret i32 %mul2685}686 687@X = global i32 5688 689define i64 @test_mul_canonicalize_neg_is_not_undone(i64 %L1) {690; Check we do not undo the canonicalization of 0 - (X * Y), if Y is a constant691; expr.692; CHECK-LABEL: @test_mul_canonicalize_neg_is_not_undone(693; CHECK-NEXT: [[B4:%.*]] = mul i64 [[L1:%.*]], sub (i64 0, i64 ptrtoint (ptr @X to i64))694; CHECK-NEXT: ret i64 [[B4]]695;696 %v1 = ptrtoint ptr @X to i64697 %B8 = sub i64 0, %v1698 %B4 = mul i64 %B8, %L1699 ret i64 %B4700}701 702define i32 @negate_if_true(i32 %x, i1 %cond) {703; CHECK-LABEL: @negate_if_true(704; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[X:%.*]]705; CHECK-NEXT: [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP1]], i32 [[X]]706; CHECK-NEXT: ret i32 [[R]]707;708 %sel = select i1 %cond, i32 -1, i32 1709 %r = mul i32 %sel, %x710 ret i32 %r711}712 713define i32 @negate_if_false(i32 %x, i1 %cond) {714; CHECK-LABEL: @negate_if_false(715; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[X:%.*]]716; CHECK-NEXT: [[R:%.*]] = select i1 [[COND:%.*]], i32 [[X]], i32 [[TMP1]]717; CHECK-NEXT: ret i32 [[R]]718;719 %sel = select i1 %cond, i32 1, i32 -1720 %r = mul i32 %sel, %x721 ret i32 %r722}723 724define i32 @negate_if_true_nsw(i32 %x, i1 %cond) {725; CHECK-LABEL: @negate_if_true_nsw(726; CHECK-NEXT: [[TMP1:%.*]] = sub nsw i32 0, [[X:%.*]]727; CHECK-NEXT: [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP1]], i32 [[X]]728; CHECK-NEXT: ret i32 [[R]]729;730 %sel = select i1 %cond, i32 -1, i32 1731 %r = mul nsw i32 %sel, %x732 ret i32 %r733}734 735define i32 @negate_if_true_nuw(i32 %x, i1 %cond) {736; CHECK-LABEL: @negate_if_true_nuw(737; CHECK-NEXT: [[TMP1:%.*]] = sub nsw i32 0, [[X:%.*]]738; CHECK-NEXT: [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP1]], i32 [[X]]739; CHECK-NEXT: ret i32 [[R]]740;741 %sel = select i1 %cond, i32 -1, i32 1742 %r = mul nuw i32 %sel, %x743 ret i32 %r744}745 746define i32 @negate_if_false_nsw(i32 %x, i1 %cond) {747; CHECK-LABEL: @negate_if_false_nsw(748; CHECK-NEXT: [[TMP1:%.*]] = sub nsw i32 0, [[X:%.*]]749; CHECK-NEXT: [[R:%.*]] = select i1 [[COND:%.*]], i32 [[X]], i32 [[TMP1]]750; CHECK-NEXT: ret i32 [[R]]751;752 %sel = select i1 %cond, i32 1, i32 -1753 %r = mul nsw i32 %sel, %x754 ret i32 %r755}756 757define i32 @negate_if_false_nuw(i32 %x, i1 %cond) {758; CHECK-LABEL: @negate_if_false_nuw(759; CHECK-NEXT: [[TMP1:%.*]] = sub nsw i32 0, [[X:%.*]]760; CHECK-NEXT: [[R:%.*]] = select i1 [[COND:%.*]], i32 [[X]], i32 [[TMP1]]761; CHECK-NEXT: ret i32 [[R]]762;763 %sel = select i1 %cond, i32 1, i32 -1764 %r = mul nuw i32 %sel, %x765 ret i32 %r766}767 768define <2 x i8> @negate_if_true_commute(<2 x i8> %px, i1 %cond) {769; CHECK-LABEL: @negate_if_true_commute(770; CHECK-NEXT: [[X:%.*]] = sdiv <2 x i8> splat (i8 42), [[PX:%.*]]771; CHECK-NEXT: [[TMP1:%.*]] = sub nsw <2 x i8> zeroinitializer, [[X]]772; CHECK-NEXT: [[R:%.*]] = select i1 [[COND:%.*]], <2 x i8> [[TMP1]], <2 x i8> [[X]]773; CHECK-NEXT: ret <2 x i8> [[R]]774;775 %x = sdiv <2 x i8> <i8 42, i8 42>, %px ; thwart complexity-based canonicalization776 %sel = select i1 %cond, <2 x i8> <i8 -1, i8 -1>, <2 x i8> <i8 1, i8 1>777 %r = mul <2 x i8> %x, %sel778 ret <2 x i8> %r779}780 781define <2 x i8> @negate_if_false_commute(<2 x i8> %px, <2 x i1> %cond) {782; CHECK-LABEL: @negate_if_false_commute(783; CHECK-NEXT: [[X:%.*]] = sdiv <2 x i8> <i8 42, i8 5>, [[PX:%.*]]784; CHECK-NEXT: [[TMP1:%.*]] = sub <2 x i8> zeroinitializer, [[X]]785; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[COND:%.*]], <2 x i8> [[X]], <2 x i8> [[TMP1]]786; CHECK-NEXT: ret <2 x i8> [[R]]787;788 %x = sdiv <2 x i8> <i8 42, i8 5>, %px ; thwart complexity-based canonicalization789 %sel = select <2 x i1> %cond, <2 x i8> <i8 1, i8 poison>, <2 x i8> <i8 -1, i8 -1>790 %r = mul <2 x i8> %x, %sel791 ret <2 x i8> %r792}793 794; Negative test795 796define i32 @negate_if_true_extra_use(i32 %x, i1 %cond) {797; CHECK-LABEL: @negate_if_true_extra_use(798; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], i32 -1, i32 1799; CHECK-NEXT: call void @use32(i32 [[SEL]])800; CHECK-NEXT: [[R:%.*]] = mul i32 [[SEL]], [[X:%.*]]801; CHECK-NEXT: ret i32 [[R]]802;803 %sel = select i1 %cond, i32 -1, i32 1804 call void @use32(i32 %sel)805 %r = mul i32 %sel, %x806 ret i32 %r807}808 809; Negative test810 811define <2 x i8> @negate_if_true_wrong_constant(<2 x i8> %px, i1 %cond) {812; CHECK-LABEL: @negate_if_true_wrong_constant(813; CHECK-NEXT: [[X:%.*]] = sdiv <2 x i8> splat (i8 42), [[PX:%.*]]814; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], <2 x i8> <i8 -1, i8 0>, <2 x i8> splat (i8 1)815; CHECK-NEXT: [[R:%.*]] = mul <2 x i8> [[X]], [[SEL]]816; CHECK-NEXT: ret <2 x i8> [[R]]817;818 %x = sdiv <2 x i8> <i8 42, i8 42>, %px ; thwart complexity-based canonicalization819 %sel = select i1 %cond, <2 x i8> <i8 -1, i8 0>, <2 x i8> <i8 1, i8 1>820 %r = mul <2 x i8> %x, %sel821 ret <2 x i8> %r822}823 824; (C ? (X /exact Y) : 1) * Y -> C ? X : Y825define i32 @mul_div_select(i32 %x, i32 %y, i1 %c) {826; CHECK-LABEL: @mul_div_select(827; CHECK-NEXT: [[MUL:%.*]] = select i1 [[C:%.*]], i32 [[X:%.*]], i32 [[Y:%.*]]828; CHECK-NEXT: ret i32 [[MUL]]829;830 %div = udiv exact i32 %x, %y831 %sel = select i1 %c, i32 %div, i32 1832 %mul = mul i32 %sel, %y833 ret i32 %mul834}835 836; fold mul(abs(x),abs(x)) -> mul(x,x)837define i31 @combine_mul_abs_i31(i31 %0) {838; CHECK-LABEL: @combine_mul_abs_i31(839; CHECK-NEXT: [[M:%.*]] = mul i31 [[TMP0:%.*]], [[TMP0]]840; CHECK-NEXT: ret i31 [[M]]841;842 %c = icmp slt i31 %0, 0843 %s = sub nsw i31 0, %0844 %r = select i1 %c, i31 %s, i31 %0845 %m = mul i31 %r, %r846 ret i31 %m847}848 849define i32 @combine_mul_abs_i32(i32 %0) {850; CHECK-LABEL: @combine_mul_abs_i32(851; CHECK-NEXT: [[M:%.*]] = mul i32 [[TMP0:%.*]], [[TMP0]]852; CHECK-NEXT: ret i32 [[M]]853;854 %c = icmp slt i32 %0, 0855 %s = sub nsw i32 0, %0856 %r = select i1 %c, i32 %s, i32 %0857 %m = mul i32 %r, %r858 ret i32 %m859}860 861define <4 x i32> @combine_mul_abs_v4i32(<4 x i32> %0) {862; CHECK-LABEL: @combine_mul_abs_v4i32(863; CHECK-NEXT: [[M:%.*]] = mul <4 x i32> [[TMP0:%.*]], [[TMP0]]864; CHECK-NEXT: ret <4 x i32> [[M]]865;866 %c = icmp slt <4 x i32> %0, zeroinitializer867 %s = sub nsw <4 x i32> zeroinitializer, %0868 %r = select <4 x i1> %c, <4 x i32> %s, <4 x i32> %0869 %m = mul <4 x i32> %r, %r870 ret <4 x i32> %m871}872 873; fold mul(nabs(x),nabs(x)) -> mul(x,x)874define i31 @combine_mul_nabs_i31(i31 %0) {875; CHECK-LABEL: @combine_mul_nabs_i31(876; CHECK-NEXT: [[M:%.*]] = mul i31 [[TMP0:%.*]], [[TMP0]]877; CHECK-NEXT: ret i31 [[M]]878;879 %c = icmp slt i31 %0, 0880 %s = sub nsw i31 0, %0881 %r = select i1 %c, i31 %0, i31 %s882 %m = mul i31 %r, %r883 ret i31 %m884}885 886define i32 @combine_mul_nabs_i32(i32 %0) {887; CHECK-LABEL: @combine_mul_nabs_i32(888; CHECK-NEXT: [[M:%.*]] = mul i32 [[TMP0:%.*]], [[TMP0]]889; CHECK-NEXT: ret i32 [[M]]890;891 %c = icmp slt i32 %0, 0892 %s = sub nsw i32 0, %0893 %r = select i1 %c, i32 %0, i32 %s894 %m = mul i32 %r, %r895 ret i32 %m896}897 898define <4 x i32> @combine_mul_nabs_v4i32(<4 x i32> %0) {899; CHECK-LABEL: @combine_mul_nabs_v4i32(900; CHECK-NEXT: [[M:%.*]] = mul <4 x i32> [[TMP0:%.*]], [[TMP0]]901; CHECK-NEXT: ret <4 x i32> [[M]]902;903 %c = icmp slt <4 x i32> %0, zeroinitializer904 %s = sub nsw <4 x i32> zeroinitializer, %0905 %r = select <4 x i1> %c, <4 x i32> %0, <4 x i32> %s906 %m = mul <4 x i32> %r, %r907 ret <4 x i32> %m908}909 910define i32 @combine_mul_abs_intrin(i32 %x) {911; CHECK-LABEL: @combine_mul_abs_intrin(912; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[X:%.*]], [[X]]913; CHECK-NEXT: ret i32 [[MUL]]914;915 %abs = call i32 @llvm.abs.i32(i32 %x, i1 false)916 %mul = mul i32 %abs, %abs917 ret i32 %mul918}919 920define i32 @combine_mul_nabs_intrin(i32 %x) {921; CHECK-LABEL: @combine_mul_nabs_intrin(922; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[X:%.*]], [[X]]923; CHECK-NEXT: ret i32 [[MUL]]924;925 %abs = call i32 @llvm.abs.i32(i32 %x, i1 false)926 %neg = sub i32 0, %abs927 %mul = mul i32 %neg, %neg928 ret i32 %mul929}930 931; z * splat(0) = splat(0), even for scalable vectors932define <vscale x 2 x i64> @mul_scalable_splat_zero(<vscale x 2 x i64> %z) {933; CHECK-LABEL: @mul_scalable_splat_zero(934; CHECK-NEXT: ret <vscale x 2 x i64> zeroinitializer935;936 %shuf = shufflevector <vscale x 2 x i64> insertelement (<vscale x 2 x i64> poison, i64 0, i32 0), <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer937 %t3 = mul <vscale x 2 x i64> %shuf, %z938 ret <vscale x 2 x i64> %t3939}940 941;942; fold mul(sub(x,y),negpow2) -> shl(sub(y,x),log2(pow2))943;944 945define i32 @mulsub1(i32 %a0, i32 %a1) {946; CHECK-LABEL: @mulsub1(947; CHECK-NEXT: [[SUB_NEG:%.*]] = sub i32 [[A0:%.*]], [[A1:%.*]]948; CHECK-NEXT: [[MUL:%.*]] = shl i32 [[SUB_NEG]], 2949; CHECK-NEXT: ret i32 [[MUL]]950;951 %sub = sub i32 %a1, %a0952 %mul = mul i32 %sub, -4953 ret i32 %mul954}955 956define <2 x i32> @mulsub1_vec(<2 x i32> %a0, <2 x i32> %a1) {957; CHECK-LABEL: @mulsub1_vec(958; CHECK-NEXT: [[SUB_NEG:%.*]] = sub <2 x i32> [[A0:%.*]], [[A1:%.*]]959; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], splat (i32 2)960; CHECK-NEXT: ret <2 x i32> [[MUL]]961;962 %sub = sub <2 x i32> %a1, %a0963 %mul = mul <2 x i32> %sub, <i32 -4, i32 -4>964 ret <2 x i32> %mul965}966 967define <2 x i32> @mulsub1_vec_nonuniform(<2 x i32> %a0, <2 x i32> %a1) {968; CHECK-LABEL: @mulsub1_vec_nonuniform(969; CHECK-NEXT: [[SUB_NEG:%.*]] = sub <2 x i32> [[A0:%.*]], [[A1:%.*]]970; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 3>971; CHECK-NEXT: ret <2 x i32> [[MUL]]972;973 %sub = sub <2 x i32> %a1, %a0974 %mul = mul <2 x i32> %sub, <i32 -4, i32 -8>975 ret <2 x i32> %mul976}977 978define <2 x i32> @mulsub1_vec_nonuniform_poison(<2 x i32> %a0, <2 x i32> %a1) {979; CHECK-LABEL: @mulsub1_vec_nonuniform_poison(980; CHECK-NEXT: [[SUB_NEG:%.*]] = sub <2 x i32> [[A0:%.*]], [[A1:%.*]]981; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 0>982; CHECK-NEXT: ret <2 x i32> [[MUL]]983;984 %sub = sub <2 x i32> %a1, %a0985 %mul = mul <2 x i32> %sub, <i32 -4, i32 poison>986 ret <2 x i32> %mul987}988 989define i32 @mulsub2(i32 %a0) {990; CHECK-LABEL: @mulsub2(991; CHECK-NEXT: [[SUB_NEG:%.*]] = shl i32 [[A0:%.*]], 2992; CHECK-NEXT: [[MUL:%.*]] = add i32 [[SUB_NEG]], -64993; CHECK-NEXT: ret i32 [[MUL]]994;995 %sub = sub i32 16, %a0996 %mul = mul i32 %sub, -4997 ret i32 %mul998}999 1000define <2 x i32> @mulsub2_vec(<2 x i32> %a0) {1001; CHECK-LABEL: @mulsub2_vec(1002; CHECK-NEXT: [[SUB_NEG:%.*]] = shl <2 x i32> [[A0:%.*]], splat (i32 2)1003; CHECK-NEXT: [[MUL:%.*]] = add <2 x i32> [[SUB_NEG]], splat (i32 -64)1004; CHECK-NEXT: ret <2 x i32> [[MUL]]1005;1006 %sub = sub <2 x i32> <i32 16, i32 16>, %a01007 %mul = mul <2 x i32> %sub, <i32 -4, i32 -4>1008 ret <2 x i32> %mul1009}1010 1011define <2 x i32> @mulsub2_vec_nonuniform(<2 x i32> %a0) {1012; CHECK-LABEL: @mulsub2_vec_nonuniform(1013; CHECK-NEXT: [[SUB_NEG:%.*]] = add <2 x i32> [[A0:%.*]], <i32 -16, i32 -32>1014; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 3>1015; CHECK-NEXT: ret <2 x i32> [[MUL]]1016;1017 %sub = sub <2 x i32> <i32 16, i32 32>, %a01018 %mul = mul <2 x i32> %sub, <i32 -4, i32 -8>1019 ret <2 x i32> %mul1020}1021 1022define <2 x i32> @mulsub2_vec_nonuniform_poison(<2 x i32> %a0) {1023; CHECK-LABEL: @mulsub2_vec_nonuniform_poison(1024; CHECK-NEXT: [[SUB_NEG:%.*]] = add <2 x i32> [[A0:%.*]], <i32 -16, i32 -32>1025; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[SUB_NEG]], <i32 2, i32 0>1026; CHECK-NEXT: ret <2 x i32> [[MUL]]1027;1028 %sub = sub <2 x i32> <i32 16, i32 32>, %a01029 %mul = mul <2 x i32> %sub, <i32 -4, i32 poison>1030 ret <2 x i32> %mul1031}1032 1033define i32 @muladd2(i32 %a0) {1034; CHECK-LABEL: @muladd2(1035; CHECK-NEXT: [[TMP1:%.*]] = shl i32 [[A0:%.*]], 21036; CHECK-NEXT: [[MUL:%.*]] = sub i32 -64, [[TMP1]]1037; CHECK-NEXT: ret i32 [[MUL]]1038;1039 %add = add i32 %a0, 161040 %mul = mul i32 %add, -41041 ret i32 %mul1042}1043 1044define <2 x i32> @muladd2_vec(<2 x i32> %a0) {1045; CHECK-LABEL: @muladd2_vec(1046; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i32> [[A0:%.*]], splat (i32 2)1047; CHECK-NEXT: [[MUL:%.*]] = sub <2 x i32> splat (i32 -64), [[TMP1]]1048; CHECK-NEXT: ret <2 x i32> [[MUL]]1049;1050 %add = add <2 x i32> %a0, <i32 16, i32 16>1051 %mul = mul <2 x i32> %add, <i32 -4, i32 -4>1052 ret <2 x i32> %mul1053}1054 1055define <2 x i32> @muladd2_vec_nonuniform(<2 x i32> %a0) {1056; CHECK-LABEL: @muladd2_vec_nonuniform(1057; CHECK-NEXT: [[ADD_NEG:%.*]] = sub <2 x i32> <i32 -16, i32 -32>, [[A0:%.*]]1058; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[ADD_NEG]], <i32 2, i32 3>1059; CHECK-NEXT: ret <2 x i32> [[MUL]]1060;1061 %add = add <2 x i32> %a0, <i32 16, i32 32>1062 %mul = mul <2 x i32> %add, <i32 -4, i32 -8>1063 ret <2 x i32> %mul1064}1065 1066define <2 x i32> @muladd2_vec_nonuniform_poison(<2 x i32> %a0) {1067; CHECK-LABEL: @muladd2_vec_nonuniform_poison(1068; CHECK-NEXT: [[ADD_NEG:%.*]] = sub <2 x i32> <i32 -16, i32 -32>, [[A0:%.*]]1069; CHECK-NEXT: [[MUL:%.*]] = shl <2 x i32> [[ADD_NEG]], <i32 2, i32 0>1070; CHECK-NEXT: ret <2 x i32> [[MUL]]1071;1072 %add = add <2 x i32> %a0, <i32 16, i32 32>1073 %mul = mul <2 x i32> %add, <i32 -4, i32 poison>1074 ret <2 x i32> %mul1075}1076 1077define i32 @mulmuladd2(i32 %a0, i32 %a1) {1078; CHECK-LABEL: @mulmuladd2(1079; CHECK-NEXT: [[ADD_NEG:%.*]] = sub i32 1073741808, [[A0:%.*]]1080; CHECK-NEXT: [[MUL1_NEG:%.*]] = mul i32 [[ADD_NEG]], [[A1:%.*]]1081; CHECK-NEXT: [[MUL2:%.*]] = shl i32 [[MUL1_NEG]], 21082; CHECK-NEXT: ret i32 [[MUL2]]1083;1084 %add = add i32 %a0, 161085 %mul1 = mul i32 %add, %a11086 %mul2 = mul i32 %mul1, -41087 ret i32 %mul21088}1089define i32 @mulmuladd2_extrause0(i32 %a0, i32 %a1) {1090; CHECK-LABEL: @mulmuladd2_extrause0(1091; CHECK-NEXT: [[ADD:%.*]] = add i32 [[A0:%.*]], 161092; CHECK-NEXT: [[MUL1:%.*]] = mul i32 [[ADD]], [[A1:%.*]]1093; CHECK-NEXT: call void @use32(i32 [[MUL1]])1094; CHECK-NEXT: [[MUL2:%.*]] = mul i32 [[MUL1]], -41095; CHECK-NEXT: ret i32 [[MUL2]]1096;1097 %add = add i32 %a0, 161098 %mul1 = mul i32 %add, %a11099 call void @use32(i32 %mul1)1100 %mul2 = mul i32 %mul1, -41101 ret i32 %mul21102}1103define i32 @mulmuladd2_extrause1(i32 %a0, i32 %a1) {1104; CHECK-LABEL: @mulmuladd2_extrause1(1105; CHECK-NEXT: [[ADD:%.*]] = add i32 [[A0:%.*]], 161106; CHECK-NEXT: call void @use32(i32 [[ADD]])1107; CHECK-NEXT: [[MUL1:%.*]] = mul i32 [[ADD]], [[A1:%.*]]1108; CHECK-NEXT: [[MUL2:%.*]] = mul i32 [[MUL1]], -41109; CHECK-NEXT: ret i32 [[MUL2]]1110;1111 %add = add i32 %a0, 161112 call void @use32(i32 %add)1113 %mul1 = mul i32 %add, %a11114 %mul2 = mul i32 %mul1, -41115 ret i32 %mul21116}1117define i32 @mulmuladd2_extrause2(i32 %a0, i32 %a1) {1118; CHECK-LABEL: @mulmuladd2_extrause2(1119; CHECK-NEXT: [[ADD:%.*]] = add i32 [[A0:%.*]], 161120; CHECK-NEXT: call void @use32(i32 [[ADD]])1121; CHECK-NEXT: [[MUL1:%.*]] = mul i32 [[ADD]], [[A1:%.*]]1122; CHECK-NEXT: call void @use32(i32 [[MUL1]])1123; CHECK-NEXT: [[MUL2:%.*]] = mul i32 [[MUL1]], -41124; CHECK-NEXT: ret i32 [[MUL2]]1125;1126 %add = add i32 %a0, 161127 call void @use32(i32 %add)1128 %mul1 = mul i32 %add, %a11129 call void @use32(i32 %mul1)1130 %mul2 = mul i32 %mul1, -41131 ret i32 %mul21132}1133 1134define i32 @mulnot(i32 %a0) {1135; CHECK-LABEL: @mulnot(1136; CHECK-NEXT: [[ADD_NEG:%.*]] = shl i32 [[A0:%.*]], 21137; CHECK-NEXT: [[MUL:%.*]] = add i32 [[ADD_NEG]], 41138; CHECK-NEXT: ret i32 [[MUL]]1139;1140 %add = xor i32 %a0, -11141 %mul = mul i32 %add, -41142 ret i32 %mul1143}1144define i32 @mulnot_extrause(i32 %a0) {1145; CHECK-LABEL: @mulnot_extrause(1146; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[A0:%.*]], -11147; CHECK-NEXT: call void @use32(i32 [[NOT]])1148; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[NOT]], -41149; CHECK-NEXT: ret i32 [[MUL]]1150;1151 %not = xor i32 %a0, -11152 call void @use32(i32 %not)1153 %mul = mul i32 %not, -41154 ret i32 %mul1155}1156