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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"5target triple = "i386-unknown-linux-gnu"6 7define { i64, i64 } @mul_full_64(i64 %x, i64 %y) {8; CHECK-LABEL: @mul_full_64(9; CHECK-NEXT: [[XL:%.*]] = and i64 [[X:%.*]], 429496729510; CHECK-NEXT: [[XH:%.*]] = lshr i64 [[X]], 3211; CHECK-NEXT: [[YL:%.*]] = and i64 [[Y:%.*]], 429496729512; CHECK-NEXT: [[YH:%.*]] = lshr i64 [[Y]], 3213; CHECK-NEXT: [[T0:%.*]] = mul nuw i64 [[YL]], [[XL]]14; CHECK-NEXT: [[T1:%.*]] = mul nuw i64 [[YL]], [[XH]]15; CHECK-NEXT: [[T2:%.*]] = mul nuw i64 [[YH]], [[XL]]16; CHECK-NEXT: [[T3:%.*]] = mul nuw i64 [[YH]], [[XH]]17; CHECK-NEXT: [[T0L:%.*]] = and i64 [[T0]], 429496729518; CHECK-NEXT: [[T0H:%.*]] = lshr i64 [[T0]], 3219; CHECK-NEXT: [[U0:%.*]] = add i64 [[T0H]], [[T1]]20; CHECK-NEXT: [[U0L:%.*]] = and i64 [[U0]], 429496729521; CHECK-NEXT: [[U0H:%.*]] = lshr i64 [[U0]], 3222; CHECK-NEXT: [[U1:%.*]] = add i64 [[U0L]], [[T2]]23; CHECK-NEXT: [[U1LS:%.*]] = shl i64 [[U1]], 3224; CHECK-NEXT: [[U1H:%.*]] = lshr i64 [[U1]], 3225; CHECK-NEXT: [[U2:%.*]] = add i64 [[U0H]], [[T3]]26; CHECK-NEXT: [[LO:%.*]] = or disjoint i64 [[U1LS]], [[T0L]]27; CHECK-NEXT: [[HI:%.*]] = add i64 [[U2]], [[U1H]]28; CHECK-NEXT: [[RES_LO:%.*]] = insertvalue { i64, i64 } undef, i64 [[LO]], 029; CHECK-NEXT: [[RES:%.*]] = insertvalue { i64, i64 } [[RES_LO]], i64 [[HI]], 130; CHECK-NEXT: ret { i64, i64 } [[RES]]31;32 %xl = and i64 %x, 429496729533 %xh = lshr i64 %x, 3234 %yl = and i64 %y, 429496729535 %yh = lshr i64 %y, 3236 37 %t0 = mul nuw i64 %yl, %xl38 %t1 = mul nuw i64 %yl, %xh39 %t2 = mul nuw i64 %yh, %xl40 %t3 = mul nuw i64 %yh, %xh41 42 %t0l = and i64 %t0, 429496729543 %t0h = lshr i64 %t0, 3244 45 %u0 = add i64 %t0h, %t146 %u0l = and i64 %u0, 429496729547 %u0h = lshr i64 %u0, 3248 49 %u1 = add i64 %u0l, %t250 %u1ls = shl i64 %u1, 3251 %u1h = lshr i64 %u1, 3252 53 %u2 = add i64 %u0h, %t354 55 %lo = or i64 %u1ls, %t0l56 %hi = add i64 %u2, %u1h57 58 %res_lo = insertvalue { i64, i64 } undef, i64 %lo, 059 %res = insertvalue { i64, i64 } %res_lo, i64 %hi, 160 ret { i64, i64 } %res61}62 63define { i32, i32 } @mul_full_32(i32 %x, i32 %y) {64; CHECK-LABEL: @mul_full_32(65; CHECK-NEXT: [[XL:%.*]] = and i32 [[X:%.*]], 6553566; CHECK-NEXT: [[XH:%.*]] = lshr i32 [[X]], 1667; CHECK-NEXT: [[YL:%.*]] = and i32 [[Y:%.*]], 6553568; CHECK-NEXT: [[YH:%.*]] = lshr i32 [[Y]], 1669; CHECK-NEXT: [[T0:%.*]] = mul nuw i32 [[YL]], [[XL]]70; CHECK-NEXT: [[T1:%.*]] = mul nuw i32 [[YL]], [[XH]]71; CHECK-NEXT: [[T2:%.*]] = mul nuw i32 [[YH]], [[XL]]72; CHECK-NEXT: [[T3:%.*]] = mul nuw i32 [[YH]], [[XH]]73; CHECK-NEXT: [[T0L:%.*]] = and i32 [[T0]], 6553574; CHECK-NEXT: [[T0H:%.*]] = lshr i32 [[T0]], 1675; CHECK-NEXT: [[U0:%.*]] = add i32 [[T0H]], [[T1]]76; CHECK-NEXT: [[U0L:%.*]] = and i32 [[U0]], 6553577; CHECK-NEXT: [[U0H:%.*]] = lshr i32 [[U0]], 1678; CHECK-NEXT: [[U1:%.*]] = add i32 [[U0L]], [[T2]]79; CHECK-NEXT: [[U1LS:%.*]] = shl i32 [[U1]], 1680; CHECK-NEXT: [[U1H:%.*]] = lshr i32 [[U1]], 1681; CHECK-NEXT: [[U2:%.*]] = add i32 [[U0H]], [[T3]]82; CHECK-NEXT: [[LO:%.*]] = or disjoint i32 [[U1LS]], [[T0L]]83; CHECK-NEXT: [[HI:%.*]] = add i32 [[U2]], [[U1H]]84; CHECK-NEXT: [[RES_LO:%.*]] = insertvalue { i32, i32 } undef, i32 [[LO]], 085; CHECK-NEXT: [[RES:%.*]] = insertvalue { i32, i32 } [[RES_LO]], i32 [[HI]], 186; CHECK-NEXT: ret { i32, i32 } [[RES]]87;88 %xl = and i32 %x, 6553589 %xh = lshr i32 %x, 1690 %yl = and i32 %y, 6553591 %yh = lshr i32 %y, 1692 93 %t0 = mul nuw i32 %yl, %xl94 %t1 = mul nuw i32 %yl, %xh95 %t2 = mul nuw i32 %yh, %xl96 %t3 = mul nuw i32 %yh, %xh97 98 %t0l = and i32 %t0, 6553599 %t0h = lshr i32 %t0, 16100 101 %u0 = add i32 %t0h, %t1102 %u0l = and i32 %u0, 65535103 %u0h = lshr i32 %u0, 16104 105 %u1 = add i32 %u0l, %t2106 %u1ls = shl i32 %u1, 16107 %u1h = lshr i32 %u1, 16108 109 %u2 = add i32 %u0h, %t3110 111 %lo = or i32 %u1ls, %t0l112 %hi = add i32 %u2, %u1h113 114 %res_lo = insertvalue { i32, i32 } undef, i32 %lo, 0115 %res = insertvalue { i32, i32 } %res_lo, i32 %hi, 1116 ret { i32, i32 } %res117}118