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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s --check-prefixes=CHECK,CONSTVEC3; RUN: opt < %s -passes=instcombine -S -use-constant-int-for-fixed-length-splat | FileCheck %s --check-prefixes=CHECK,CONSTSPLAT4 5define i32 @add_select_cmp_and1(i32 %in) {6; CHECK-LABEL: @add_select_cmp_and1(7; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 38; CHECK-NEXT: [[OUT:%.*]] = mul nuw nsw i32 [[TMP1]], 729; CHECK-NEXT: ret i32 [[OUT]]10;11 %bitop0 = and i32 %in, 112 %cmp0 = icmp eq i32 %bitop0, 013 %bitop1 = and i32 %in, 214 %cmp1 = icmp eq i32 %bitop1, 015 %sel0 = select i1 %cmp0, i32 0, i32 7216 %sel1 = select i1 %cmp1, i32 0, i32 14417 %out = or disjoint i32 %sel0, %sel118 ret i32 %out19}20 21define i32 @add_select_cmp_and2(i32 %in) {22; CHECK-LABEL: @add_select_cmp_and2(23; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 524; CHECK-NEXT: [[OUT:%.*]] = mul nuw nsw i32 [[TMP1]], 7225; CHECK-NEXT: ret i32 [[OUT]]26;27 %bitop0 = and i32 %in, 128 %cmp0 = icmp eq i32 %bitop0, 029 %bitop1 = and i32 %in, 430 %cmp1 = icmp eq i32 %bitop1, 031 %sel0 = select i1 %cmp0, i32 0, i32 7232 %sel1 = select i1 %cmp1, i32 0, i32 28833 %out = or disjoint i32 %sel0, %sel134 ret i32 %out35}36 37define i32 @add_select_cmp_and3(i32 %in) {38; CHECK-LABEL: @add_select_cmp_and3(39; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 740; CHECK-NEXT: [[TEMP1:%.*]] = mul nuw nsw i32 [[TMP1]], 7241; CHECK-NEXT: ret i32 [[TEMP1]]42;43 %bitop0 = and i32 %in, 144 %cmp0 = icmp eq i32 %bitop0, 045 %bitop1 = and i32 %in, 246 %cmp1 = icmp eq i32 %bitop1, 047 %sel0 = select i1 %cmp0, i32 0, i32 7248 %sel1 = select i1 %cmp1, i32 0, i32 14449 %temp = or disjoint i32 %sel0, %sel150 %bitop2 = and i32 %in, 451 %cmp2 = icmp eq i32 %bitop2, 052 %sel2 = select i1 %cmp2, i32 0, i32 28853 %out = or disjoint i32 %temp, %sel254 ret i32 %out55}56 57define i32 @add_select_cmp_and4(i32 %in) {58; CHECK-LABEL: @add_select_cmp_and4(59; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[IN:%.*]], 1560; CHECK-NEXT: [[TEMP2:%.*]] = mul nuw nsw i32 [[TMP2]], 7261; CHECK-NEXT: ret i32 [[TEMP2]]62;63 %bitop0 = and i32 %in, 164 %cmp0 = icmp eq i32 %bitop0, 065 %bitop1 = and i32 %in, 266 %cmp1 = icmp eq i32 %bitop1, 067 %sel0 = select i1 %cmp0, i32 0, i32 7268 %sel1 = select i1 %cmp1, i32 0, i32 14469 %temp = or disjoint i32 %sel0, %sel170 %bitop2 = and i32 %in, 471 %cmp2 = icmp eq i32 %bitop2, 072 %bitop3 = and i32 %in, 873 %cmp3 = icmp eq i32 %bitop3, 074 %sel2 = select i1 %cmp2, i32 0, i32 28875 %sel3 = select i1 %cmp3, i32 0, i32 57676 %temp2 = or disjoint i32 %sel2, %sel377 %out = or disjoint i32 %temp, %temp278 ret i32 %out79}80 81define i32 @add_select_cmp_and_pred1(i32 %in) {82; CHECK-LABEL: @add_select_cmp_and_pred1(83; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 384; CHECK-NEXT: [[OUT:%.*]] = mul nuw nsw i32 [[TMP1]], 7285; CHECK-NEXT: ret i32 [[OUT]]86;87 %bitop0 = and i32 %in, 188 %cmp0 = icmp ne i32 %bitop0, 089 %bitop1 = and i32 %in, 290 %cmp1 = icmp eq i32 %bitop1, 091 %sel0 = select i1 %cmp0, i32 72, i32 092 %sel1 = select i1 %cmp1, i32 0, i32 14493 %out = or disjoint i32 %sel0, %sel194 ret i32 %out95}96 97define i32 @add_select_cmp_and_pred2(i32 %in) {98; CHECK-LABEL: @add_select_cmp_and_pred2(99; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 3100; CHECK-NEXT: [[OUT:%.*]] = mul nuw nsw i32 [[TMP1]], 72101; CHECK-NEXT: ret i32 [[OUT]]102;103 %bitop0 = and i32 %in, 1104 %cmp0 = icmp eq i32 %bitop0, 0105 %bitop1 = and i32 %in, 2106 %cmp1 = icmp ne i32 %bitop1, 0107 %sel0 = select i1 %cmp0, i32 0, i32 72108 %sel1 = select i1 %cmp1, i32 144, i32 0109 %out = or disjoint i32 %sel0, %sel1110 ret i32 %out111}112 113define i32 @add_select_cmp_and_pred3(i32 %in) {114; CHECK-LABEL: @add_select_cmp_and_pred3(115; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 3116; CHECK-NEXT: [[OUT:%.*]] = mul nuw nsw i32 [[TMP1]], 72117; CHECK-NEXT: ret i32 [[OUT]]118;119 %bitop0 = and i32 %in, 1120 %cmp0 = icmp ne i32 %bitop0, 0121 %bitop1 = and i32 %in, 2122 %cmp1 = icmp ne i32 %bitop1, 0123 %sel0 = select i1 %cmp0, i32 72, i32 0124 %sel1 = select i1 %cmp1, i32 144, i32 0125 %out = or disjoint i32 %sel0, %sel1126 ret i32 %out127}128 129define i32 @add_select_cmp_trunc(i32 %in) {130; CHECK-LABEL: @add_select_cmp_trunc(131; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 3132; CHECK-NEXT: [[OUT:%.*]] = mul nuw nsw i32 [[TMP1]], 72133; CHECK-NEXT: ret i32 [[OUT]]134;135 %cmp0 = trunc i32 %in to i1136 %bitop1 = and i32 %in, 2137 %cmp1 = icmp eq i32 %bitop1, 0138 %sel0 = select i1 %cmp0, i32 72, i32 0139 %sel1 = select i1 %cmp1, i32 0, i32 144140 %out = or disjoint i32 %sel0, %sel1141 ret i32 %out142}143 144define i32 @add_select_cmp_trunc1(i32 %in) {145; CHECK-LABEL: @add_select_cmp_trunc1(146; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 3147; CHECK-NEXT: [[OUT:%.*]] = mul nuw nsw i32 [[TMP1]], 72148; CHECK-NEXT: ret i32 [[OUT]]149;150 %cmp0 = trunc i32 %in to i1151 %bitop1 = and i32 %in, 2152 %cmp1 = icmp ne i32 %bitop1, 0153 %sel0 = select i1 %cmp0, i32 72, i32 0154 %sel1 = select i1 %cmp1, i32 144, i32 0155 %out = or disjoint i32 %sel0, %sel1156 ret i32 %out157}158 159 160define i32 @add_select_cmp_and_const_mismatch(i32 %in) {161; CHECK-LABEL: @add_select_cmp_and_const_mismatch(162; CHECK-NEXT: [[BITOP0:%.*]] = and i32 [[IN:%.*]], 1163; CHECK-NEXT: [[CMP0:%.*]] = icmp eq i32 [[BITOP0]], 0164; CHECK-NEXT: [[BITOP1:%.*]] = and i32 [[IN]], 2165; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[BITOP1]], 0166; CHECK-NEXT: [[SEL0:%.*]] = select i1 [[CMP0]], i32 0, i32 72167; CHECK-NEXT: [[SEL1:%.*]] = select i1 [[CMP1]], i32 0, i32 288168; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[SEL0]], [[SEL1]]169; CHECK-NEXT: ret i32 [[OUT]]170;171 %bitop0 = and i32 %in, 1172 %cmp0 = icmp eq i32 %bitop0, 0173 %bitop1 = and i32 %in, 2174 %cmp1 = icmp eq i32 %bitop1, 0175 %sel0 = select i1 %cmp0, i32 0, i32 72176 %sel1 = select i1 %cmp1, i32 0, i32 288177 %out = or disjoint i32 %sel0, %sel1178 ret i32 %out179}180 181define i32 @add_select_cmp_and_value_mismatch(i32 %in, i32 %in1) {182; CHECK-LABEL: @add_select_cmp_and_value_mismatch(183; CHECK-NEXT: [[BITOP0:%.*]] = and i32 [[IN:%.*]], 1184; CHECK-NEXT: [[CMP0:%.*]] = icmp eq i32 [[BITOP0]], 0185; CHECK-NEXT: [[BITOP1:%.*]] = and i32 [[IN1:%.*]], 2186; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[BITOP1]], 0187; CHECK-NEXT: [[SEL0:%.*]] = select i1 [[CMP0]], i32 0, i32 72188; CHECK-NEXT: [[SEL1:%.*]] = select i1 [[CMP1]], i32 0, i32 144189; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[SEL0]], [[SEL1]]190; CHECK-NEXT: ret i32 [[OUT]]191;192 %bitop0 = and i32 %in, 1193 %cmp0 = icmp eq i32 %bitop0, 0194 %bitop1 = and i32 %in1, 2195 %cmp1 = icmp eq i32 %bitop1, 0196 %sel0 = select i1 %cmp0, i32 0, i32 72197 %sel1 = select i1 %cmp1, i32 0, i32 144198 %out = or disjoint i32 %sel0, %sel1199 ret i32 %out200}201 202define i32 @add_select_cmp_and_negative(i32 %in) {203; CHECK-LABEL: @add_select_cmp_and_negative(204; CHECK-NEXT: [[BITOP0:%.*]] = and i32 [[IN:%.*]], 1205; CHECK-NEXT: [[CMP0:%.*]] = icmp eq i32 [[BITOP0]], 0206; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[IN]], 2207; CHECK-NEXT: [[SEL0:%.*]] = select i1 [[CMP0]], i32 0, i32 72208; CHECK-NEXT: [[SEL1:%.*]] = select i1 [[CMP1]], i32 0, i32 -144209; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[SEL0]], [[SEL1]]210; CHECK-NEXT: ret i32 [[OUT]]211;212 %bitop0 = and i32 %in, 1213 %cmp0 = icmp eq i32 %bitop0, 0214 %bitop1 = and i32 %in, -2215 %cmp1 = icmp eq i32 %bitop1, 0216 %sel0 = select i1 %cmp0, i32 0, i32 72217 %sel1 = select i1 %cmp1, i32 0, i32 -144218 %out = or disjoint i32 %sel0, %sel1219 ret i32 %out220}221 222define i32 @add_select_cmp_and_bitsel_overlap(i32 %in) {223; CHECK-LABEL: @add_select_cmp_and_bitsel_overlap(224; CHECK-NEXT: [[BITOP0:%.*]] = and i32 [[IN:%.*]], 2225; CHECK-NEXT: [[CMP0:%.*]] = icmp eq i32 [[BITOP0]], 0226; CHECK-NEXT: [[SEL0:%.*]] = select i1 [[CMP0]], i32 0, i32 144227; CHECK-NEXT: ret i32 [[SEL0]]228;229 %bitop0 = and i32 %in, 2230 %cmp0 = icmp eq i32 %bitop0, 0231 %bitop1 = and i32 %in, 2232 %cmp1 = icmp eq i32 %bitop1, 0233 %sel0 = select i1 %cmp0, i32 0, i32 144234 %sel1 = select i1 %cmp1, i32 0, i32 144235 %out = or disjoint i32 %sel0, %sel1236 ret i32 %out237}238 239; We cannot combine into and-mul, as %bitop1 may not be exactly 6240 241define i32 @add_select_cmp_and_multbit_mask(i32 %in) {242; CHECK-LABEL: @add_select_cmp_and_multbit_mask(243; CHECK-NEXT: [[BITOP0:%.*]] = and i32 [[IN:%.*]], 1244; CHECK-NEXT: [[CMP0:%.*]] = icmp eq i32 [[BITOP0]], 0245; CHECK-NEXT: [[BITOP1:%.*]] = and i32 [[IN]], 6246; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[BITOP1]], 0247; CHECK-NEXT: [[SEL0:%.*]] = select i1 [[CMP0]], i32 0, i32 72248; CHECK-NEXT: [[SEL1:%.*]] = select i1 [[CMP1]], i32 0, i32 432249; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[SEL0]], [[SEL1]]250; CHECK-NEXT: ret i32 [[OUT]]251;252 %bitop0 = and i32 %in, 1253 %cmp0 = icmp eq i32 %bitop0, 0254 %bitop1 = and i32 %in, 6255 %cmp1 = icmp eq i32 %bitop1, 0256 %sel0 = select i1 %cmp0, i32 0, i32 72257 %sel1 = select i1 %cmp1, i32 0, i32 432258 %out = or disjoint i32 %sel0, %sel1259 ret i32 %out260}261 262 263define <2 x i32> @add_select_cmp_vec(<2 x i32> %in) {264; CHECK-LABEL: @add_select_cmp_vec(265; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[IN:%.*]], splat (i32 3)266; CHECK-NEXT: [[OUT:%.*]] = mul nuw nsw <2 x i32> [[TMP1]], splat (i32 72)267; CHECK-NEXT: ret <2 x i32> [[OUT]]268;269 %bitop0 = and <2 x i32> %in, <i32 1, i32 1>270 %cmp0 = icmp eq <2 x i32> %bitop0, <i32 0, i32 0>271 %bitop1 = and <2 x i32> %in, <i32 2, i32 2>272 %cmp1 = icmp eq <2 x i32> %bitop1, <i32 0, i32 0>273 %sel0 = select <2 x i1> %cmp0, <2 x i32> <i32 0, i32 0>, <2 x i32> <i32 72, i32 72>274 %sel1 = select <2 x i1> %cmp1, <2 x i32> <i32 0, i32 0>, <2 x i32> <i32 144, i32 144>275 %out = or disjoint <2 x i32> %sel0, %sel1276 ret <2 x i32> %out277}278 279define <2 x i32> @add_select_cmp_vec_poison(<2 x i32> %in) {280; CHECK-LABEL: @add_select_cmp_vec_poison(281; CHECK-NEXT: [[BITOP0:%.*]] = and <2 x i32> [[IN:%.*]], splat (i32 1)282; CHECK-NEXT: [[CMP0:%.*]] = icmp eq <2 x i32> [[BITOP0]], zeroinitializer283; CHECK-NEXT: [[BITOP1:%.*]] = and <2 x i32> [[IN]], splat (i32 2)284; CHECK-NEXT: [[CMP1:%.*]] = icmp eq <2 x i32> [[BITOP1]], zeroinitializer285; CHECK-NEXT: [[SEL1:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> zeroinitializer, <2 x i32> <i32 poison, i32 144>286; CHECK-NEXT: [[OUT:%.*]] = select <2 x i1> [[CMP0]], <2 x i32> [[SEL1]], <2 x i32> <i32 72, i32 poison>287; CHECK-NEXT: ret <2 x i32> [[OUT]]288;289 %bitop0 = and <2 x i32> %in, <i32 1, i32 1>290 %cmp0 = icmp eq <2 x i32> %bitop0, <i32 0, i32 0>291 %bitop1 = and <2 x i32> %in, <i32 2, i32 2>292 %cmp1 = icmp eq <2 x i32> %bitop1, <i32 0, i32 0>293 %sel0 = select <2 x i1> %cmp0, <2 x i32> <i32 0, i32 0>, <2 x i32> <i32 72, i32 poison>294 %sel1 = select <2 x i1> %cmp1, <2 x i32> <i32 0, i32 0>, <2 x i32> <i32 poison, i32 144>295 %out = or disjoint <2 x i32> %sel0, %sel1296 ret <2 x i32> %out297}298 299define <2 x i32> @add_select_cmp_vec_nonunique(<2 x i32> %in) {300; CHECK-LABEL: @add_select_cmp_vec_nonunique(301; CHECK-NEXT: [[BITOP0:%.*]] = and <2 x i32> [[IN:%.*]], <i32 1, i32 2>302; CHECK-NEXT: [[CMP0:%.*]] = icmp eq <2 x i32> [[BITOP0]], zeroinitializer303; CHECK-NEXT: [[BITOP1:%.*]] = and <2 x i32> [[IN]], <i32 4, i32 8>304; CHECK-NEXT: [[CMP1:%.*]] = icmp eq <2 x i32> [[BITOP1]], zeroinitializer305; CHECK-NEXT: [[SEL0:%.*]] = select <2 x i1> [[CMP0]], <2 x i32> zeroinitializer, <2 x i32> <i32 72, i32 144>306; CHECK-NEXT: [[SEL1:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> zeroinitializer, <2 x i32> <i32 288, i32 576>307; CHECK-NEXT: [[OUT:%.*]] = or disjoint <2 x i32> [[SEL0]], [[SEL1]]308; CHECK-NEXT: ret <2 x i32> [[OUT]]309;310 %bitop0 = and <2 x i32> %in, <i32 1, i32 2>311 %cmp0 = icmp eq <2 x i32> %bitop0, <i32 0, i32 0>312 %bitop1 = and <2 x i32> %in, <i32 4, i32 8>313 %cmp1 = icmp eq <2 x i32> %bitop1, <i32 0, i32 0>314 %sel0 = select <2 x i1> %cmp0, <2 x i32> <i32 0, i32 0>, <2 x i32> <i32 72, i32 144>315 %sel1 = select <2 x i1> %cmp1, <2 x i32> <i32 0, i32 0>, <2 x i32> <i32 288, i32 576>316 %out = or disjoint <2 x i32> %sel0, %sel1317 ret <2 x i32> %out318}319 320define i64 @mask_select_types(i32 %in) {321; CHECK-LABEL: @mask_select_types(322; CHECK-NEXT: [[BITOP0:%.*]] = and i32 [[IN:%.*]], 1323; CHECK-NEXT: [[CMP0_NOT:%.*]] = icmp eq i32 [[BITOP0]], 0324; CHECK-NEXT: [[BITOP1:%.*]] = and i32 [[IN]], 2325; CHECK-NEXT: [[CMP1_NOT:%.*]] = icmp eq i32 [[BITOP1]], 0326; CHECK-NEXT: [[SEL0:%.*]] = select i1 [[CMP0_NOT]], i64 0, i64 72327; CHECK-NEXT: [[SEL1:%.*]] = select i1 [[CMP1_NOT]], i64 0, i64 144328; CHECK-NEXT: [[OUT:%.*]] = or disjoint i64 [[SEL0]], [[SEL1]]329; CHECK-NEXT: ret i64 [[OUT]]330;331 %bitop0 = and i32 %in, 1332 %cmp0 = icmp ne i32 %bitop0, 0333 %bitop1 = and i32 %in, 2334 %cmp1 = icmp ne i32 %bitop1, 0335 %sel0 = select i1 %cmp0, i64 72, i64 0336 %sel1 = select i1 %cmp1, i64 144, i64 0337 %out = or disjoint i64 %sel0, %sel1338 ret i64 %out339}340 341define i64 @mask_select_types_1(i64 %in) {342; CHECK-LABEL: @mask_select_types_1(343; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[IN:%.*]], 3344; CHECK-NEXT: [[OUT:%.*]] = mul nuw nsw i64 [[TMP1]], 72345; CHECK-NEXT: ret i64 [[OUT]]346;347 %bitop0 = and i64 %in, 1348 %cmp0 = icmp ne i64 %bitop0, 0349 %bitop1 = and i64 %in, 2350 %cmp1 = icmp ne i64 %bitop1, 0351 %sel0 = select i1 %cmp0, i64 72, i64 0352 %sel1 = select i1 %cmp1, i64 144, i64 0353 %out = or disjoint i64 %sel0, %sel1354 ret i64 %out355}356 357define i32 @add_select_cmp_mixed1(i32 %in) {358; CHECK-LABEL: @add_select_cmp_mixed1(359; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 3360; CHECK-NEXT: [[OUT:%.*]] = mul nuw nsw i32 [[TMP1]], 72361; CHECK-NEXT: ret i32 [[OUT]]362;363 %mask = and i32 %in, 1364 %sel0 = mul i32 %mask, 72365 %bitop1 = and i32 %in, 2366 %cmp1 = icmp eq i32 %bitop1, 0367 %sel1 = select i1 %cmp1, i32 0, i32 144368 %out = or disjoint i32 %sel0, %sel1369 ret i32 %out370}371 372define i32 @add_select_cmp_mixed2(i32 %in) {373; CHECK-LABEL: @add_select_cmp_mixed2(374; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 3375; CHECK-NEXT: [[OUT:%.*]] = mul nuw nsw i32 [[TMP1]], 72376; CHECK-NEXT: ret i32 [[OUT]]377;378 %bitop0 = and i32 %in, 1379 %cmp0 = icmp eq i32 %bitop0, 0380 %mask = and i32 %in, 2381 %sel0 = select i1 %cmp0, i32 0, i32 72382 %sel1 = mul i32 %mask, 72383 %out = or disjoint i32 %sel0, %sel1384 ret i32 %out385}386 387define i32 @add_select_cmp_and_mul(i32 %in) {388; CHECK-LABEL: @add_select_cmp_and_mul(389; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 3390; CHECK-NEXT: [[OUT:%.*]] = mul nuw nsw i32 [[TMP1]], 72391; CHECK-NEXT: ret i32 [[OUT]]392;393 %mask0 = and i32 %in, 1394 %sel0 = mul i32 %mask0, 72395 %mask1 = and i32 %in, 2396 %sel1 = mul i32 %mask1, 72397 %out = or disjoint i32 %sel0, %sel1398 ret i32 %out399}400 401define i32 @add_select_cmp_mixed2_mismatch(i32 %in) {402; CHECK-LABEL: @add_select_cmp_mixed2_mismatch(403; CHECK-NEXT: [[BITOP0:%.*]] = and i32 [[IN:%.*]], 1404; CHECK-NEXT: [[CMP0:%.*]] = icmp eq i32 [[BITOP0]], 0405; CHECK-NEXT: [[MASK:%.*]] = and i32 [[IN]], 2406; CHECK-NEXT: [[SEL0:%.*]] = select i1 [[CMP0]], i32 0, i32 73407; CHECK-NEXT: [[SEL1:%.*]] = mul nuw nsw i32 [[MASK]], 72408; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[SEL0]], [[SEL1]]409; CHECK-NEXT: ret i32 [[OUT]]410;411 %bitop0 = and i32 %in, 1412 %cmp0 = icmp eq i32 %bitop0, 0413 %mask = and i32 %in, 2414 %sel0 = select i1 %cmp0, i32 0, i32 73415 %sel1 = mul i32 %mask, 72416 %out = or disjoint i32 %sel0, %sel1417 ret i32 %out418}419 420define i32 @add_select_cmp_and_mul_mismatch(i32 %in) {421; CHECK-LABEL: @add_select_cmp_and_mul_mismatch(422; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[IN:%.*]] to i1423; CHECK-NEXT: [[SEL0:%.*]] = select i1 [[TMP1]], i32 73, i32 0424; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[IN]], 2425; CHECK-NEXT: [[SEL1:%.*]] = mul nuw nsw i32 [[MASK1]], 72426; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[SEL0]], [[SEL1]]427; CHECK-NEXT: ret i32 [[OUT]]428;429 %mask0 = and i32 %in, 1430 %sel0 = mul i32 %mask0, 73431 %mask1 = and i32 %in, 2432 %sel1 = mul i32 %mask1, 72433 %out = or disjoint i32 %sel0, %sel1434 ret i32 %out435}436 437define i32 @and_mul_non_disjoint(i32 %in) {438; CHECK-LABEL: @and_mul_non_disjoint(439; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 2440; CHECK-NEXT: [[OUT:%.*]] = mul nuw nsw i32 [[TMP1]], 72441; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[IN]], 4442; CHECK-NEXT: [[SEL1:%.*]] = mul nuw nsw i32 [[MASK1]], 72443; CHECK-NEXT: [[OUT1:%.*]] = or i32 [[OUT]], [[SEL1]]444; CHECK-NEXT: ret i32 [[OUT1]]445;446 %mask0 = and i32 %in, 2447 %sel0 = mul i32 %mask0, 72448 %mask1 = and i32 %in, 4449 %sel1 = mul i32 %mask1, 72450 %out = or i32 %sel0, %sel1451 ret i32 %out452}453 454define i32 @unrelated_ops(i32 %in, i32 %in2) {455; CHECK-LABEL: @unrelated_ops(456; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 15457; CHECK-NEXT: [[TMP2:%.*]] = mul nuw nsw i32 [[TMP1]], 72458; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP2]], [[IN2:%.*]]459; CHECK-NEXT: ret i32 [[OUT]]460;461 %and0 = and i32 %in, 3462 %temp = mul nuw nsw i32 %and0, 72463 %and1 = and i32 %in, 12464 %temp2 = mul nuw nsw i32 %and1, 72465 %temp3 = or disjoint i32 %in2, %temp2466 %out = or disjoint i32 %temp, %temp3467 ret i32 %out468}469 470define i32 @unrelated_ops1(i32 %in, i32 %in2) {471; CHECK-LABEL: @unrelated_ops1(472; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 15473; CHECK-NEXT: [[TMP2:%.*]] = mul nuw nsw i32 [[TMP1]], 72474; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP2]], [[IN2:%.*]]475; CHECK-NEXT: ret i32 [[OUT]]476;477 %and0 = and i32 %in, 3478 %temp = mul nuw nsw i32 %and0, 72479 %and1 = and i32 %in, 12480 %temp2 = mul nuw nsw i32 %and1, 72481 %temp3 = or disjoint i32 %in2, %temp482 %out = or disjoint i32 %temp3, %temp2483 ret i32 %out484}485 486define i32 @unrelated_ops2(i32 %in, i32 %in2, i32 %in3) {487; CHECK-LABEL: @unrelated_ops2(488; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 3489; CHECK-NEXT: [[TMP2:%.*]] = mul nuw nsw i32 [[TMP1]], 72490; CHECK-NEXT: [[TEMP3:%.*]] = or disjoint i32 [[TMP2]], [[IN4:%.*]]491; CHECK-NEXT: [[AND1:%.*]] = and i32 [[IN]], 12492; CHECK-NEXT: [[IN2:%.*]] = mul nuw nsw i32 [[AND1]], 72493; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i32 [[IN3:%.*]], [[IN2]]494; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TEMP3]], [[TMP3]]495; CHECK-NEXT: ret i32 [[OUT]]496;497 %and0 = and i32 %in, 3498 %temp = mul nuw nsw i32 %and0, 72499 %temp3 = or disjoint i32 %temp, %in3500 %and1 = and i32 %in, 12501 %temp2 = mul nuw nsw i32 %and1, 72502 %temp4 = or disjoint i32 %in2, %temp2503 %out = or disjoint i32 %temp3, %temp4504 ret i32 %out505}506 507define i32 @unrelated_ops3(i32 %in, i32 %in2, i32 %in3) {508; CHECK-LABEL: @unrelated_ops3(509; CHECK-NEXT: [[AND0:%.*]] = and i32 [[IN:%.*]], 2510; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND0]], 0511; CHECK-NEXT: [[TEMP:%.*]] = select i1 [[CMP]], i32 0, i32 144512; CHECK-NEXT: [[TEMP3:%.*]] = or disjoint i32 [[TEMP]], [[IN3:%.*]]513; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[IN]], 12514; CHECK-NEXT: [[TEMP2:%.*]] = mul nuw nsw i32 [[TMP2]], 72515; CHECK-NEXT: [[TEMP4:%.*]] = or disjoint i32 [[IN2:%.*]], [[TEMP2]]516; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TEMP3]], [[TEMP4]]517; CHECK-NEXT: ret i32 [[OUT]]518;519 %and0 = and i32 %in, 2520 %cmp = icmp eq i32 %and0, 0521 %temp = select i1 %cmp, i32 0, i32 144522 %temp3 = or disjoint i32 %temp, %in3523 %and1 = and i32 %in, 12524 %temp2 = mul nuw nsw i32 %and1, 72525 %temp4 = or disjoint i32 %in2, %temp2526 %out = or disjoint i32 %temp3, %temp4527 ret i32 %out528}529 530define i32 @unrelated_ops4(i32 %in, i32 %in2, i32 %in3) {531; CHECK-LABEL: @unrelated_ops4(532; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[IN:%.*]], 12533; CHECK-NEXT: [[TMP3:%.*]] = mul nuw nsw i32 [[TMP2]], 72534; CHECK-NEXT: [[TEMP3:%.*]] = or disjoint i32 [[IN4:%.*]], [[TMP3]]535; CHECK-NEXT: [[AND1:%.*]] = and i32 [[IN]], 2536; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND1]], 0537; CHECK-NEXT: [[IN3:%.*]] = select i1 [[CMP]], i32 0, i32 144538; CHECK-NEXT: [[TMP4:%.*]] = or disjoint i32 [[IN3]], [[IN2:%.*]]539; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TEMP3]], [[TMP4]]540; CHECK-NEXT: ret i32 [[OUT]]541;542 %and0 = and i32 %in, 12543 %temp = mul nuw nsw i32 %and0, 72544 %temp3 = or disjoint i32 %in2, %temp545 %and1 = and i32 %in, 2546 %cmp = icmp eq i32 %and1, 0547 %temp2 = select i1 %cmp, i32 0, i32 144548 %temp4 = or disjoint i32 %temp2, %in3549 %out = or disjoint i32 %temp3, %temp4550 ret i32 %out551}552 553define i32 @unrelated_ops5(i32 %in, i32 %in2, i32 %in3) {554; CHECK-LABEL: @unrelated_ops5(555; CHECK-NEXT: [[AND0:%.*]] = and i32 [[IN:%.*]], 2556; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND0]], 0557; CHECK-NEXT: [[IN3:%.*]] = select i1 [[CMP]], i32 0, i32 144558; CHECK-NEXT: [[TMP4:%.*]] = or disjoint i32 [[IN3]], [[IN2:%.*]]559; CHECK-NEXT: [[AND1:%.*]] = and i32 [[IN]], 4560; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[AND1]], 0561; CHECK-NEXT: [[TEMP2:%.*]] = select i1 [[CMP2]], i32 0, i32 288562; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i32 [[IN4:%.*]], [[TEMP2]]563; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP4]], [[TMP3]]564; CHECK-NEXT: ret i32 [[OUT]]565;566 %and0 = and i32 %in, 2567 %cmp = icmp eq i32 %and0, 0568 %temp = select i1 %cmp, i32 0, i32 144569 %temp3 = or disjoint i32 %temp, %in3570 %and1 = and i32 %in, 4571 %cmp2 = icmp eq i32 %and1, 0572 %temp2 = select i1 %cmp2, i32 0, i32 288573 %temp4 = or disjoint i32 %in2, %temp2574 %out = or disjoint i32 %temp3, %temp4575 ret i32 %out576}577 578define i32 @unrelated_ops6(i32 %in, i32 %in2, i32 %in3) {579; CHECK-LABEL: @unrelated_ops6(580; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 3581; CHECK-NEXT: [[TMP2:%.*]] = mul nuw nsw i32 [[TMP1]], 72582; CHECK-NEXT: [[TEMP3:%.*]] = or disjoint i32 [[IN4:%.*]], [[TMP2]]583; CHECK-NEXT: [[AND1:%.*]] = and i32 [[IN]], 12584; CHECK-NEXT: [[IN2:%.*]] = mul nuw nsw i32 [[AND1]], 72585; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i32 [[IN3:%.*]], [[IN2]]586; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TEMP3]], [[TMP3]]587; CHECK-NEXT: ret i32 [[OUT]]588;589 %and0 = and i32 %in, 3590 %temp = mul nuw nsw i32 %and0, 72591 %temp3 = or disjoint i32 %in3, %temp592 %and1 = and i32 %in, 12593 %temp2 = mul nuw nsw i32 %and1, 72594 %temp4 = or disjoint i32 %in2, %temp2595 %out = or disjoint i32 %temp3, %temp4596 ret i32 %out597}598 599define i32 @unrelated_ops7(i32 %in, i32 %in2, i32 %in3) {600; CHECK-LABEL: @unrelated_ops7(601; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 3602; CHECK-NEXT: [[TMP2:%.*]] = mul nuw nsw i32 [[TMP1]], 72603; CHECK-NEXT: [[TEMP3:%.*]] = or disjoint i32 [[IN4:%.*]], [[TMP2]]604; CHECK-NEXT: [[AND1:%.*]] = and i32 [[IN]], 12605; CHECK-NEXT: [[IN3:%.*]] = mul nuw nsw i32 [[AND1]], 72606; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i32 [[IN3]], [[IN2:%.*]]607; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TEMP3]], [[TMP3]]608; CHECK-NEXT: ret i32 [[OUT]]609;610 %and0 = and i32 %in, 3611 %temp = mul nuw nsw i32 %and0, 72612 %temp3 = or disjoint i32 %in3, %temp613 %and1 = and i32 %in, 12614 %temp2 = mul nuw nsw i32 %and1, 72615 %temp4 = or disjoint i32 %temp2, %in2616 %out = or disjoint i32 %temp3, %temp4617 ret i32 %out618}619 620define i32 @unrelated_ops8(i32 %in, i32 %in2, i32 %in3) {621; CHECK-LABEL: @unrelated_ops8(622; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 3623; CHECK-NEXT: [[TMP2:%.*]] = mul nuw nsw i32 [[TMP1]], 72624; CHECK-NEXT: [[TEMP3:%.*]] = or disjoint i32 [[TMP2]], [[IN4:%.*]]625; CHECK-NEXT: [[AND1:%.*]] = and i32 [[IN]], 12626; CHECK-NEXT: [[IN3:%.*]] = mul nuw nsw i32 [[AND1]], 72627; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i32 [[IN3]], [[IN2:%.*]]628; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TEMP3]], [[TMP3]]629; CHECK-NEXT: ret i32 [[OUT]]630;631 %and0 = and i32 %in, 3632 %temp = mul nuw nsw i32 %and0, 72633 %temp3 = or disjoint i32 %temp, %in3634 %and1 = and i32 %in, 12635 %temp2 = mul nuw nsw i32 %and1, 72636 %temp4 = or disjoint i32 %temp2, %in2637 %out = or disjoint i32 %temp3, %temp4638 ret i32 %out639}640 641define i32 @unrelated_ops_nocombine(i32 %in, i32 %in2, i32 %in3) {642; CHECK-LABEL: @unrelated_ops_nocombine(643; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 3644; CHECK-NEXT: [[TEMP:%.*]] = mul nuw nsw i32 [[TMP1]], 72645; CHECK-NEXT: [[TMP4:%.*]] = or disjoint i32 [[TEMP]], [[IN3:%.*]]646; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[IN]], 7647; CHECK-NEXT: [[TEMP2:%.*]] = mul nuw nsw i32 [[TMP2]], 72648; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i32 [[IN2:%.*]], [[TEMP2]]649; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP4]], [[TMP3]]650; CHECK-NEXT: ret i32 [[OUT]]651;652 %and0 = and i32 %in, 3653 %temp = mul nuw nsw i32 %and0, 72654 %temp3 = or disjoint i32 %temp, %in3655 %and1 = and i32 %in, 7656 %temp2 = mul nuw nsw i32 %and1, 72657 %temp4 = or disjoint i32 %in2, %temp2658 %out = or disjoint i32 %temp3, %temp4659 ret i32 %out660}661 662define i32 @unrelated_ops_nocombine1(i32 %in, i32 %in2, i32 %in3) {663; CHECK-LABEL: @unrelated_ops_nocombine1(664; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 3665; CHECK-NEXT: [[TEMP:%.*]] = mul nuw nsw i32 [[TMP1]], 72666; CHECK-NEXT: [[TMP4:%.*]] = or disjoint i32 [[TEMP]], [[IN3:%.*]]667; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[IN]], 12668; CHECK-NEXT: [[TEMP2:%.*]] = mul nuw nsw i32 [[TMP2]], 36669; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i32 [[IN2:%.*]], [[TEMP2]]670; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP4]], [[TMP3]]671; CHECK-NEXT: ret i32 [[OUT]]672;673 %and0 = and i32 %in, 3674 %temp = mul nuw nsw i32 %and0, 72675 %temp3 = or disjoint i32 %temp, %in3676 %and1 = and i32 %in, 12677 %temp2 = mul nuw nsw i32 %and1, 36678 %temp4 = or disjoint i32 %in2, %temp2679 %out = or disjoint i32 %temp3, %temp4680 ret i32 %out681}682 683define i32 @unrelated_nondisjoint(i32 %in, i32 %in2) {684; CHECK-LABEL: @unrelated_nondisjoint(685; CHECK-NEXT: [[AND0:%.*]] = and i32 [[IN:%.*]], 3686; CHECK-NEXT: [[TEMP:%.*]] = mul nuw nsw i32 [[AND0]], 72687; CHECK-NEXT: [[AND1:%.*]] = and i32 [[IN]], 12688; CHECK-NEXT: [[TEMP2:%.*]] = mul nuw nsw i32 [[AND1]], 72689; CHECK-NEXT: [[TEMP3:%.*]] = or disjoint i32 [[IN2:%.*]], [[TEMP]]690; CHECK-NEXT: [[OUT:%.*]] = or i32 [[TEMP3]], [[TEMP2]]691; CHECK-NEXT: ret i32 [[OUT]]692;693 %and0 = and i32 %in, 3694 %temp = mul nuw nsw i32 %and0, 72695 %and1 = and i32 %in, 12696 %temp2 = mul nuw nsw i32 %and1, 72697 %temp3 = or disjoint i32 %in2, %temp698 %out = or i32 %temp3, %temp2699 ret i32 %out700}701 702define i32 @unrelated_nondisjoint1(i32 %in, i32 %in2) {703; CHECK-LABEL: @unrelated_nondisjoint1(704; CHECK-NEXT: [[AND0:%.*]] = and i32 [[IN:%.*]], 3705; CHECK-NEXT: [[TEMP:%.*]] = mul nuw nsw i32 [[AND0]], 72706; CHECK-NEXT: [[AND1:%.*]] = and i32 [[IN]], 12707; CHECK-NEXT: [[TEMP2:%.*]] = mul nuw nsw i32 [[AND1]], 72708; CHECK-NEXT: [[TEMP3:%.*]] = or i32 [[IN2:%.*]], [[TEMP]]709; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TEMP3]], [[TEMP2]]710; CHECK-NEXT: ret i32 [[OUT]]711;712 %and0 = and i32 %in, 3713 %temp = mul nuw nsw i32 %and0, 72714 %and1 = and i32 %in, 12715 %temp2 = mul nuw nsw i32 %and1, 72716 %temp3 = or i32 %in2, %temp717 %out = or disjoint i32 %temp3, %temp2718 ret i32 %out719}720 721declare void @use(i32)722 723define i32 @multi_use(i32 %in, i32 %in2) {724; CHECK-LABEL: @multi_use(725; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 15726; CHECK-NEXT: [[TMP2:%.*]] = mul nuw nsw i32 [[TMP1]], 72727; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP2]], [[IN2:%.*]]728; CHECK-NEXT: call void @use(i32 [[OUT]])729; CHECK-NEXT: ret i32 [[OUT]]730;731 %and0 = and i32 %in, 3732 %temp = mul nuw nsw i32 %and0, 72733 %and1 = and i32 %in, 12734 %temp2 = mul nuw nsw i32 %and1, 72735 %temp3 = or disjoint i32 %in2, %temp736 %out = or disjoint i32 %temp3, %temp2737 call void @use(i32 %out)738 ret i32 %out739}740 741define i32 @multi_use1(i32 %in, i32 %in2) {742; CHECK-LABEL: @multi_use1(743; CHECK-NEXT: [[AND0:%.*]] = and i32 [[IN:%.*]], 3744; CHECK-NEXT: [[TEMP:%.*]] = mul nuw nsw i32 [[AND0]], 72745; CHECK-NEXT: [[AND1:%.*]] = and i32 [[IN]], 12746; CHECK-NEXT: [[TEMP2:%.*]] = mul nuw nsw i32 [[AND1]], 72747; CHECK-NEXT: [[TEMP3:%.*]] = or disjoint i32 [[IN2:%.*]], [[TEMP]]748; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TEMP3]], [[TEMP2]]749; CHECK-NEXT: call void @use(i32 [[TEMP3]])750; CHECK-NEXT: ret i32 [[OUT]]751;752 %and0 = and i32 %in, 3753 %temp = mul nuw nsw i32 %and0, 72754 %and1 = and i32 %in, 12755 %temp2 = mul nuw nsw i32 %and1, 72756 %temp3 = or disjoint i32 %in2, %temp757 %out = or disjoint i32 %temp3, %temp2758 call void @use(i32 %temp3)759 ret i32 %out760}761 762define i32 @multi_use2(i32 %in, i32 %in2) {763; CHECK-LABEL: @multi_use2(764; CHECK-NEXT: [[AND0:%.*]] = and i32 [[IN:%.*]], 3765; CHECK-NEXT: [[TEMP:%.*]] = mul nuw nsw i32 [[AND0]], 72766; CHECK-NEXT: [[AND1:%.*]] = and i32 [[IN]], 12767; CHECK-NEXT: [[TEMP2:%.*]] = mul nuw nsw i32 [[AND1]], 72768; CHECK-NEXT: [[TEMP3:%.*]] = or disjoint i32 [[IN2:%.*]], [[TEMP]]769; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TEMP3]], [[TEMP2]]770; CHECK-NEXT: call void @use(i32 [[TEMP3]])771; CHECK-NEXT: ret i32 [[OUT]]772;773 %and0 = and i32 %in, 3774 %temp = mul nuw nsw i32 %and0, 72775 %and1 = and i32 %in, 12776 %temp2 = mul nuw nsw i32 %and1, 72777 %temp3 = or disjoint i32 %in2, %temp778 %out = or disjoint i32 %temp3, %temp2779 call void @use(i32 %temp3)780 ret i32 %out781}782 783define i32 @multi_use3(i32 %in, i32 %in2) {784; CHECK-LABEL: @multi_use3(785; CHECK-NEXT: [[AND1:%.*]] = and i32 [[IN:%.*]], 12786; CHECK-NEXT: [[TEMP2:%.*]] = mul nuw nsw i32 [[AND1]], 72787; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN]], 15788; CHECK-NEXT: [[TMP2:%.*]] = mul nuw nsw i32 [[TMP1]], 72789; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP2]], [[IN2:%.*]]790; CHECK-NEXT: call void @use(i32 [[TEMP2]])791; CHECK-NEXT: ret i32 [[OUT]]792;793 %and0 = and i32 %in, 3794 %temp = mul nuw nsw i32 %and0, 72795 %and1 = and i32 %in, 12796 %temp2 = mul nuw nsw i32 %and1, 72797 %temp3 = or disjoint i32 %in2, %temp798 %out = or disjoint i32 %temp3, %temp2799 call void @use(i32 %temp2)800 ret i32 %out801}802 803define i32 @multi_use4(i32 %in, i32 %in2) {804; CHECK-LABEL: @multi_use4(805; CHECK-NEXT: [[AND0:%.*]] = and i32 [[IN:%.*]], 3806; CHECK-NEXT: [[TEMP:%.*]] = mul nuw nsw i32 [[AND0]], 72807; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN]], 15808; CHECK-NEXT: [[TMP2:%.*]] = mul nuw nsw i32 [[TMP1]], 72809; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP2]], [[IN2:%.*]]810; CHECK-NEXT: call void @use(i32 [[TEMP]])811; CHECK-NEXT: ret i32 [[OUT]]812;813 %and0 = and i32 %in, 3814 %temp = mul nuw nsw i32 %and0, 72815 %and1 = and i32 %in, 12816 %temp2 = mul nuw nsw i32 %and1, 72817 %temp3 = or disjoint i32 %in2, %temp818 %out = or disjoint i32 %temp3, %temp2819 call void @use(i32 %temp)820 ret i32 %out821}822 823define i32 @multi_use5(i32 %in, i32 %in2) {824; CHECK-LABEL: @multi_use5(825; CHECK-NEXT: [[AND1:%.*]] = and i32 [[IN:%.*]], 12826; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN]], 15827; CHECK-NEXT: [[TMP2:%.*]] = mul nuw nsw i32 [[TMP1]], 72828; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP2]], [[IN2:%.*]]829; CHECK-NEXT: call void @use(i32 [[AND1]])830; CHECK-NEXT: ret i32 [[OUT]]831;832 %and0 = and i32 %in, 3833 %temp = mul nuw nsw i32 %and0, 72834 %and1 = and i32 %in, 12835 %temp2 = mul nuw nsw i32 %and1, 72836 %temp3 = or disjoint i32 %in2, %temp837 %out = or disjoint i32 %temp3, %temp2838 call void @use(i32 %and1)839 ret i32 %out840}841 842define i32 @multi_use6(i32 %in, i32 %in2) {843; CHECK-LABEL: @multi_use6(844; CHECK-NEXT: [[AND0:%.*]] = and i32 [[IN:%.*]], 3845; CHECK-NEXT: [[TEMP:%.*]] = mul nuw nsw i32 [[AND0]], 72846; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN]], 15847; CHECK-NEXT: [[TMP2:%.*]] = mul nuw nsw i32 [[TMP1]], 72848; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP2]], [[IN2:%.*]]849; CHECK-NEXT: call void @use(i32 [[TEMP]])850; CHECK-NEXT: ret i32 [[OUT]]851;852 %and0 = and i32 %in, 3853 %temp = mul nuw nsw i32 %and0, 72854 %and1 = and i32 %in, 12855 %temp2 = mul nuw nsw i32 %and1, 72856 %temp3 = or disjoint i32 %in2, %temp857 %out = or disjoint i32 %temp3, %temp2858 call void @use(i32 %temp)859 ret i32 %out860}861 862define i32 @multi_use7(i32 %in, i32 %in2) {863; CHECK-LABEL: @multi_use7(864; CHECK-NEXT: [[AND0:%.*]] = and i32 [[IN:%.*]], 3865; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN]], 15866; CHECK-NEXT: [[TMP2:%.*]] = mul nuw nsw i32 [[TMP1]], 72867; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP2]], [[IN2:%.*]]868; CHECK-NEXT: call void @use(i32 [[AND0]])869; CHECK-NEXT: ret i32 [[OUT]]870;871 %and0 = and i32 %in, 3872 %temp = mul nuw nsw i32 %and0, 72873 %and1 = and i32 %in, 12874 %temp2 = mul nuw nsw i32 %and1, 72875 %temp3 = or disjoint i32 %in2, %temp876 %out = or disjoint i32 %temp3, %temp2877 call void @use(i32 %and0)878 ret i32 %out879}880 881define i32 @no_chain(i32 %in, i32 %in2, i32 %in3) {882; CHECK-LABEL: @no_chain(883; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 3884; CHECK-NEXT: [[TEMP:%.*]] = mul nuw nsw i32 [[TMP1]], 72885; CHECK-NEXT: [[TEMP3:%.*]] = or disjoint i32 [[TEMP]], [[IN3:%.*]]886; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TEMP3]], [[IN2:%.*]]887; CHECK-NEXT: ret i32 [[OUT]]888;889 %and0 = and i32 %in, 3890 %temp = mul nuw nsw i32 %and0, 72891 %temp3 = or disjoint i32 %temp, %in3892 %out = or disjoint i32 %temp3, %in2893 ret i32 %out894}895 896;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:897; CONSTSPLAT: {{.*}}898; CONSTVEC: {{.*}}899