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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4; If we have some pattern that leaves only some low bits set, and then performs5; left-shift of those bits, we can combine those two shifts into a shift+mask.6 7; There are many variants to this pattern:8; a) (trunc (x & ((1 << maskNbits) - 1))) << shiftNbits9; simplify to:10; ((trunc(x)) << shiftNbits) & (~(-1 << (maskNbits+shiftNbits)))11 12; Simple tests.13 14declare void @use32(i32)15declare void @use64(i64)16 17define i32 @t0_basic(i64 %x, i32 %nbits) {18; CHECK-LABEL: @t0_basic(19; CHECK-NEXT: [[T0:%.*]] = add i32 [[NBITS:%.*]], -120; CHECK-NEXT: [[T1:%.*]] = zext i32 [[T0]] to i6421; CHECK-NEXT: [[T2:%.*]] = shl nuw i64 1, [[T1]]22; CHECK-NEXT: [[T3:%.*]] = add i64 [[T2]], -123; CHECK-NEXT: [[T4:%.*]] = sub i32 32, [[NBITS]]24; CHECK-NEXT: call void @use32(i32 [[T0]])25; CHECK-NEXT: call void @use64(i64 [[T1]])26; CHECK-NEXT: call void @use64(i64 [[T2]])27; CHECK-NEXT: call void @use64(i64 [[T3]])28; CHECK-NEXT: call void @use32(i32 [[T4]])29; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[X:%.*]] to i3230; CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP1]], [[T4]]31; CHECK-NEXT: [[T7:%.*]] = and i32 [[TMP2]], 214748364732; CHECK-NEXT: ret i32 [[T7]]33;34 %t0 = add i32 %nbits, -135 %t1 = zext i32 %t0 to i6436 %t2 = shl i64 1, %t1 ; shifting by nbits-137 %t3 = add i64 %t2, -138 %t4 = sub i32 32, %nbits39 40 call void @use32(i32 %t0)41 call void @use64(i64 %t1)42 call void @use64(i64 %t2)43 call void @use64(i64 %t3)44 call void @use32(i32 %t4)45 46 %t5 = and i64 %t3, %x47 %t6 = trunc i64 %t5 to i3248 %t7 = shl i32 %t6, %t449 ret i32 %t750}51 52; Vectors53 54declare void @use8xi32(<8 x i32>)55declare void @use8xi64(<8 x i64>)56 57define <8 x i32> @t1_vec_splat(<8 x i64> %x, <8 x i32> %nbits) {58; CHECK-LABEL: @t1_vec_splat(59; CHECK-NEXT: [[T0:%.*]] = add <8 x i32> [[NBITS:%.*]], splat (i32 -1)60; CHECK-NEXT: [[T1:%.*]] = zext <8 x i32> [[T0]] to <8 x i64>61; CHECK-NEXT: [[T2:%.*]] = shl nuw <8 x i64> splat (i64 1), [[T1]]62; CHECK-NEXT: [[T3:%.*]] = add <8 x i64> [[T2]], splat (i64 -1)63; CHECK-NEXT: [[T4:%.*]] = sub <8 x i32> splat (i32 32), [[NBITS]]64; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T0]])65; CHECK-NEXT: call void @use8xi64(<8 x i64> [[T1]])66; CHECK-NEXT: call void @use8xi64(<8 x i64> [[T2]])67; CHECK-NEXT: call void @use8xi64(<8 x i64> [[T3]])68; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T4]])69; CHECK-NEXT: [[TMP1:%.*]] = trunc <8 x i64> [[X:%.*]] to <8 x i32>70; CHECK-NEXT: [[TMP2:%.*]] = shl <8 x i32> [[TMP1]], [[T4]]71; CHECK-NEXT: [[T7:%.*]] = and <8 x i32> [[TMP2]], splat (i32 2147483647)72; CHECK-NEXT: ret <8 x i32> [[T7]]73;74 %t0 = add <8 x i32> %nbits, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>75 %t1 = zext <8 x i32> %t0 to <8 x i64>76 %t2 = shl <8 x i64> <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>, %t1 ; shifting by nbits-177 %t3 = add <8 x i64> %t2, <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1>78 %t4 = sub <8 x i32> <i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32>, %nbits79 80 call void @use8xi32(<8 x i32> %t0)81 call void @use8xi64(<8 x i64> %t1)82 call void @use8xi64(<8 x i64> %t2)83 call void @use8xi64(<8 x i64> %t3)84 call void @use8xi32(<8 x i32> %t4)85 86 %t5 = and <8 x i64> %t3, %x87 %t6 = trunc <8 x i64> %t5 to <8 x i32>88 %t7 = shl <8 x i32> %t6, %t489 ret <8 x i32> %t790}91 92define <8 x i32> @t2_vec_splat_poison(<8 x i64> %x, <8 x i32> %nbits) {93; CHECK-LABEL: @t2_vec_splat_poison(94; CHECK-NEXT: [[T0:%.*]] = add <8 x i32> [[NBITS:%.*]], <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 poison, i32 -1>95; CHECK-NEXT: [[T1:%.*]] = zext <8 x i32> [[T0]] to <8 x i64>96; CHECK-NEXT: [[T2:%.*]] = shl nuw <8 x i64> <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 poison, i64 1>, [[T1]]97; CHECK-NEXT: [[T3:%.*]] = add <8 x i64> [[T2]], <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 poison, i64 -1>98; CHECK-NEXT: [[T4:%.*]] = sub <8 x i32> <i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 poison, i32 32>, [[NBITS]]99; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T0]])100; CHECK-NEXT: call void @use8xi64(<8 x i64> [[T1]])101; CHECK-NEXT: call void @use8xi64(<8 x i64> [[T2]])102; CHECK-NEXT: call void @use8xi64(<8 x i64> [[T3]])103; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T4]])104; CHECK-NEXT: [[TMP1:%.*]] = trunc <8 x i64> [[X:%.*]] to <8 x i32>105; CHECK-NEXT: [[TMP2:%.*]] = shl <8 x i32> [[TMP1]], [[T4]]106; CHECK-NEXT: [[T7:%.*]] = and <8 x i32> [[TMP2]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 poison, i32 2147483647>107; CHECK-NEXT: ret <8 x i32> [[T7]]108;109 %t0 = add <8 x i32> %nbits, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 poison, i32 -1>110 %t1 = zext <8 x i32> %t0 to <8 x i64>111 %t2 = shl <8 x i64> <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 poison, i64 1>, %t1 ; shifting by nbits-1112 %t3 = add <8 x i64> %t2, <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 poison, i64 -1>113 %t4 = sub <8 x i32> <i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 poison, i32 32>, %nbits114 115 call void @use8xi32(<8 x i32> %t0)116 call void @use8xi64(<8 x i64> %t1)117 call void @use8xi64(<8 x i64> %t2)118 call void @use8xi64(<8 x i64> %t3)119 call void @use8xi32(<8 x i32> %t4)120 121 %t5 = and <8 x i64> %t3, %x122 %t6 = trunc <8 x i64> %t5 to <8 x i32>123 %t7 = shl <8 x i32> %t6, %t4124 ret <8 x i32> %t7125}126 127define <8 x i32> @t3_vec_nonsplat(<8 x i64> %x, <8 x i32> %nbits) {128; CHECK-LABEL: @t3_vec_nonsplat(129; CHECK-NEXT: [[T0:%.*]] = add <8 x i32> [[NBITS:%.*]], <i32 -33, i32 -32, i32 -31, i32 -1, i32 0, i32 1, i32 31, i32 32>130; CHECK-NEXT: [[T1:%.*]] = zext <8 x i32> [[T0]] to <8 x i64>131; CHECK-NEXT: [[T2:%.*]] = shl nuw <8 x i64> splat (i64 1), [[T1]]132; CHECK-NEXT: [[T3:%.*]] = add <8 x i64> [[T2]], splat (i64 -1)133; CHECK-NEXT: [[T4:%.*]] = sub <8 x i32> splat (i32 32), [[NBITS]]134; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T0]])135; CHECK-NEXT: call void @use8xi64(<8 x i64> [[T1]])136; CHECK-NEXT: call void @use8xi64(<8 x i64> [[T2]])137; CHECK-NEXT: call void @use8xi64(<8 x i64> [[T3]])138; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T4]])139; CHECK-NEXT: [[TMP1:%.*]] = trunc <8 x i64> [[X:%.*]] to <8 x i32>140; CHECK-NEXT: [[TMP2:%.*]] = shl <8 x i32> [[TMP1]], [[T4]]141; CHECK-NEXT: [[T7:%.*]] = and <8 x i32> [[TMP2]], <i32 poison, i32 0, i32 1, i32 2147483647, i32 -1, i32 -1, i32 -1, i32 -1>142; CHECK-NEXT: ret <8 x i32> [[T7]]143;144 %t0 = add <8 x i32> %nbits, <i32 -33, i32 -32, i32 -31, i32 -1, i32 0, i32 1, i32 31, i32 32>145 %t1 = zext <8 x i32> %t0 to <8 x i64>146 %t2 = shl <8 x i64> <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>, %t1 ; shifting by nbits-1147 %t3 = add <8 x i64> %t2, <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1>148 %t4 = sub <8 x i32> <i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32>, %nbits149 150 call void @use8xi32(<8 x i32> %t0)151 call void @use8xi64(<8 x i64> %t1)152 call void @use8xi64(<8 x i64> %t2)153 call void @use8xi64(<8 x i64> %t3)154 call void @use8xi32(<8 x i32> %t4)155 156 %t5 = and <8 x i64> %t3, %x157 %t6 = trunc <8 x i64> %t5 to <8 x i32>158 %t7 = shl <8 x i32> %t6, %t4159 ret <8 x i32> %t7160}161 162; Extra uses163 164define i32 @n4_extrause0(i64 %x, i32 %nbits) {165; CHECK-LABEL: @n4_extrause0(166; CHECK-NEXT: [[T0:%.*]] = add i32 [[NBITS:%.*]], -1167; CHECK-NEXT: [[T1:%.*]] = zext i32 [[T0]] to i64168; CHECK-NEXT: [[T2:%.*]] = shl nuw i64 1, [[T1]]169; CHECK-NEXT: [[T3:%.*]] = add i64 [[T2]], -1170; CHECK-NEXT: [[T4:%.*]] = sub i32 32, [[NBITS]]171; CHECK-NEXT: call void @use32(i32 [[T0]])172; CHECK-NEXT: call void @use64(i64 [[T1]])173; CHECK-NEXT: call void @use64(i64 [[T2]])174; CHECK-NEXT: call void @use64(i64 [[T3]])175; CHECK-NEXT: call void @use32(i32 [[T4]])176; CHECK-NEXT: [[T5:%.*]] = and i64 [[T3]], [[X:%.*]]177; CHECK-NEXT: call void @use64(i64 [[T5]])178; CHECK-NEXT: [[T6:%.*]] = trunc i64 [[T5]] to i32179; CHECK-NEXT: [[T7:%.*]] = shl i32 [[T6]], [[T4]]180; CHECK-NEXT: ret i32 [[T7]]181;182 %t0 = add i32 %nbits, -1183 %t1 = zext i32 %t0 to i64184 %t2 = shl i64 1, %t1 ; shifting by nbits-1185 %t3 = add i64 %t2, -1186 %t4 = sub i32 32, %nbits187 188 call void @use32(i32 %t0)189 call void @use64(i64 %t1)190 call void @use64(i64 %t2)191 call void @use64(i64 %t3)192 call void @use32(i32 %t4)193 194 %t5 = and i64 %t3, %x195 call void @use64(i64 %t5)196 %t6 = trunc i64 %t5 to i32197 %t7 = shl i32 %t6, %t4198 ret i32 %t7199}200define i32 @n5_extrause1(i64 %x, i32 %nbits) {201; CHECK-LABEL: @n5_extrause1(202; CHECK-NEXT: [[T0:%.*]] = add i32 [[NBITS:%.*]], -1203; CHECK-NEXT: [[T1:%.*]] = zext i32 [[T0]] to i64204; CHECK-NEXT: [[T2:%.*]] = shl nuw i64 1, [[T1]]205; CHECK-NEXT: [[T3:%.*]] = add i64 [[T2]], -1206; CHECK-NEXT: [[T4:%.*]] = sub i32 32, [[NBITS]]207; CHECK-NEXT: call void @use32(i32 [[T0]])208; CHECK-NEXT: call void @use64(i64 [[T1]])209; CHECK-NEXT: call void @use64(i64 [[T2]])210; CHECK-NEXT: call void @use64(i64 [[T3]])211; CHECK-NEXT: call void @use32(i32 [[T4]])212; CHECK-NEXT: [[T5:%.*]] = and i64 [[T3]], [[X:%.*]]213; CHECK-NEXT: [[T6:%.*]] = trunc i64 [[T5]] to i32214; CHECK-NEXT: call void @use32(i32 [[T6]])215; CHECK-NEXT: [[T7:%.*]] = shl i32 [[T6]], [[T4]]216; CHECK-NEXT: ret i32 [[T7]]217;218 %t0 = add i32 %nbits, -1219 %t1 = zext i32 %t0 to i64220 %t2 = shl i64 1, %t1 ; shifting by nbits-1221 %t3 = add i64 %t2, -1222 %t4 = sub i32 32, %nbits223 224 call void @use32(i32 %t0)225 call void @use64(i64 %t1)226 call void @use64(i64 %t2)227 call void @use64(i64 %t3)228 call void @use32(i32 %t4)229 230 %t5 = and i64 %t3, %x231 %t6 = trunc i64 %t5 to i32232 call void @use32(i32 %t6)233 %t7 = shl i32 %t6, %t4234 ret i32 %t7235}236define i32 @n6_extrause2(i64 %x, i32 %nbits) {237; CHECK-LABEL: @n6_extrause2(238; CHECK-NEXT: [[T0:%.*]] = add i32 [[NBITS:%.*]], -1239; CHECK-NEXT: [[T1:%.*]] = zext i32 [[T0]] to i64240; CHECK-NEXT: [[T2:%.*]] = shl nuw i64 1, [[T1]]241; CHECK-NEXT: [[T3:%.*]] = add i64 [[T2]], -1242; CHECK-NEXT: [[T4:%.*]] = sub i32 32, [[NBITS]]243; CHECK-NEXT: call void @use32(i32 [[T0]])244; CHECK-NEXT: call void @use64(i64 [[T1]])245; CHECK-NEXT: call void @use64(i64 [[T2]])246; CHECK-NEXT: call void @use64(i64 [[T3]])247; CHECK-NEXT: call void @use32(i32 [[T4]])248; CHECK-NEXT: [[T5:%.*]] = and i64 [[T3]], [[X:%.*]]249; CHECK-NEXT: call void @use64(i64 [[T5]])250; CHECK-NEXT: [[T6:%.*]] = trunc i64 [[T5]] to i32251; CHECK-NEXT: call void @use32(i32 [[T6]])252; CHECK-NEXT: [[T7:%.*]] = shl i32 [[T6]], [[T4]]253; CHECK-NEXT: ret i32 [[T7]]254;255 %t0 = add i32 %nbits, -1256 %t1 = zext i32 %t0 to i64257 %t2 = shl i64 1, %t1 ; shifting by nbits-1258 %t3 = add i64 %t2, -1259 %t4 = sub i32 32, %nbits260 261 call void @use32(i32 %t0)262 call void @use64(i64 %t1)263 call void @use64(i64 %t2)264 call void @use64(i64 %t3)265 call void @use32(i32 %t4)266 267 %t5 = and i64 %t3, %x268 call void @use64(i64 %t5)269 %t6 = trunc i64 %t5 to i32270 call void @use32(i32 %t6)271 %t7 = shl i32 %t6, %t4272 ret i32 %t7273}274