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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4; If we have some pattern that leaves only some low bits set, lshr then performs5; left-shift of those bits, we can combine those two shifts into a shift+mask.6 7; There are many variants to this pattern:8; e) (trunc (((x << maskNbits) l>> maskNbits))) << shiftNbits9; simplify to:10; ((trunc(x)) << shiftNbits) & (-1 >> ((-(maskNbits+shiftNbits))+32))11 12; Simple tests.13 14declare void @use32(i32)15declare void @use64(i64)16 17define i32 @t0_basic(i64 %x, i32 %nbits) {18; CHECK-LABEL: @t0_basic(19; CHECK-NEXT: [[T0:%.*]] = zext i32 [[NBITS:%.*]] to i6420; CHECK-NEXT: [[T1:%.*]] = shl i64 [[X:%.*]], [[T0]]21; CHECK-NEXT: [[T2:%.*]] = add i32 [[NBITS]], -3322; CHECK-NEXT: call void @use64(i64 [[T0]])23; CHECK-NEXT: call void @use64(i64 [[T1]])24; CHECK-NEXT: call void @use32(i32 [[T2]])25; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[X]] to i3226; CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP1]], [[T2]]27; CHECK-NEXT: [[T5:%.*]] = and i32 [[TMP2]], 214748364728; CHECK-NEXT: ret i32 [[T5]]29;30 %t0 = zext i32 %nbits to i6431 %t1 = shl i64 %x, %t032 %t2 = add i32 %nbits, -3333 34 call void @use64(i64 %t0)35 call void @use64(i64 %t1)36 call void @use32(i32 %t2)37 38 %t3 = lshr i64 %t1, %t039 %t4 = trunc i64 %t3 to i3240 %t5 = shl i32 %t4, %t2 ; shift is smaller than mask41 ret i32 %t542}43 44; Vectors45 46declare void @use8xi32(<8 x i32>)47declare void @use8xi64(<8 x i64>)48 49define <8 x i32> @t1_vec_splat(<8 x i64> %x, <8 x i32> %nbits) {50; CHECK-LABEL: @t1_vec_splat(51; CHECK-NEXT: [[T0:%.*]] = zext <8 x i32> [[NBITS:%.*]] to <8 x i64>52; CHECK-NEXT: [[T1:%.*]] = shl <8 x i64> [[X:%.*]], [[T0]]53; CHECK-NEXT: [[T2:%.*]] = add <8 x i32> [[NBITS]], splat (i32 -33)54; CHECK-NEXT: call void @use8xi64(<8 x i64> [[T0]])55; CHECK-NEXT: call void @use8xi64(<8 x i64> [[T1]])56; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T2]])57; CHECK-NEXT: [[TMP1:%.*]] = trunc <8 x i64> [[X]] to <8 x i32>58; CHECK-NEXT: [[TMP2:%.*]] = shl <8 x i32> [[TMP1]], [[T2]]59; CHECK-NEXT: [[T5:%.*]] = and <8 x i32> [[TMP2]], splat (i32 2147483647)60; CHECK-NEXT: ret <8 x i32> [[T5]]61;62 %t0 = zext <8 x i32> %nbits to <8 x i64>63 %t1 = shl <8 x i64> %x, %t064 %t2 = add <8 x i32> %nbits, <i32 -33, i32 -33, i32 -33, i32 -33, i32 -33, i32 -33, i32 -33, i32 -33>65 66 call void @use8xi64(<8 x i64> %t0)67 call void @use8xi64(<8 x i64> %t1)68 call void @use8xi32(<8 x i32> %t2)69 70 %t3 = lshr <8 x i64> %t1, %t071 %t4 = trunc <8 x i64> %t3 to <8 x i32>72 %t5 = shl <8 x i32> %t4, %t2 ; shift is smaller than mask73 ret <8 x i32> %t574}75 76define <8 x i32> @t2_vec_splat_undef(<8 x i64> %x, <8 x i32> %nbits) {77; CHECK-LABEL: @t2_vec_splat_undef(78; CHECK-NEXT: [[T0:%.*]] = zext <8 x i32> [[NBITS:%.*]] to <8 x i64>79; CHECK-NEXT: [[T1:%.*]] = shl <8 x i64> [[X:%.*]], [[T0]]80; CHECK-NEXT: [[T2:%.*]] = add <8 x i32> [[NBITS]], <i32 -33, i32 -33, i32 -33, i32 -33, i32 -33, i32 -33, i32 undef, i32 -33>81; CHECK-NEXT: call void @use8xi64(<8 x i64> [[T0]])82; CHECK-NEXT: call void @use8xi64(<8 x i64> [[T1]])83; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T2]])84; CHECK-NEXT: [[TMP1:%.*]] = trunc <8 x i64> [[X]] to <8 x i32>85; CHECK-NEXT: [[TMP2:%.*]] = shl <8 x i32> [[TMP1]], [[T2]]86; CHECK-NEXT: [[T5:%.*]] = and <8 x i32> [[TMP2]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 poison, i32 2147483647>87; CHECK-NEXT: ret <8 x i32> [[T5]]88;89 %t0 = zext <8 x i32> %nbits to <8 x i64>90 %t1 = shl <8 x i64> %x, %t091 %t2 = add <8 x i32> %nbits, <i32 -33, i32 -33, i32 -33, i32 -33, i32 -33, i32 -33, i32 undef, i32 -33>92 93 call void @use8xi64(<8 x i64> %t0)94 call void @use8xi64(<8 x i64> %t1)95 call void @use8xi32(<8 x i32> %t2)96 97 %t3 = lshr <8 x i64> %t1, %t098 %t4 = trunc <8 x i64> %t3 to <8 x i32>99 %t5 = shl <8 x i32> %t4, %t2 ; shift is smaller than mask100 ret <8 x i32> %t5101}102 103define <8 x i32> @t3_vec_nonsplat(<8 x i64> %x, <8 x i32> %nbits) {104; CHECK-LABEL: @t3_vec_nonsplat(105; CHECK-NEXT: [[T0:%.*]] = zext <8 x i32> [[NBITS:%.*]] to <8 x i64>106; CHECK-NEXT: [[T1:%.*]] = shl <8 x i64> [[X:%.*]], [[T0]]107; CHECK-NEXT: [[T2:%.*]] = add <8 x i32> [[NBITS]], <i32 -64, i32 -63, i32 -33, i32 -32, i32 63, i32 64, i32 undef, i32 65>108; CHECK-NEXT: call void @use8xi64(<8 x i64> [[T0]])109; CHECK-NEXT: call void @use8xi64(<8 x i64> [[T1]])110; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T2]])111; CHECK-NEXT: [[TMP1:%.*]] = trunc <8 x i64> [[X]] to <8 x i32>112; CHECK-NEXT: [[TMP2:%.*]] = shl <8 x i32> [[TMP1]], [[T2]]113; CHECK-NEXT: [[T5:%.*]] = and <8 x i32> [[TMP2]], <i32 poison, i32 1, i32 2147483647, i32 -1, i32 -1, i32 -1, i32 poison, i32 poison>114; CHECK-NEXT: ret <8 x i32> [[T5]]115;116 %t0 = zext <8 x i32> %nbits to <8 x i64>117 %t1 = shl <8 x i64> %x, %t0118 %t2 = add <8 x i32> %nbits, <i32 -64, i32 -63, i32 -33, i32 -32, i32 63, i32 64, i32 undef, i32 65>119 120 call void @use8xi64(<8 x i64> %t0)121 call void @use8xi64(<8 x i64> %t1)122 call void @use8xi32(<8 x i32> %t2)123 124 %t3 = lshr <8 x i64> %t1, %t0125 %t4 = trunc <8 x i64> %t3 to <8 x i32>126 %t5 = shl <8 x i32> %t4, %t2 ; shift is smaller than mask127 ret <8 x i32> %t5128}129 130; Extra uses.131 132define i32 @n4_extrause0(i64 %x, i32 %nbits) {133; CHECK-LABEL: @n4_extrause0(134; CHECK-NEXT: [[T0:%.*]] = zext i32 [[NBITS:%.*]] to i64135; CHECK-NEXT: [[T1:%.*]] = shl i64 [[X:%.*]], [[T0]]136; CHECK-NEXT: [[T2:%.*]] = add i32 [[NBITS]], -33137; CHECK-NEXT: call void @use64(i64 [[T0]])138; CHECK-NEXT: call void @use64(i64 [[T1]])139; CHECK-NEXT: call void @use32(i32 [[T2]])140; CHECK-NEXT: [[T3:%.*]] = lshr exact i64 [[T1]], [[T0]]141; CHECK-NEXT: call void @use64(i64 [[T3]])142; CHECK-NEXT: [[T4:%.*]] = trunc i64 [[T3]] to i32143; CHECK-NEXT: [[T5:%.*]] = shl i32 [[T4]], [[T2]]144; CHECK-NEXT: ret i32 [[T5]]145;146 %t0 = zext i32 %nbits to i64147 %t1 = shl i64 %x, %t0148 %t2 = add i32 %nbits, -33149 150 call void @use64(i64 %t0)151 call void @use64(i64 %t1)152 call void @use32(i32 %t2)153 154 %t3 = lshr i64 %t1, %t0155 call void @use64(i64 %t3)156 %t4 = trunc i64 %t3 to i32157 %t5 = shl i32 %t4, %t2 ; shift is smaller than mask158 ret i32 %t5159}160 161define i32 @n5_extrause1(i64 %x, i32 %nbits) {162; CHECK-LABEL: @n5_extrause1(163; CHECK-NEXT: [[T0:%.*]] = zext i32 [[NBITS:%.*]] to i64164; CHECK-NEXT: [[T1:%.*]] = shl i64 [[X:%.*]], [[T0]]165; CHECK-NEXT: [[T2:%.*]] = add i32 [[NBITS]], -33166; CHECK-NEXT: call void @use64(i64 [[T0]])167; CHECK-NEXT: call void @use64(i64 [[T1]])168; CHECK-NEXT: call void @use32(i32 [[T2]])169; CHECK-NEXT: [[T3:%.*]] = lshr exact i64 [[T1]], [[T0]]170; CHECK-NEXT: [[T4:%.*]] = trunc i64 [[T3]] to i32171; CHECK-NEXT: call void @use32(i32 [[T4]])172; CHECK-NEXT: [[T5:%.*]] = shl i32 [[T4]], [[T2]]173; CHECK-NEXT: ret i32 [[T5]]174;175 %t0 = zext i32 %nbits to i64176 %t1 = shl i64 %x, %t0177 %t2 = add i32 %nbits, -33178 179 call void @use64(i64 %t0)180 call void @use64(i64 %t1)181 call void @use32(i32 %t2)182 183 %t3 = lshr i64 %t1, %t0184 %t4 = trunc i64 %t3 to i32185 call void @use32(i32 %t4)186 %t5 = shl i32 %t4, %t2 ; shift is smaller than mask187 ret i32 %t5188}189 190define i32 @n6_extrause2(i64 %x, i32 %nbits) {191; CHECK-LABEL: @n6_extrause2(192; CHECK-NEXT: [[T0:%.*]] = zext i32 [[NBITS:%.*]] to i64193; CHECK-NEXT: [[T1:%.*]] = shl i64 [[X:%.*]], [[T0]]194; CHECK-NEXT: [[T2:%.*]] = add i32 [[NBITS]], -33195; CHECK-NEXT: call void @use64(i64 [[T0]])196; CHECK-NEXT: call void @use64(i64 [[T1]])197; CHECK-NEXT: call void @use32(i32 [[T2]])198; CHECK-NEXT: [[T3:%.*]] = lshr exact i64 [[T1]], [[T0]]199; CHECK-NEXT: call void @use64(i64 [[T3]])200; CHECK-NEXT: [[T4:%.*]] = trunc i64 [[T3]] to i32201; CHECK-NEXT: call void @use32(i32 [[T4]])202; CHECK-NEXT: [[T5:%.*]] = shl i32 [[T4]], [[T2]]203; CHECK-NEXT: ret i32 [[T5]]204;205 %t0 = zext i32 %nbits to i64206 %t1 = shl i64 %x, %t0207 %t2 = add i32 %nbits, -33208 209 call void @use64(i64 %t0)210 call void @use64(i64 %t1)211 call void @use32(i32 %t2)212 213 %t3 = lshr i64 %t1, %t0214 call void @use64(i64 %t3)215 %t4 = trunc i64 %t3 to i32216 call void @use32(i32 %t4)217 %t5 = shl i32 %t4, %t2 ; shift is smaller than mask218 ret i32 %t5219}220