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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -S -passes=instcombine | FileCheck %s3@A = extern_weak global i32, align 44@B = extern_weak global i32, align 45 6define i32 @foo(i1 %which) {7; CHECK-LABEL: @foo(8; CHECK-NEXT: entry:9; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]10; CHECK: delay:11; CHECK-NEXT: [[CMP:%.*]] = icmp eq ptr @A, @B12; CHECK-NEXT: [[TMP0:%.*]] = select i1 [[CMP]], i32 2, i32 113; CHECK-NEXT: br label [[FINAL]]14; CHECK: final:15; CHECK-NEXT: [[USE2:%.*]] = phi i32 [ 1, [[ENTRY:%.*]] ], [ [[TMP0]], [[DELAY]] ]16; CHECK-NEXT: ret i32 [[USE2]]17;18entry:19 br i1 %which, label %final, label %delay20 21delay:22 %cmp = icmp eq ptr @A, @B23 br label %final24 25final:26 %use2 = phi i1 [ false, %entry ], [ %cmp, %delay ]27 %value = select i1 %use2, i32 2, i32 128 ret i32 %value29}30 31 32; test folding of select into phi for vectors.33define <4 x i64> @vec1(i1 %which) {34; CHECK-LABEL: @vec1(35; CHECK-NEXT: entry:36; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]37; CHECK: delay:38; CHECK-NEXT: br label [[FINAL]]39; CHECK: final:40; CHECK-NEXT: [[PHINODE:%.*]] = phi <4 x i64> [ zeroinitializer, [[ENTRY:%.*]] ], [ <i64 0, i64 0, i64 126, i64 127>, [[DELAY]] ]41; CHECK-NEXT: ret <4 x i64> [[PHINODE]]42;43entry:44 br i1 %which, label %final, label %delay45 46delay:47 br label %final48 49final:50 %phinode = phi <4 x i1> [ <i1 true, i1 true, i1 true, i1 true>, %entry ], [ <i1 true, i1 true, i1 false, i1 false>, %delay ]51 %sel = select <4 x i1> %phinode, <4 x i64> zeroinitializer, <4 x i64> <i64 124, i64 125, i64 126, i64 127>52 ret <4 x i64> %sel53}54 55define <4 x i64> @vec2(i1 %which) {56; CHECK-LABEL: @vec2(57; CHECK-NEXT: entry:58; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]59; CHECK: delay:60; CHECK-NEXT: br label [[FINAL]]61; CHECK: final:62; CHECK-NEXT: [[PHINODE:%.*]] = phi <4 x i64> [ <i64 124, i64 125, i64 126, i64 127>, [[ENTRY:%.*]] ], [ <i64 0, i64 125, i64 0, i64 127>, [[DELAY]] ]63; CHECK-NEXT: ret <4 x i64> [[PHINODE]]64;65entry:66 br i1 %which, label %final, label %delay67 68delay:69 br label %final70 71final:72 %phinode = phi <4 x i1> [ <i1 false, i1 false, i1 false, i1 false>, %entry ], [ <i1 true, i1 false, i1 true, i1 false>, %delay ]73 %sel = select <4 x i1> %phinode, <4 x i64> zeroinitializer, <4 x i64> <i64 124, i64 125, i64 126, i64 127>74 ret <4 x i64> %sel75}76 77; Test PR3336478; Insert the generated select into the same block as the incoming phi value.79; phi has constant vectors along with a single non-constant vector as operands.80define <2 x i8> @vec3(i1 %cond1, i1 %cond2, <2 x i1> %x, <2 x i8> %y, <2 x i8> %z) {81; CHECK-LABEL: @vec3(82; CHECK-NEXT: entry:83; CHECK-NEXT: br i1 [[COND1:%.*]], label [[IF1:%.*]], label [[ELSE:%.*]]84; CHECK: if1:85; CHECK-NEXT: br i1 [[COND2:%.*]], label [[IF2:%.*]], label [[ELSE]]86; CHECK: if2:87; CHECK-NEXT: br label [[ELSE]]88; CHECK: else:89; CHECK-NEXT: [[PHI:%.*]] = phi <2 x i1> [ [[X:%.*]], [[IF2]] ], [ <i1 false, i1 true>, [[ENTRY:%.*]] ], [ <i1 true, i1 false>, [[IF1]] ]90; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[PHI]], <2 x i8> [[Y:%.*]], <2 x i8> [[Z:%.*]]91; CHECK-NEXT: ret <2 x i8> [[SEL]]92;93entry:94 br i1 %cond1, label %if1, label %else95 96if1:97 br i1 %cond2, label %if2, label %else98 99if2:100 br label %else101 102else:103 %phi = phi <2 x i1> [ %x, %if2 ], [ <i1 0, i1 1>, %entry ], [ <i1 1, i1 0>, %if1 ]104 %sel = select <2 x i1> %phi, <2 x i8> %y, <2 x i8> %z105 ret <2 x i8> %sel106}107 108; Don't crash on unreachable IR.109 110define void @PR48369(i32 %a, ptr %p) {111; CHECK-LABEL: @PR48369(112; CHECK-NEXT: entry:113; CHECK-NEXT: [[PHI_CMP:%.*]] = icmp sgt i32 [[A:%.*]], 0114; CHECK-NEXT: br label [[BB1:%.*]]115; CHECK: bb1:116; CHECK-NEXT: [[CMP:%.*]] = phi i1 [ [[PHI_CMP]], [[DEADBB:%.*]] ], [ true, [[ENTRY:%.*]] ]117; CHECK-NEXT: [[SHL:%.*]] = select i1 [[CMP]], i32 256, i32 0118; CHECK-NEXT: store i32 [[SHL]], ptr [[P:%.*]], align 4119; CHECK-NEXT: br label [[END:%.*]]120; CHECK: deadbb:121; CHECK-NEXT: br label [[BB1]]122; CHECK: end:123; CHECK-NEXT: ret void124;125entry:126 %phi.cmp = icmp sgt i32 %a, 0127 br label %bb1128 129bb1:130 %cmp = phi i1 [ %phi.cmp, %deadbb ], [ true, %entry ]131 %shl = select i1 %cmp, i32 256, i32 0132 store i32 %shl, ptr %p133 br label %end134 135deadbb:136 br label %bb1137 138end:139 ret void140}141 142define i16 @sink_to_unreachable_crash(i1 %a) {143; CHECK-LABEL: @sink_to_unreachable_crash(144; CHECK-NEXT: entry:145; CHECK-NEXT: br label [[INF_LOOP:%.*]]146; CHECK: inf_loop:147; CHECK-NEXT: br label [[INF_LOOP]]148; CHECK: unreachable:149; CHECK-NEXT: ret i16 poison150;151entry:152 %s = select i1 %a, i16 0, i16 5153 br label %inf_loop154 155inf_loop:156 br label %inf_loop157 158unreachable: ; No predecessors!159 ret i16 %s160}161 162define i32 @phi_trans(i1 %c, i1 %c2, i32 %v) {163; CHECK-LABEL: @phi_trans(164; CHECK-NEXT: entry:165; CHECK-NEXT: br i1 [[C:%.*]], label [[IF:%.*]], label [[ELSE:%.*]]166; CHECK: if:167; CHECK-NEXT: [[V2:%.*]] = add i32 [[V:%.*]], 1168; CHECK-NEXT: br label [[JOIN:%.*]]169; CHECK: else:170; CHECK-NEXT: [[V3:%.*]] = mul i32 [[V]], 3171; CHECK-NEXT: [[V5:%.*]] = lshr i32 [[V]], 1172; CHECK-NEXT: [[TMP0:%.*]] = select i1 [[C2:%.*]], i32 [[V3]], i32 [[V5]]173; CHECK-NEXT: br label [[JOIN]]174; CHECK: join:175; CHECK-NEXT: [[PHI1:%.*]] = phi i32 [ [[V2]], [[IF]] ], [ [[TMP0]], [[ELSE]] ]176; CHECK-NEXT: ret i32 [[PHI1]]177;178entry:179 br i1 %c, label %if, label %else180 181if:182 %v2 = add i32 %v, 1183 %v4 = shl i32 %v, 1184 br label %join185 186else:187 %v3 = mul i32 %v, 3188 %v5 = lshr i32 %v, 1189 br label %join190 191join:192 %phi1 = phi i1 [ true, %if ], [ %c2, %else ]193 %phi2 = phi i32 [ %v2, %if ], [ %v3, %else ]194 %phi3 = phi i32 [ %v4, %if ], [ %v5, %else ]195 %sel = select i1 %phi1, i32 %phi2, i32 %phi3196 ret i32 %sel197}198 199define i32 @dominating_values_select_same_block(i1 %c1, i1 %c2, ptr %p, ptr %p2) {200; CHECK-LABEL: @dominating_values_select_same_block(201; CHECK-NEXT: entry:202; CHECK-NEXT: [[B:%.*]] = load i32, ptr [[P2:%.*]], align 4203; CHECK-NEXT: br i1 [[C1:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]204; CHECK: delay:205; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[P:%.*]], align 4206; CHECK-NEXT: [[TMP0:%.*]] = select i1 [[C2:%.*]], i32 [[A]], i32 [[B]]207; CHECK-NEXT: br label [[FINAL]]208; CHECK: final:209; CHECK-NEXT: [[USE2:%.*]] = phi i32 [ [[B]], [[ENTRY:%.*]] ], [ [[TMP0]], [[DELAY]] ]210; CHECK-NEXT: ret i32 [[USE2]]211;212entry:213 %a = load i32, ptr %p214 %b = load i32, ptr %p2215 br i1 %c1, label %final, label %delay216 217delay:218 br label %final219 220final:221 %use2 = phi i1 [ false, %entry ], [ %c2, %delay ]222 %value = select i1 %use2, i32 %a, i32 %b223 ret i32 %value224}225 226define i32 @dominating_values_select_not_same_block(i1 %c1, i1 %c2, ptr %p, ptr %p2) {227; CHECK-LABEL: @dominating_values_select_not_same_block(228; CHECK-NEXT: entry:229; CHECK-NEXT: [[B:%.*]] = load i32, ptr [[P2:%.*]], align 4230; CHECK-NEXT: br i1 [[C1:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]231; CHECK: delay:232; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[P:%.*]], align 4233; CHECK-NEXT: [[TMP0:%.*]] = select i1 [[C2:%.*]], i32 [[A]], i32 [[B]]234; CHECK-NEXT: br label [[FINAL]]235; CHECK: final:236; CHECK-NEXT: [[USE2:%.*]] = phi i32 [ [[B]], [[ENTRY:%.*]] ], [ [[TMP0]], [[DELAY]] ]237; CHECK-NEXT: br label [[SPLIT:%.*]]238; CHECK: split:239; CHECK-NEXT: ret i32 [[USE2]]240;241entry:242 %a = load i32, ptr %p243 %b = load i32, ptr %p2244 br i1 %c1, label %final, label %delay245 246delay:247 br label %final248 249final:250 %use2 = phi i1 [ false, %entry ], [ %c2, %delay ]251 br label %split252 253split:254 %value = select i1 %use2, i32 %a, i32 %b255 ret i32 %value256}257 258define i32 @not_dominating_values(i1 %c1, i1 %c2, ptr %p, ptr %p2) {259; CHECK-LABEL: @not_dominating_values(260; CHECK-NEXT: entry:261; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[P:%.*]], align 4262; CHECK-NEXT: br i1 [[C1:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]263; CHECK: delay:264; CHECK-NEXT: br label [[FINAL]]265; CHECK: final:266; CHECK-NEXT: [[USE2:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[C2:%.*]], [[DELAY]] ]267; CHECK-NEXT: [[B:%.*]] = load i32, ptr [[P2:%.*]], align 4268; CHECK-NEXT: [[VALUE:%.*]] = select i1 [[USE2]], i32 [[A]], i32 [[B]]269; CHECK-NEXT: ret i32 [[VALUE]]270;271entry:272 %a = load i32, ptr %p273 br i1 %c1, label %final, label %delay274 275delay:276 br label %final277 278final:279 %use2 = phi i1 [ false, %entry ], [ %c2, %delay ]280 %b = load i32, ptr %p2281 %value = select i1 %use2, i32 %a, i32 %b282 ret i32 %value283}284