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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4; With left shift, the comparison should not be modified.5define i1 @test_shift_and_cmp_not_changed1(i8 %p) {6; CHECK-LABEL: @test_shift_and_cmp_not_changed1(7; CHECK-NEXT: [[SHLP:%.*]] = shl i8 [[P:%.*]], 58; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[SHLP]], 649; CHECK-NEXT: ret i1 [[CMP]]10;11 %shlp = shl i8 %p, 512 %andp = and i8 %shlp, -6413 %cmp = icmp slt i8 %andp, 3214 ret i1 %cmp15}16 17; With arithmetic right shift, the comparison should not be modified.18define i1 @test_shift_and_cmp_not_changed2(i8 %p) {19; CHECK-LABEL: @test_shift_and_cmp_not_changed2(20; CHECK-NEXT: ret i1 true21;22 %shlp = ashr i8 %p, 523 %andp = and i8 %shlp, -6424 %cmp = icmp slt i8 %andp, 3225 ret i1 %cmp26}27 28; This should simplify functionally to the left shift case.29; The extra input parameter should be optimized away.30define i1 @test_shift_and_cmp_changed1(i8 %p, i8 %q) {31; CHECK-LABEL: @test_shift_and_cmp_changed1(32; CHECK-NEXT: [[ANDP:%.*]] = shl i8 [[P:%.*]], 533; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[ANDP]], 3334; CHECK-NEXT: ret i1 [[CMP]]35;36 %andp = and i8 %p, 637 %andq = and i8 %q, 838 %or = or i8 %andq, %andp39 %shl = shl i8 %or, 540 %ashr = ashr i8 %shl, 541 %cmp = icmp slt i8 %ashr, 142 ret i1 %cmp43}44 45define <2 x i1> @test_shift_and_cmp_changed1_vec(<2 x i8> %p, <2 x i8> %q) {46; CHECK-LABEL: @test_shift_and_cmp_changed1_vec(47; CHECK-NEXT: [[ANDP:%.*]] = shl <2 x i8> [[P:%.*]], splat (i8 5)48; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[ANDP]], splat (i8 33)49; CHECK-NEXT: ret <2 x i1> [[CMP]]50;51 %andp = and <2 x i8> %p, <i8 6, i8 6>52 %andq = and <2 x i8> %q, <i8 8, i8 8>53 %or = or <2 x i8> %andq, %andp54 %shl = shl <2 x i8> %or, <i8 5, i8 5>55 %ashr = ashr <2 x i8> %shl, <i8 5, i8 5>56 %cmp = icmp slt <2 x i8> %ashr, <i8 1, i8 1>57 ret <2 x i1> %cmp58}59 60; Unsigned compare allows a transformation to compare against 0.61define i1 @test_shift_and_cmp_changed2(i8 %p) {62; CHECK-LABEL: @test_shift_and_cmp_changed2(63; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[P:%.*]], 664; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[TMP1]], 065; CHECK-NEXT: ret i1 [[CMP]]66;67 %shlp = shl i8 %p, 568 %andp = and i8 %shlp, -6469 %cmp = icmp ult i8 %andp, 3270 ret i1 %cmp71}72 73define <2 x i1> @test_shift_and_cmp_changed2_vec(<2 x i8> %p) {74; CHECK-LABEL: @test_shift_and_cmp_changed2_vec(75; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[P:%.*]], splat (i8 6)76; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[TMP1]], zeroinitializer77; CHECK-NEXT: ret <2 x i1> [[CMP]]78;79 %shlp = shl <2 x i8> %p, <i8 5, i8 5>80 %andp = and <2 x i8> %shlp, <i8 -64, i8 -64>81 %cmp = icmp ult <2 x i8> %andp, <i8 32, i8 32>82 ret <2 x i1> %cmp83}84 85; nsw on the shift should not affect the comparison.86define i1 @test_shift_and_cmp_changed3(i8 %p) {87; CHECK-LABEL: @test_shift_and_cmp_changed3(88; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[P:%.*]], 289; CHECK-NEXT: ret i1 [[CMP]]90;91 %shlp = shl nsw i8 %p, 592 %andp = and i8 %shlp, -6493 %cmp = icmp slt i8 %andp, 3294 ret i1 %cmp95}96 97; Logical shift right allows a return true because the 'and' guarantees no bits are set.98define i1 @test_shift_and_cmp_changed4(i8 %p) {99; CHECK-LABEL: @test_shift_and_cmp_changed4(100; CHECK-NEXT: ret i1 true101;102 %shlp = lshr i8 %p, 5103 %andp = and i8 %shlp, -64104 %cmp = icmp slt i8 %andp, 32105 ret i1 %cmp106}107 108