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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -S -passes=instcombine < %s | FileCheck %s3 4target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"5target triple = "x86_64-pc-linux-gnu"6 7@a = dso_local local_unnamed_addr global i64 0, align 88@d = dso_local local_unnamed_addr global i64 0, align 89@c = external dso_local local_unnamed_addr global i8, align 110 11define void @test(ptr nocapture readonly %arg) local_unnamed_addr {12; CHECK-LABEL: @test(13; CHECK-NEXT: bb:14; CHECK-NEXT: [[I:%.*]] = load i64, ptr @d, align 815; CHECK-NEXT: [[I1:%.*]] = icmp eq i64 [[I]], 016; CHECK-NEXT: [[I2:%.*]] = load i64, ptr @a, align 817; CHECK-NEXT: [[I3:%.*]] = icmp ne i64 [[I2]], 018; CHECK-NEXT: br i1 [[I1]], label [[BB13:%.*]], label [[BB4:%.*]]19; CHECK: bb4:20; CHECK-NEXT: [[I5:%.*]] = load i16, ptr [[ARG:%.*]], align 221; CHECK-NEXT: [[I6:%.*]] = trunc i16 [[I5]] to i822; CHECK-NEXT: store i8 [[I6]], ptr @c, align 123; CHECK-NEXT: tail call void @llvm.assume(i1 [[I3]])24; CHECK-NEXT: br label [[BB22:%.*]]25; CHECK: bb13:26; CHECK-NEXT: [[I14:%.*]] = load i16, ptr [[ARG]], align 227; CHECK-NEXT: [[I15:%.*]] = trunc i16 [[I14]] to i828; CHECK-NEXT: store i8 [[I15]], ptr @c, align 129; CHECK-NEXT: br label [[BB22]]30; CHECK: bb22:31; CHECK-NEXT: [[STOREMERGE2_IN:%.*]] = load i16, ptr [[ARG]], align 232; CHECK-NEXT: [[STOREMERGE2:%.*]] = trunc i16 [[STOREMERGE2_IN]] to i833; CHECK-NEXT: store i8 [[STOREMERGE2]], ptr @c, align 134; CHECK-NEXT: [[STOREMERGE1_IN:%.*]] = load i16, ptr [[ARG]], align 235; CHECK-NEXT: [[STOREMERGE1:%.*]] = trunc i16 [[STOREMERGE1_IN]] to i836; CHECK-NEXT: store i8 [[STOREMERGE1]], ptr @c, align 137; CHECK-NEXT: [[STOREMERGE_IN:%.*]] = load i16, ptr [[ARG]], align 238; CHECK-NEXT: [[STOREMERGE:%.*]] = trunc i16 [[STOREMERGE_IN]] to i839; CHECK-NEXT: store i8 [[STOREMERGE]], ptr @c, align 140; CHECK-NEXT: br label [[BB23:%.*]]41; CHECK: bb23:42; CHECK-NEXT: br label [[BB23]]43;44bb:45 %i = load i64, ptr @d, align 846 %i1 = icmp eq i64 %i, 047 %i2 = load i64, ptr @a, align 848 %i3 = icmp ne i64 %i2, 049 br i1 %i1, label %bb13, label %bb450 51bb4: ; preds = %bb52 %i5 = load i16, ptr %arg, align 253 %i6 = trunc i16 %i5 to i854 store i8 %i6, ptr @c, align 155 tail call void @llvm.assume(i1 %i3)56 %i7 = load i16, ptr %arg, align 257 %i8 = trunc i16 %i7 to i858 store i8 %i8, ptr @c, align 159 %i9 = load i16, ptr %arg, align 260 %i10 = trunc i16 %i9 to i861 store i8 %i10, ptr @c, align 162 %i11 = load i16, ptr %arg, align 263 %i12 = trunc i16 %i11 to i864 store i8 %i12, ptr @c, align 165 br label %bb2266 67bb13: ; preds = %bb68 %i14 = load i16, ptr %arg, align 269 %i15 = trunc i16 %i14 to i870 store i8 %i15, ptr @c, align 171 %i16 = load i16, ptr %arg, align 272 %i17 = trunc i16 %i16 to i873 store i8 %i17, ptr @c, align 174 %i18 = load i16, ptr %arg, align 275 %i19 = trunc i16 %i18 to i876 store i8 %i19, ptr @c, align 177 %i20 = load i16, ptr %arg, align 278 %i21 = trunc i16 %i20 to i879 store i8 %i21, ptr @c, align 180 br label %bb2281 82bb22: ; preds = %bb13, %bb483 br label %bb2384 85bb23: ; preds = %bb23, %bb2286 br label %bb2387}88 89; Function Attrs: nounwind willreturn90declare void @llvm.assume(i1) #091 92attributes #0 = { nounwind willreturn }93