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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4; Check simplification of5; (icmp sgt x, -1) & (icmp sgt/sge n, x) --> icmp ugt/uge n, x6 7define i1 @test_and1(i32 %x, i32 %n) {8; CHECK-LABEL: @test_and1(9; CHECK-NEXT:    [[NN:%.*]] = and i32 [[N:%.*]], 214748364710; CHECK-NEXT:    [[C:%.*]] = icmp ult i32 [[X:%.*]], [[NN]]11; CHECK-NEXT:    ret i1 [[C]]12;13  %nn = and i32 %n, 214748364714  %a = icmp sge i32 %x, 015  %b = icmp slt i32 %x, %nn16  %c = and i1 %a, %b17  ret i1 %c18}19 20define i1 @test_and1_logical(i32 %x, i32 %n) {21; CHECK-LABEL: @test_and1_logical(22; CHECK-NEXT:    [[NN:%.*]] = and i32 [[N:%.*]], 214748364723; CHECK-NEXT:    [[A:%.*]] = icmp sgt i32 [[X:%.*]], -124; CHECK-NEXT:    [[B:%.*]] = icmp slt i32 [[X]], [[NN]]25; CHECK-NEXT:    [[C:%.*]] = select i1 [[A]], i1 [[B]], i1 false26; CHECK-NEXT:    ret i1 [[C]]27;28  %nn = and i32 %n, 214748364729  %a = icmp sge i32 %x, 030  %b = icmp slt i32 %x, %nn31  %c = select i1 %a, i1 %b, i1 false32  ret i1 %c33}34 35define i1 @test_and1_sext(i32 %x, i64 %n) {36; CHECK-LABEL: @test_and1_sext(37; CHECK-NEXT:    [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -138; CHECK-NEXT:    call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])39; CHECK-NEXT:    [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i6440; CHECK-NEXT:    [[C:%.*]] = icmp ugt i64 [[NN]], [[X_SEXT]]41; CHECK-NEXT:    ret i1 [[C]]42;43  %n_not_negative = icmp sge i64 %n, 044  call void @llvm.assume(i1 %n_not_negative)45  %x_sext = sext i32 %x to i6446  %a = icmp sge i32 %x, 047  %b = icmp slt i64 %x_sext, %n48  %c = and i1 %a, %b49  ret i1 %c50}51 52define i1 @test_and2(i32 %x, i32 %n) {53; CHECK-LABEL: @test_and2(54; CHECK-NEXT:    [[NN:%.*]] = and i32 [[N:%.*]], 214748364755; CHECK-NEXT:    [[C:%.*]] = icmp ule i32 [[X:%.*]], [[NN]]56; CHECK-NEXT:    ret i1 [[C]]57;58  %nn = and i32 %n, 214748364759  %a = icmp sgt i32 %x, -160  %b = icmp sle i32 %x, %nn61  %c = and i1 %a, %b62  ret i1 %c63}64 65define i1 @test_and2_logical(i32 %x, i32 %n) {66; CHECK-LABEL: @test_and2_logical(67; CHECK-NEXT:    [[NN:%.*]] = and i32 [[N:%.*]], 214748364768; CHECK-NEXT:    [[A:%.*]] = icmp sgt i32 [[X:%.*]], -169; CHECK-NEXT:    [[B:%.*]] = icmp sle i32 [[X]], [[NN]]70; CHECK-NEXT:    [[C:%.*]] = select i1 [[A]], i1 [[B]], i1 false71; CHECK-NEXT:    ret i1 [[C]]72;73  %nn = and i32 %n, 214748364774  %a = icmp sgt i32 %x, -175  %b = icmp sle i32 %x, %nn76  %c = select i1 %a, i1 %b, i1 false77  ret i1 %c78}79 80define i1 @test_and2_sext(i32 %x, i64 %n) {81; CHECK-LABEL: @test_and2_sext(82; CHECK-NEXT:    [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -183; CHECK-NEXT:    call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])84; CHECK-NEXT:    [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i6485; CHECK-NEXT:    [[C:%.*]] = icmp uge i64 [[NN]], [[X_SEXT]]86; CHECK-NEXT:    ret i1 [[C]]87;88  %n_not_negative = icmp sge i64 %n, 089  call void @llvm.assume(i1 %n_not_negative)90  %x_sext = sext i32 %x to i6491  %a = icmp sgt i32 %x, -192  %b = icmp sle i64 %x_sext, %n93  %c = and i1 %a, %b94  ret i1 %c95}96 97define i1 @test_and3(i32 %x, i32 %n) {98; CHECK-LABEL: @test_and3(99; CHECK-NEXT:    [[NN:%.*]] = and i32 [[N:%.*]], 2147483647100; CHECK-NEXT:    [[C:%.*]] = icmp ult i32 [[X:%.*]], [[NN]]101; CHECK-NEXT:    ret i1 [[C]]102;103  %nn = and i32 %n, 2147483647104  %a = icmp sgt i32 %nn, %x105  %b = icmp sge i32 %x, 0106  %c = and i1 %a, %b107  ret i1 %c108}109 110define i1 @test_and3_logical(i32 %x, i32 %n) {111; CHECK-LABEL: @test_and3_logical(112; CHECK-NEXT:    [[NN:%.*]] = and i32 [[N:%.*]], 2147483647113; CHECK-NEXT:    [[C:%.*]] = icmp ult i32 [[X:%.*]], [[NN]]114; CHECK-NEXT:    ret i1 [[C]]115;116  %nn = and i32 %n, 2147483647117  %a = icmp sgt i32 %nn, %x118  %b = icmp sge i32 %x, 0119  %c = select i1 %a, i1 %b, i1 false120  ret i1 %c121}122 123define i1 @test_and3_sext(i32 %x, i64 %n) {124; CHECK-LABEL: @test_and3_sext(125; CHECK-NEXT:    [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -1126; CHECK-NEXT:    call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])127; CHECK-NEXT:    [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i64128; CHECK-NEXT:    [[C:%.*]] = icmp ugt i64 [[NN]], [[X_SEXT]]129; CHECK-NEXT:    ret i1 [[C]]130;131  %n_not_negative = icmp sge i64 %n, 0132  call void @llvm.assume(i1 %n_not_negative)133  %x_sext = sext i32 %x to i64134  %a = icmp sgt i64 %n, %x_sext135  %b = icmp sge i32 %x, 0136  %c = and i1 %a, %b137  ret i1 %c138}139 140define i1 @test_and4(i32 %x, i32 %n) {141; CHECK-LABEL: @test_and4(142; CHECK-NEXT:    [[NN:%.*]] = and i32 [[N:%.*]], 2147483647143; CHECK-NEXT:    [[C:%.*]] = icmp ule i32 [[X:%.*]], [[NN]]144; CHECK-NEXT:    ret i1 [[C]]145;146  %nn = and i32 %n, 2147483647147  %a = icmp sge i32 %nn, %x148  %b = icmp sge i32 %x, 0149  %c = and i1 %a, %b150  ret i1 %c151}152 153define i1 @test_and4_logical(i32 %x, i32 %n) {154; CHECK-LABEL: @test_and4_logical(155; CHECK-NEXT:    [[NN:%.*]] = and i32 [[N:%.*]], 2147483647156; CHECK-NEXT:    [[C:%.*]] = icmp ule i32 [[X:%.*]], [[NN]]157; CHECK-NEXT:    ret i1 [[C]]158;159  %nn = and i32 %n, 2147483647160  %a = icmp sge i32 %nn, %x161  %b = icmp sge i32 %x, 0162  %c = select i1 %a, i1 %b, i1 false163  ret i1 %c164}165 166define i1 @test_and4_sext(i32 %x, i64 %n) {167; CHECK-LABEL: @test_and4_sext(168; CHECK-NEXT:    [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -1169; CHECK-NEXT:    call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])170; CHECK-NEXT:    [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i64171; CHECK-NEXT:    [[C:%.*]] = icmp uge i64 [[NN]], [[X_SEXT]]172; CHECK-NEXT:    ret i1 [[C]]173;174  %n_not_negative = icmp sge i64 %n, 0175  call void @llvm.assume(i1 %n_not_negative)176  %x_sext = sext i32 %x to i64177  %a = icmp sge i64 %n, %x_sext178  %b = icmp sge i32 %x, 0179  %c = and i1 %a, %b180  ret i1 %c181}182 183define i1 @test_or1(i32 %x, i32 %n) {184; CHECK-LABEL: @test_or1(185; CHECK-NEXT:    [[NN:%.*]] = and i32 [[N:%.*]], 2147483647186; CHECK-NEXT:    [[C:%.*]] = icmp uge i32 [[X:%.*]], [[NN]]187; CHECK-NEXT:    ret i1 [[C]]188;189  %nn = and i32 %n, 2147483647190  %a = icmp slt i32 %x, 0191  %b = icmp sge i32 %x, %nn192  %c = or i1 %a, %b193  ret i1 %c194}195 196define i1 @test_or1_logical(i32 %x, i32 %n) {197; CHECK-LABEL: @test_or1_logical(198; CHECK-NEXT:    [[NN:%.*]] = and i32 [[N:%.*]], 2147483647199; CHECK-NEXT:    [[A:%.*]] = icmp slt i32 [[X:%.*]], 0200; CHECK-NEXT:    [[B:%.*]] = icmp sge i32 [[X]], [[NN]]201; CHECK-NEXT:    [[C:%.*]] = select i1 [[A]], i1 true, i1 [[B]]202; CHECK-NEXT:    ret i1 [[C]]203;204  %nn = and i32 %n, 2147483647205  %a = icmp slt i32 %x, 0206  %b = icmp sge i32 %x, %nn207  %c = select i1 %a, i1 true, i1 %b208  ret i1 %c209}210 211define i1 @test_or1_sext(i32 %x, i64 %n) {212; CHECK-LABEL: @test_or1_sext(213; CHECK-NEXT:    [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -1214; CHECK-NEXT:    call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])215; CHECK-NEXT:    [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i64216; CHECK-NEXT:    [[C:%.*]] = icmp ule i64 [[NN]], [[X_SEXT]]217; CHECK-NEXT:    ret i1 [[C]]218;219  %n_not_negative = icmp sge i64 %n, 0220  call void @llvm.assume(i1 %n_not_negative)221  %x_sext = sext i32 %x to i64222  %a = icmp slt i32 %x, 0223  %b = icmp sge i64 %x_sext, %n224  %c = or i1 %a, %b225  ret i1 %c226}227 228define i1 @test_or2(i32 %x, i32 %n) {229; CHECK-LABEL: @test_or2(230; CHECK-NEXT:    [[NN:%.*]] = and i32 [[N:%.*]], 2147483647231; CHECK-NEXT:    [[C:%.*]] = icmp ugt i32 [[X:%.*]], [[NN]]232; CHECK-NEXT:    ret i1 [[C]]233;234  %nn = and i32 %n, 2147483647235  %a = icmp sle i32 %x, -1236  %b = icmp sgt i32 %x, %nn237  %c = or i1 %a, %b238  ret i1 %c239}240 241define i1 @test_or2_logical(i32 %x, i32 %n) {242; CHECK-LABEL: @test_or2_logical(243; CHECK-NEXT:    [[NN:%.*]] = and i32 [[N:%.*]], 2147483647244; CHECK-NEXT:    [[A:%.*]] = icmp slt i32 [[X:%.*]], 0245; CHECK-NEXT:    [[B:%.*]] = icmp sgt i32 [[X]], [[NN]]246; CHECK-NEXT:    [[C:%.*]] = select i1 [[A]], i1 true, i1 [[B]]247; CHECK-NEXT:    ret i1 [[C]]248;249  %nn = and i32 %n, 2147483647250  %a = icmp sle i32 %x, -1251  %b = icmp sgt i32 %x, %nn252  %c = select i1 %a, i1 true, i1 %b253  ret i1 %c254}255 256define i1 @test_or2_sext(i32 %x, i64 %n) {257; CHECK-LABEL: @test_or2_sext(258; CHECK-NEXT:    [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -1259; CHECK-NEXT:    call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])260; CHECK-NEXT:    [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i64261; CHECK-NEXT:    [[C:%.*]] = icmp ult i64 [[NN]], [[X_SEXT]]262; CHECK-NEXT:    ret i1 [[C]]263;264  %n_not_negative = icmp sge i64 %n, 0265  call void @llvm.assume(i1 %n_not_negative)266  %x_sext = sext i32 %x to i64267  %a = icmp sle i32 %x, -1268  %b = icmp sgt i64 %x_sext, %n269  %c = or i1 %a, %b270  ret i1 %c271}272 273define i1 @test_or3(i32 %x, i32 %n) {274; CHECK-LABEL: @test_or3(275; CHECK-NEXT:    [[NN:%.*]] = and i32 [[N:%.*]], 2147483647276; CHECK-NEXT:    [[C:%.*]] = icmp uge i32 [[X:%.*]], [[NN]]277; CHECK-NEXT:    ret i1 [[C]]278;279  %nn = and i32 %n, 2147483647280  %a = icmp sle i32 %nn, %x281  %b = icmp slt i32 %x, 0282  %c = or i1 %a, %b283  ret i1 %c284}285 286define i1 @test_or3_logical(i32 %x, i32 %n) {287; CHECK-LABEL: @test_or3_logical(288; CHECK-NEXT:    [[NN:%.*]] = and i32 [[N:%.*]], 2147483647289; CHECK-NEXT:    [[C:%.*]] = icmp uge i32 [[X:%.*]], [[NN]]290; CHECK-NEXT:    ret i1 [[C]]291;292  %nn = and i32 %n, 2147483647293  %a = icmp sle i32 %nn, %x294  %b = icmp slt i32 %x, 0295  %c = select i1 %a, i1 true, i1 %b296  ret i1 %c297}298 299define i1 @test_or3_sext(i32 %x, i64 %n) {300; CHECK-LABEL: @test_or3_sext(301; CHECK-NEXT:    [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -1302; CHECK-NEXT:    call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])303; CHECK-NEXT:    [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i64304; CHECK-NEXT:    [[C:%.*]] = icmp ule i64 [[NN]], [[X_SEXT]]305; CHECK-NEXT:    ret i1 [[C]]306;307  %n_not_negative = icmp sge i64 %n, 0308  call void @llvm.assume(i1 %n_not_negative)309  %x_sext = sext i32 %x to i64310  %a = icmp sle i64 %n, %x_sext311  %b = icmp slt i32 %x, 0312  %c = or i1 %a, %b313  ret i1 %c314}315 316define i1 @test_or4(i32 %x, i32 %n) {317; CHECK-LABEL: @test_or4(318; CHECK-NEXT:    [[NN:%.*]] = and i32 [[N:%.*]], 2147483647319; CHECK-NEXT:    [[C:%.*]] = icmp ugt i32 [[X:%.*]], [[NN]]320; CHECK-NEXT:    ret i1 [[C]]321;322  %nn = and i32 %n, 2147483647323  %a = icmp slt i32 %nn, %x324  %b = icmp slt i32 %x, 0325  %c = or i1 %a, %b326  ret i1 %c327}328 329define i1 @test_or4_logical(i32 %x, i32 %n) {330; CHECK-LABEL: @test_or4_logical(331; CHECK-NEXT:    [[NN:%.*]] = and i32 [[N:%.*]], 2147483647332; CHECK-NEXT:    [[C:%.*]] = icmp ugt i32 [[X:%.*]], [[NN]]333; CHECK-NEXT:    ret i1 [[C]]334;335  %nn = and i32 %n, 2147483647336  %a = icmp slt i32 %nn, %x337  %b = icmp slt i32 %x, 0338  %c = select i1 %a, i1 true, i1 %b339  ret i1 %c340}341 342define i1 @test_or4_sext(i32 %x, i64 %n) {343; CHECK-LABEL: @test_or4_sext(344; CHECK-NEXT:    [[N_NOT_NEGATIVE:%.*]] = icmp sgt i64 [[NN:%.*]], -1345; CHECK-NEXT:    call void @llvm.assume(i1 [[N_NOT_NEGATIVE]])346; CHECK-NEXT:    [[X_SEXT:%.*]] = sext i32 [[X:%.*]] to i64347; CHECK-NEXT:    [[C:%.*]] = icmp ult i64 [[NN]], [[X_SEXT]]348; CHECK-NEXT:    ret i1 [[C]]349;350  %n_not_negative = icmp sge i64 %n, 0351  call void @llvm.assume(i1 %n_not_negative)352  %x_sext = sext i32 %x to i64353  %a = icmp slt i64 %n, %x_sext354  %b = icmp slt i32 %x, 0355  %c = or i1 %a, %b356  ret i1 %c357}358 359; Negative tests360 361define i1 @negative1(i32 %x, i32 %n) {362; CHECK-LABEL: @negative1(363; CHECK-NEXT:    [[NN:%.*]] = and i32 [[N:%.*]], 2147483647364; CHECK-NEXT:    [[A:%.*]] = icmp slt i32 [[X:%.*]], [[NN]]365; CHECK-NEXT:    [[B:%.*]] = icmp sgt i32 [[X]], 0366; CHECK-NEXT:    [[C:%.*]] = and i1 [[A]], [[B]]367; CHECK-NEXT:    ret i1 [[C]]368;369  %nn = and i32 %n, 2147483647370  %a = icmp slt i32 %x, %nn371  %b = icmp sgt i32 %x, 0      ; should be: icmp sge372  %c = and i1 %a, %b373  ret i1 %c374}375 376define i1 @negative1_logical(i32 %x, i32 %n) {377; CHECK-LABEL: @negative1_logical(378; CHECK-NEXT:    [[NN:%.*]] = and i32 [[N:%.*]], 2147483647379; CHECK-NEXT:    [[A:%.*]] = icmp slt i32 [[X:%.*]], [[NN]]380; CHECK-NEXT:    [[B:%.*]] = icmp sgt i32 [[X]], 0381; CHECK-NEXT:    [[C:%.*]] = and i1 [[A]], [[B]]382; CHECK-NEXT:    ret i1 [[C]]383;384  %nn = and i32 %n, 2147483647385  %a = icmp slt i32 %x, %nn386  %b = icmp sgt i32 %x, 0      ; should be: icmp sge387  %c = select i1 %a, i1 %b, i1 false388  ret i1 %c389}390 391define i1 @negative2(i32 %x, i32 %n) {392; CHECK-LABEL: @negative2(393; CHECK-NEXT:    [[A:%.*]] = icmp slt i32 [[X:%.*]], [[N:%.*]]394; CHECK-NEXT:    [[B:%.*]] = icmp sgt i32 [[X]], -1395; CHECK-NEXT:    [[C:%.*]] = and i1 [[A]], [[B]]396; CHECK-NEXT:    ret i1 [[C]]397;398  %a = icmp slt i32 %x, %n     ; n can be negative399  %b = icmp sge i32 %x, 0400  %c = and i1 %a, %b401  ret i1 %c402}403 404define i1 @negative2_logical(i32 %x, i32 %n) {405; CHECK-LABEL: @negative2_logical(406; CHECK-NEXT:    [[A:%.*]] = icmp slt i32 [[X:%.*]], [[N:%.*]]407; CHECK-NEXT:    [[B:%.*]] = icmp sgt i32 [[X]], -1408; CHECK-NEXT:    [[C:%.*]] = and i1 [[A]], [[B]]409; CHECK-NEXT:    ret i1 [[C]]410;411  %a = icmp slt i32 %x, %n     ; n can be negative412  %b = icmp sge i32 %x, 0413  %c = select i1 %a, i1 %b, i1 false414  ret i1 %c415}416 417define i1 @negative3(i32 %x, i32 %y, i32 %n) {418; CHECK-LABEL: @negative3(419; CHECK-NEXT:    [[NN:%.*]] = and i32 [[N:%.*]], 2147483647420; CHECK-NEXT:    [[A:%.*]] = icmp slt i32 [[X:%.*]], [[NN]]421; CHECK-NEXT:    [[B:%.*]] = icmp sgt i32 [[Y:%.*]], -1422; CHECK-NEXT:    [[C:%.*]] = and i1 [[A]], [[B]]423; CHECK-NEXT:    ret i1 [[C]]424;425  %nn = and i32 %n, 2147483647426  %a = icmp slt i32 %x, %nn427  %b = icmp sge i32 %y, 0      ; should compare %x and not %y428  %c = and i1 %a, %b429  ret i1 %c430}431 432define i1 @negative3_logical(i32 %x, i32 %y, i32 %n) {433; CHECK-LABEL: @negative3_logical(434; CHECK-NEXT:    [[NN:%.*]] = and i32 [[N:%.*]], 2147483647435; CHECK-NEXT:    [[A:%.*]] = icmp slt i32 [[X:%.*]], [[NN]]436; CHECK-NEXT:    [[B:%.*]] = icmp sgt i32 [[Y:%.*]], -1437; CHECK-NEXT:    [[C:%.*]] = select i1 [[A]], i1 [[B]], i1 false438; CHECK-NEXT:    ret i1 [[C]]439;440  %nn = and i32 %n, 2147483647441  %a = icmp slt i32 %x, %nn442  %b = icmp sge i32 %y, 0      ; should compare %x and not %y443  %c = select i1 %a, i1 %b, i1 false444  ret i1 %c445}446 447define i1 @negative4(i32 %x, i32 %n) {448; CHECK-LABEL: @negative4(449; CHECK-NEXT:    [[NN:%.*]] = and i32 [[N:%.*]], 2147483647450; CHECK-NEXT:    [[A:%.*]] = icmp ne i32 [[X:%.*]], [[NN]]451; CHECK-NEXT:    [[B:%.*]] = icmp sgt i32 [[X]], -1452; CHECK-NEXT:    [[C:%.*]] = and i1 [[A]], [[B]]453; CHECK-NEXT:    ret i1 [[C]]454;455  %nn = and i32 %n, 2147483647456  %a = icmp ne i32 %x, %nn     ; should be: icmp slt/sle457  %b = icmp sge i32 %x, 0458  %c = and i1 %a, %b459  ret i1 %c460}461 462define i1 @negative4_logical(i32 %x, i32 %n) {463; CHECK-LABEL: @negative4_logical(464; CHECK-NEXT:    [[NN:%.*]] = and i32 [[N:%.*]], 2147483647465; CHECK-NEXT:    [[A:%.*]] = icmp ne i32 [[X:%.*]], [[NN]]466; CHECK-NEXT:    [[B:%.*]] = icmp sgt i32 [[X]], -1467; CHECK-NEXT:    [[C:%.*]] = and i1 [[A]], [[B]]468; CHECK-NEXT:    ret i1 [[C]]469;470  %nn = and i32 %n, 2147483647471  %a = icmp ne i32 %x, %nn     ; should be: icmp slt/sle472  %b = icmp sge i32 %x, 0473  %c = select i1 %a, i1 %b, i1 false474  ret i1 %c475}476 477define i1 @negative5(i32 %x, i32 %n) {478; CHECK-LABEL: @negative5(479; CHECK-NEXT:    ret i1 true480;481  %nn = and i32 %n, 2147483647482  %a = icmp slt i32 %x, %nn483  %b = icmp sge i32 %x, 0484  %c = or i1 %a, %b            ; should be: and485  ret i1 %c486}487 488define i1 @negative5_logical(i32 %x, i32 %n) {489; CHECK-LABEL: @negative5_logical(490; CHECK-NEXT:    ret i1 true491;492  %nn = and i32 %n, 2147483647493  %a = icmp slt i32 %x, %nn494  %b = icmp sge i32 %x, 0495  %c = select i1 %a, i1 true, i1 %b            ; should be: and496  ret i1 %c497}498 499