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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"5 6define i1 @reduce_and_self(<8 x i1> %x) {7; CHECK-LABEL: @reduce_and_self(8; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[X:%.*]] to i89; CHECK-NEXT: [[RES:%.*]] = icmp eq i8 [[TMP1]], -110; CHECK-NEXT: ret i1 [[RES]]11;12 %res = call i1 @llvm.vector.reduce.and.v8i32(<8 x i1> %x)13 ret i1 %res14}15 16define i32 @reduce_and_sext(<4 x i1> %x) {17; CHECK-LABEL: @reduce_and_sext(18; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i1> [[X:%.*]] to i419; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i4 [[TMP1]], -120; CHECK-NEXT: [[RES:%.*]] = sext i1 [[TMP2]] to i3221; CHECK-NEXT: ret i32 [[RES]]22;23 %sext = sext <4 x i1> %x to <4 x i32>24 %res = call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> %sext)25 ret i32 %res26}27 28define i64 @reduce_and_zext(<8 x i1> %x) {29; CHECK-LABEL: @reduce_and_zext(30; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[X:%.*]] to i831; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], -132; CHECK-NEXT: [[RES:%.*]] = zext i1 [[TMP2]] to i6433; CHECK-NEXT: ret i64 [[RES]]34;35 %zext = zext <8 x i1> %x to <8 x i64>36 %res = call i64 @llvm.vector.reduce.and.v8i64(<8 x i64> %zext)37 ret i64 %res38}39 40define i16 @reduce_and_sext_same(<16 x i1> %x) {41; CHECK-LABEL: @reduce_and_sext_same(42; CHECK-NEXT: [[TMP1:%.*]] = bitcast <16 x i1> [[X:%.*]] to i1643; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i16 [[TMP1]], -144; CHECK-NEXT: [[RES:%.*]] = sext i1 [[TMP2]] to i1645; CHECK-NEXT: ret i16 [[RES]]46;47 %sext = sext <16 x i1> %x to <16 x i16>48 %res = call i16 @llvm.vector.reduce.and.v16i16(<16 x i16> %sext)49 ret i16 %res50}51 52define i8 @reduce_and_zext_long(<128 x i1> %x) {53; CHECK-LABEL: @reduce_and_zext_long(54; CHECK-NEXT: [[TMP1:%.*]] = bitcast <128 x i1> [[X:%.*]] to i12855; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i128 [[TMP1]], -156; CHECK-NEXT: [[RES:%.*]] = sext i1 [[TMP2]] to i857; CHECK-NEXT: ret i8 [[RES]]58;59 %sext = sext <128 x i1> %x to <128 x i8>60 %res = call i8 @llvm.vector.reduce.and.v128i8(<128 x i8> %sext)61 ret i8 %res62}63 64@glob = external global i8, align 165define i8 @reduce_and_zext_long_external_use(<128 x i1> %x) {66; CHECK-LABEL: @reduce_and_zext_long_external_use(67; CHECK-NEXT: [[TMP1:%.*]] = bitcast <128 x i1> [[X:%.*]] to i12868; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i128 [[TMP1]], -169; CHECK-NEXT: [[RES:%.*]] = sext i1 [[TMP2]] to i870; CHECK-NEXT: [[TMP3:%.*]] = extractelement <128 x i1> [[X]], i64 071; CHECK-NEXT: [[EXT:%.*]] = sext i1 [[TMP3]] to i872; CHECK-NEXT: store i8 [[EXT]], ptr @glob, align 173; CHECK-NEXT: ret i8 [[RES]]74;75 %sext = sext <128 x i1> %x to <128 x i8>76 %res = call i8 @llvm.vector.reduce.and.v128i8(<128 x i8> %sext)77 %ext = extractelement <128 x i8> %sext, i32 078 store i8 %ext, ptr @glob, align 179 ret i8 %res80}81 82@glob1 = external global i64, align 883define i64 @reduce_and_zext_external_use(<8 x i1> %x) {84; CHECK-LABEL: @reduce_and_zext_external_use(85; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[X:%.*]] to i886; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], -187; CHECK-NEXT: [[RES:%.*]] = zext i1 [[TMP2]] to i6488; CHECK-NEXT: [[TMP3:%.*]] = extractelement <8 x i1> [[X]], i64 089; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[TMP3]] to i6490; CHECK-NEXT: store i64 [[EXT]], ptr @glob1, align 891; CHECK-NEXT: ret i64 [[RES]]92;93 %zext = zext <8 x i1> %x to <8 x i64>94 %res = call i64 @llvm.vector.reduce.and.v8i64(<8 x i64> %zext)95 %ext = extractelement <8 x i64> %zext, i32 096 store i64 %ext, ptr @glob1, align 897 ret i64 %res98}99 100define i1 @reduce_and_pointer_cast(ptr %arg, ptr %arg1) {101; CHECK-LABEL: @reduce_and_pointer_cast(102; CHECK-NEXT: bb:103; CHECK-NEXT: [[LHS1:%.*]] = load i64, ptr [[ARG1:%.*]], align 8104; CHECK-NEXT: [[RHS2:%.*]] = load i64, ptr [[ARG:%.*]], align 8105; CHECK-NEXT: [[ALL_EQ:%.*]] = icmp eq i64 [[LHS1]], [[RHS2]]106; CHECK-NEXT: ret i1 [[ALL_EQ]]107;108bb:109 %lhs = load <8 x i8>, ptr %arg1110 %rhs = load <8 x i8>, ptr %arg111 %cmp = icmp eq <8 x i8> %lhs, %rhs112 %all_eq = call i1 @llvm.vector.reduce.and.v8i32(<8 x i1> %cmp)113 ret i1 %all_eq114}115 116define i1 @reduce_and_pointer_cast_wide(ptr %arg, ptr %arg1) {117; CHECK-LABEL: @reduce_and_pointer_cast_wide(118; CHECK-NEXT: bb:119; CHECK-NEXT: [[LHS:%.*]] = load <8 x i16>, ptr [[ARG1:%.*]], align 16120; CHECK-NEXT: [[RHS:%.*]] = load <8 x i16>, ptr [[ARG:%.*]], align 16121; CHECK-NEXT: [[CMP:%.*]] = icmp ne <8 x i16> [[LHS]], [[RHS]]122; CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i1> [[CMP]] to i8123; CHECK-NEXT: [[ALL_EQ:%.*]] = icmp eq i8 [[TMP0]], 0124; CHECK-NEXT: ret i1 [[ALL_EQ]]125;126bb:127 %lhs = load <8 x i16>, ptr %arg1128 %rhs = load <8 x i16>, ptr %arg129 %cmp = icmp eq <8 x i16> %lhs, %rhs130 %all_eq = call i1 @llvm.vector.reduce.and.v8i32(<8 x i1> %cmp)131 ret i1 %all_eq132}133 134define i1 @reduce_and_pointer_cast_ne(ptr %arg, ptr %arg1) {135; CHECK-LABEL: @reduce_and_pointer_cast_ne(136; CHECK-NEXT: bb:137; CHECK-NEXT: [[LHS1:%.*]] = load i64, ptr [[ARG1:%.*]], align 8138; CHECK-NEXT: [[RHS2:%.*]] = load i64, ptr [[ARG:%.*]], align 8139; CHECK-NEXT: [[ALL_EQ:%.*]] = icmp ne i64 [[LHS1]], [[RHS2]]140; CHECK-NEXT: ret i1 [[ALL_EQ]]141;142bb:143 %lhs = load <8 x i8>, ptr %arg1144 %rhs = load <8 x i8>, ptr %arg145 %cmp = icmp eq <8 x i8> %lhs, %rhs146 %all_eq = call i1 @llvm.vector.reduce.and.v8i32(<8 x i1> %cmp)147 %any_ne = xor i1 %all_eq, 1148 ret i1 %any_ne149}150 151define i1 @reduce_and_pointer_cast_ne_wide(ptr %arg, ptr %arg1) {152; CHECK-LABEL: @reduce_and_pointer_cast_ne_wide(153; CHECK-NEXT: bb:154; CHECK-NEXT: [[LHS:%.*]] = load <8 x i16>, ptr [[ARG1:%.*]], align 16155; CHECK-NEXT: [[RHS:%.*]] = load <8 x i16>, ptr [[ARG:%.*]], align 16156; CHECK-NEXT: [[CMP:%.*]] = icmp ne <8 x i16> [[LHS]], [[RHS]]157; CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i1> [[CMP]] to i8158; CHECK-NEXT: [[ALL_EQ:%.*]] = icmp ne i8 [[TMP0]], 0159; CHECK-NEXT: ret i1 [[ALL_EQ]]160;161bb:162 %lhs = load <8 x i16>, ptr %arg1163 %rhs = load <8 x i16>, ptr %arg164 %cmp = icmp eq <8 x i16> %lhs, %rhs165 %all_eq = call i1 @llvm.vector.reduce.and.v8i32(<8 x i1> %cmp)166 %any_ne = xor i1 %all_eq, 1167 ret i1 %any_ne168}169 170declare i1 @llvm.vector.reduce.and.v8i32(<8 x i1> %a)171declare i32 @llvm.vector.reduce.and.v4i32(<4 x i32> %a)172declare i64 @llvm.vector.reduce.and.v8i64(<8 x i64> %a)173declare i16 @llvm.vector.reduce.and.v16i16(<16 x i16> %a)174declare i8 @llvm.vector.reduce.and.v128i8(<128 x i8> %a)175