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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4define i1 @reduce_umin_self(<8 x i1> %x) {5; CHECK-LABEL: @reduce_umin_self(6; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[X:%.*]] to i87; CHECK-NEXT: [[RES:%.*]] = icmp eq i8 [[TMP1]], -18; CHECK-NEXT: ret i1 [[RES]]9;10 %res = call i1 @llvm.vector.reduce.umin.v8i32(<8 x i1> %x)11 ret i1 %res12}13 14define i32 @reduce_umin_sext(<4 x i1> %x) {15; CHECK-LABEL: @reduce_umin_sext(16; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i1> [[X:%.*]] to i417; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i4 [[TMP1]], -118; CHECK-NEXT: [[RES:%.*]] = sext i1 [[TMP2]] to i3219; CHECK-NEXT: ret i32 [[RES]]20;21 %sext = sext <4 x i1> %x to <4 x i32>22 %res = call i32 @llvm.vector.reduce.umin.v4i32(<4 x i32> %sext)23 ret i32 %res24}25 26define i64 @reduce_umin_zext(<8 x i1> %x) {27; CHECK-LABEL: @reduce_umin_zext(28; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[X:%.*]] to i829; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], -130; CHECK-NEXT: [[RES:%.*]] = zext i1 [[TMP2]] to i6431; CHECK-NEXT: ret i64 [[RES]]32;33 %zext = zext <8 x i1> %x to <8 x i64>34 %res = call i64 @llvm.vector.reduce.umin.v8i64(<8 x i64> %zext)35 ret i64 %res36}37 38define i16 @reduce_umin_sext_same(<16 x i1> %x) {39; CHECK-LABEL: @reduce_umin_sext_same(40; CHECK-NEXT: [[TMP1:%.*]] = bitcast <16 x i1> [[X:%.*]] to i1641; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i16 [[TMP1]], -142; CHECK-NEXT: [[RES:%.*]] = sext i1 [[TMP2]] to i1643; CHECK-NEXT: ret i16 [[RES]]44;45 %sext = sext <16 x i1> %x to <16 x i16>46 %res = call i16 @llvm.vector.reduce.umin.v16i16(<16 x i16> %sext)47 ret i16 %res48}49 50define i8 @reduce_umin_zext_long(<128 x i1> %x) {51; CHECK-LABEL: @reduce_umin_zext_long(52; CHECK-NEXT: [[TMP1:%.*]] = bitcast <128 x i1> [[X:%.*]] to i12853; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i128 [[TMP1]], -154; CHECK-NEXT: [[RES:%.*]] = sext i1 [[TMP2]] to i855; CHECK-NEXT: ret i8 [[RES]]56;57 %sext = sext <128 x i1> %x to <128 x i8>58 %res = call i8 @llvm.vector.reduce.umin.v128i8(<128 x i8> %sext)59 ret i8 %res60}61 62@glob = external global i8, align 163define i8 @reduce_umin_zext_long_external_use(<128 x i1> %x) {64; CHECK-LABEL: @reduce_umin_zext_long_external_use(65; CHECK-NEXT: [[TMP1:%.*]] = bitcast <128 x i1> [[X:%.*]] to i12866; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i128 [[TMP1]], -167; CHECK-NEXT: [[RES:%.*]] = sext i1 [[TMP2]] to i868; CHECK-NEXT: [[TMP3:%.*]] = extractelement <128 x i1> [[X]], i64 069; CHECK-NEXT: [[EXT:%.*]] = sext i1 [[TMP3]] to i870; CHECK-NEXT: store i8 [[EXT]], ptr @glob, align 171; CHECK-NEXT: ret i8 [[RES]]72;73 %sext = sext <128 x i1> %x to <128 x i8>74 %res = call i8 @llvm.vector.reduce.umin.v128i8(<128 x i8> %sext)75 %ext = extractelement <128 x i8> %sext, i32 076 store i8 %ext, ptr @glob, align 177 ret i8 %res78}79 80@glob1 = external global i64, align 881define i64 @reduce_umin_zext_external_use(<8 x i1> %x) {82; CHECK-LABEL: @reduce_umin_zext_external_use(83; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[X:%.*]] to i884; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], -185; CHECK-NEXT: [[RES:%.*]] = zext i1 [[TMP2]] to i6486; CHECK-NEXT: [[TMP3:%.*]] = extractelement <8 x i1> [[X]], i64 087; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[TMP3]] to i6488; CHECK-NEXT: store i64 [[EXT]], ptr @glob1, align 889; CHECK-NEXT: ret i64 [[RES]]90;91 %zext = zext <8 x i1> %x to <8 x i64>92 %res = call i64 @llvm.vector.reduce.umin.v8i64(<8 x i64> %zext)93 %ext = extractelement <8 x i64> %zext, i32 094 store i64 %ext, ptr @glob1, align 895 ret i64 %res96}97 98declare i1 @llvm.vector.reduce.umin.v8i32(<8 x i1> %a)99declare i32 @llvm.vector.reduce.umin.v4i32(<4 x i32> %a)100declare i64 @llvm.vector.reduce.umin.v8i64(<8 x i64> %a)101declare i16 @llvm.vector.reduce.umin.v16i16(<16 x i16> %a)102declare i8 @llvm.vector.reduce.umin.v128i8(<128 x i8> %a)103