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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4declare i5 @llvm.smin.i5(i5, i5)5declare <2 x i8> @llvm.smax.v2i8(<2 x i8>, <2 x i8>)6declare i5 @llvm.umin.i5(i5, i5)7declare <3 x i5> @llvm.umax.v3i5(<3 x i5>, <3 x i5>)8 9define i5 @smin_smin_common_op_00(i1 %cond, i5 %x, i5 %y, i5 %z) {10; CHECK-LABEL: @smin_smin_common_op_00(11; CHECK-NEXT: [[MINMAXOP:%.*]] = select i1 [[COND:%.*]], i5 [[X:%.*]], i5 [[Y:%.*]]12; CHECK-NEXT: [[SEL:%.*]] = call i5 @llvm.smin.i5(i5 [[MINMAXOP]], i5 [[Z:%.*]])13; CHECK-NEXT: ret i5 [[SEL]]14;15 %m1 = call i5 @llvm.smin.i5(i5 %z, i5 %x)16 %m2 = call i5 @llvm.smin.i5(i5 %z, i5 %y)17 %sel = select i1 %cond, i5 %m1, i5 %m218 ret i5 %sel19}20 21define <2 x i8> @smax_smax_common_op_01(<2 x i1> %cond, <2 x i8> %x, <2 x i8> %y, <2 x i8> %z) {22; CHECK-LABEL: @smax_smax_common_op_01(23; CHECK-NEXT: [[MINMAXOP:%.*]] = select <2 x i1> [[COND:%.*]], <2 x i8> [[X:%.*]], <2 x i8> [[Y:%.*]]24; CHECK-NEXT: [[SEL:%.*]] = call <2 x i8> @llvm.smax.v2i8(<2 x i8> [[MINMAXOP]], <2 x i8> [[Z:%.*]])25; CHECK-NEXT: ret <2 x i8> [[SEL]]26;27 %m1 = call <2 x i8> @llvm.smax.v2i8(<2 x i8> %z, <2 x i8> %x)28 %m2 = call <2 x i8> @llvm.smax.v2i8(<2 x i8> %y, <2 x i8> %z)29 %sel = select <2 x i1> %cond, <2 x i8> %m1, <2 x i8> %m230 ret <2 x i8> %sel31}32 33define i5 @umin_umin_common_op_10(i1 %cond, i5 %x, i5 %y, i5 %z, ptr %p) {34; CHECK-LABEL: @umin_umin_common_op_10(35; CHECK-NEXT: [[M1:%.*]] = call i5 @llvm.umin.i5(i5 [[X:%.*]], i5 [[Z:%.*]])36; CHECK-NEXT: store i5 [[M1]], ptr [[P:%.*]], align 137; CHECK-NEXT: [[MINMAXOP:%.*]] = select i1 [[COND:%.*]], i5 [[X]], i5 [[Y:%.*]]38; CHECK-NEXT: [[SEL:%.*]] = call i5 @llvm.umin.i5(i5 [[MINMAXOP]], i5 [[Z]])39; CHECK-NEXT: ret i5 [[SEL]]40;41 %m1 = call i5 @llvm.umin.i5(i5 %x, i5 %z)42 store i5 %m1, ptr %p43 %m2 = call i5 @llvm.umin.i5(i5 %z, i5 %y)44 %sel = select i1 %cond, i5 %m1, i5 %m245 ret i5 %sel46}47 48define <3 x i5> @umax_umax_common_op_11(i1 %cond, <3 x i5> %x, <3 x i5> %y, <3 x i5> %z, ptr %p) {49; CHECK-LABEL: @umax_umax_common_op_11(50; CHECK-NEXT: [[M2:%.*]] = call <3 x i5> @llvm.umax.v3i5(<3 x i5> [[Y:%.*]], <3 x i5> [[Z:%.*]])51; CHECK-NEXT: store <3 x i5> [[M2]], ptr [[P:%.*]], align 252; CHECK-NEXT: [[MINMAXOP:%.*]] = select i1 [[COND:%.*]], <3 x i5> [[X:%.*]], <3 x i5> [[Y]]53; CHECK-NEXT: [[SEL:%.*]] = call <3 x i5> @llvm.umax.v3i5(<3 x i5> [[MINMAXOP]], <3 x i5> [[Z]])54; CHECK-NEXT: ret <3 x i5> [[SEL]]55;56 %m1 = call <3 x i5> @llvm.umax.v3i5(<3 x i5> %x, <3 x i5> %z)57 %m2 = call <3 x i5> @llvm.umax.v3i5(<3 x i5> %y, <3 x i5> %z)58 store <3 x i5> %m2, ptr %p59 %sel = select i1 %cond, <3 x i5> %m1, <3 x i5> %m260 ret <3 x i5> %sel61}62 63; negative test - intrinsic mismatch64 65define i5 @smin_umin_common_op_11(i1 %cond, i5 %x, i5 %y, i5 %z) {66; CHECK-LABEL: @smin_umin_common_op_11(67; CHECK-NEXT: [[M1:%.*]] = call i5 @llvm.smin.i5(i5 [[X:%.*]], i5 [[Z:%.*]])68; CHECK-NEXT: [[M2:%.*]] = call i5 @llvm.umin.i5(i5 [[Y:%.*]], i5 [[Z]])69; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], i5 [[M1]], i5 [[M2]]70; CHECK-NEXT: ret i5 [[SEL]]71;72 %m1 = call i5 @llvm.smin.i5(i5 %x, i5 %z)73 %m2 = call i5 @llvm.umin.i5(i5 %y, i5 %z)74 %sel = select i1 %cond, i5 %m1, i5 %m275 ret i5 %sel76}77 78; negative test - require shared operand79 80define i5 @smin_smin_no_common_op(i1 %cond, i5 %x, i5 %y, i5 %z, i5 %w) {81; CHECK-LABEL: @smin_smin_no_common_op(82; CHECK-NEXT: [[M1:%.*]] = call i5 @llvm.smin.i5(i5 [[Z:%.*]], i5 [[X:%.*]])83; CHECK-NEXT: [[M2:%.*]] = call i5 @llvm.smin.i5(i5 [[W:%.*]], i5 [[Y:%.*]])84; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], i5 [[M1]], i5 [[M2]]85; CHECK-NEXT: ret i5 [[SEL]]86;87 %m1 = call i5 @llvm.smin.i5(i5 %z, i5 %x)88 %m2 = call i5 @llvm.smin.i5(i5 %w, i5 %y)89 %sel = select i1 %cond, i5 %m1, i5 %m290 ret i5 %sel91}92 93; negative test - too many uses94 95define i5 @umin_umin_common_op_10_uses(i1 %cond, i5 %x, i5 %y, i5 %z, ptr %p1, ptr %p2) {96; CHECK-LABEL: @umin_umin_common_op_10_uses(97; CHECK-NEXT: [[M1:%.*]] = call i5 @llvm.umin.i5(i5 [[X:%.*]], i5 [[Z:%.*]])98; CHECK-NEXT: store i5 [[M1]], ptr [[P1:%.*]], align 199; CHECK-NEXT: [[M2:%.*]] = call i5 @llvm.umin.i5(i5 [[Z]], i5 [[Y:%.*]])100; CHECK-NEXT: store i5 [[M2]], ptr [[P2:%.*]], align 1101; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], i5 [[M1]], i5 [[M2]]102; CHECK-NEXT: ret i5 [[SEL]]103;104 %m1 = call i5 @llvm.umin.i5(i5 %x, i5 %z)105 store i5 %m1, ptr %p1106 %m2 = call i5 @llvm.umin.i5(i5 %z, i5 %y)107 store i5 %m2, ptr %p2108 %sel = select i1 %cond, i5 %m1, i5 %m2109 ret i5 %sel110}111 112define i5 @smin_select_const_const(i1 %b) {113; CHECK-LABEL: @smin_select_const_const(114; CHECK-NEXT: [[C:%.*]] = select i1 [[B:%.*]], i5 -3, i5 5115; CHECK-NEXT: ret i5 [[C]]116;117 %s = select i1 %b, i5 -3, i5 8118 %c = call i5 @llvm.smin.i5(i5 %s, i5 5)119 ret i5 %c120}121 122define <2 x i8> @smax_select_const_const(<2 x i1> %b) {123; CHECK-LABEL: @smax_select_const_const(124; CHECK-NEXT: [[C:%.*]] = select <2 x i1> [[B:%.*]], <2 x i8> <i8 1, i8 42>, <2 x i8> <i8 5, i8 43>125; CHECK-NEXT: ret <2 x i8> [[C]]126;127 %s = select <2 x i1> %b, <2 x i8> <i8 1, i8 3>, <2 x i8> <i8 5, i8 43>128 %c = call <2 x i8> @llvm.smax.v2i8(<2 x i8> %s, <2 x i8> <i8 0, i8 42>)129 ret <2 x i8> %c130}131 132define i5 @umin_select_const_const(i1 %b) {133; CHECK-LABEL: @umin_select_const_const(134; CHECK-NEXT: [[C:%.*]] = select i1 [[B:%.*]], i5 4, i5 3135; CHECK-NEXT: ret i5 [[C]]136;137 %s = select i1 %b, i5 8, i5 3138 %c = call i5 @llvm.umin.i5(i5 4, i5 %s)139 ret i5 %c140}141 142define <3 x i5> @umax_select_const_const(<3 x i1> %b) {143; CHECK-LABEL: @umax_select_const_const(144; CHECK-NEXT: [[C:%.*]] = select <3 x i1> [[B:%.*]], <3 x i5> <i5 5, i5 8, i5 -16>, <3 x i5> <i5 7, i5 8, i5 -16>145; CHECK-NEXT: ret <3 x i5> [[C]]146;147 %s = select <3 x i1> %b, <3 x i5> <i5 2, i5 3, i5 4>, <3 x i5> <i5 7, i5 8, i5 9>148 %c = call <3 x i5> @llvm.umax.v3i5(<3 x i5> <i5 5, i5 8, i5 16>, <3 x i5> %s)149 ret <3 x i5> %c150}151 152define i5 @smin_select_const(i1 %b, i5 %x) {153; CHECK-LABEL: @smin_select_const(154; CHECK-NEXT: [[TMP1:%.*]] = call i5 @llvm.smin.i5(i5 [[X:%.*]], i5 5)155; CHECK-NEXT: [[C:%.*]] = select i1 [[B:%.*]], i5 -3, i5 [[TMP1]]156; CHECK-NEXT: ret i5 [[C]]157;158 %s = select i1 %b, i5 -3, i5 %x159 %c = call i5 @llvm.smin.i5(i5 %s, i5 5)160 ret i5 %c161}162 163define <2 x i8> @smax_select_const(<2 x i1> %b, <2 x i8> %x) {164; CHECK-LABEL: @smax_select_const(165; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.smax.v2i8(<2 x i8> [[X:%.*]], <2 x i8> <i8 0, i8 42>)166; CHECK-NEXT: [[C:%.*]] = select <2 x i1> [[B:%.*]], <2 x i8> [[TMP1]], <2 x i8> <i8 5, i8 43>167; CHECK-NEXT: ret <2 x i8> [[C]]168;169 %s = select <2 x i1> %b, <2 x i8> %x, <2 x i8> <i8 5, i8 43>170 %c = call <2 x i8> @llvm.smax.v2i8(<2 x i8> %s, <2 x i8> <i8 0, i8 42>)171 ret <2 x i8> %c172}173 174define i5 @umin_select_const(i1 %b, i5 %x) {175; CHECK-LABEL: @umin_select_const(176; CHECK-NEXT: [[TMP1:%.*]] = call i5 @llvm.umin.i5(i5 [[X:%.*]], i5 4)177; CHECK-NEXT: [[C:%.*]] = select i1 [[B:%.*]], i5 [[TMP1]], i5 3178; CHECK-NEXT: ret i5 [[C]]179;180 %s = select i1 %b, i5 %x, i5 3181 %c = call i5 @llvm.umin.i5(i5 4, i5 %s)182 ret i5 %c183}184 185define <3 x i5> @umax_select_const(<3 x i1> %b, <3 x i5> %x) {186; CHECK-LABEL: @umax_select_const(187; CHECK-NEXT: [[TMP1:%.*]] = call <3 x i5> @llvm.umax.v3i5(<3 x i5> [[X:%.*]], <3 x i5> <i5 5, i5 8, i5 1>)188; CHECK-NEXT: [[C:%.*]] = select <3 x i1> [[B:%.*]], <3 x i5> <i5 5, i5 8, i5 4>, <3 x i5> [[TMP1]]189; CHECK-NEXT: ret <3 x i5> [[C]]190;191 %s = select <3 x i1> %b, <3 x i5> <i5 2, i5 3, i5 4>, <3 x i5> %x192 %c = call <3 x i5> @llvm.umax.v3i5(<3 x i5> <i5 5, i5 8, i5 1>, <3 x i5> %s)193 ret <3 x i5> %c194}195 196declare i32 @llvm.smax.i32(i32, i32);197declare i32 @llvm.smin.i32(i32, i32);198declare i8 @llvm.umax.i8(i8, i8);199declare i8 @llvm.umin.i8(i8, i8);200 201; Each of the following 4 tests would infinite loop because202; we had conflicting transforms for icmp and select using203; known bits.204 205define i32 @smax_smin(i32 %x) {206; CHECK-LABEL: @smax_smin(207; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], 0208; CHECK-NEXT: [[S:%.*]] = zext i1 [[TMP1]] to i32209; CHECK-NEXT: ret i32 [[S]]210;211 %m = call i32 @llvm.smax.i32(i32 %x, i32 0)212 %c = icmp slt i32 %x, 1213 %s = select i1 %c, i32 %m, i32 1214 ret i32 %s215}216 217define i32 @smin_smax(i32 %x) {218; CHECK-LABEL: @smin_smax(219; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], -1220; CHECK-NEXT: [[S:%.*]] = select i1 [[TMP1]], i32 -2, i32 -1221; CHECK-NEXT: ret i32 [[S]]222;223 %m = call i32 @llvm.smin.i32(i32 %x, i32 -1)224 %c = icmp sgt i32 %x, -2225 %s = select i1 %c, i32 %m, i32 -2226 ret i32 %s227}228 229define i8 @umax_umin(i8 %x) {230; CHECK-LABEL: @umax_umin(231; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i8 [[X:%.*]], -127232; CHECK-NEXT: [[S:%.*]] = select i1 [[TMP1]], i8 -128, i8 -127233; CHECK-NEXT: ret i8 [[S]]234;235 %m = call i8 @llvm.umax.i8(i8 %x, i8 128)236 %c = icmp ult i8 %x, 129237 %s = select i1 %c, i8 %m, i8 129238 ret i8 %s239}240 241define i8 @umin_umax(i8 %x) {242; CHECK-LABEL: @umin_umax(243; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i8 [[X:%.*]], 127244; CHECK-NEXT: [[S:%.*]] = select i1 [[TMP1]], i8 126, i8 127245; CHECK-NEXT: ret i8 [[S]]246;247 %m = call i8 @llvm.umin.i8(i8 %x, i8 127)248 %c = icmp ugt i8 %x, 126249 %s = select i1 %c, i8 %m, i8 126250 ret i8 %s251}252 253define i8 @not_smax(i8 %i41, i8 %i43) {254; CHECK-LABEL: @not_smax(255; CHECK-NEXT: [[I44:%.*]] = icmp slt i8 [[I41:%.*]], [[I43:%.*]]256; CHECK-NEXT: [[I46:%.*]] = sub nsw i8 [[I41]], [[I43]]257; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[I44]], i8 0, i8 [[I46]]258; CHECK-NEXT: ret i8 [[SPEC_SELECT]]259;260 %i44 = icmp slt i8 %i41, %i43261 %i46 = sub nsw i8 %i41, %i43262 %spec.select = select i1 %i44, i8 0, i8 %i46263 ret i8 %spec.select264}265 266define i8 @not_smax_swap(i8 %i41, i8 %i43) {267; CHECK-LABEL: @not_smax_swap(268; CHECK-NEXT: [[I44:%.*]] = icmp sgt i8 [[I41:%.*]], [[I43:%.*]]269; CHECK-NEXT: [[I46:%.*]] = sub nsw i8 [[I41]], [[I43]]270; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[I44]], i8 [[I46]], i8 0271; CHECK-NEXT: ret i8 [[SPEC_SELECT]]272;273 %i44 = icmp sgt i8 %i41, %i43274 %i46 = sub nsw i8 %i41, %i43275 %spec.select = select i1 %i44, i8 %i46, i8 0276 ret i8 %spec.select277}278 279define i8 @not_smin(i8 %i41, i8 %i43) {280; CHECK-LABEL: @not_smin(281; CHECK-NEXT: [[I44:%.*]] = icmp sgt i8 [[I41:%.*]], [[I43:%.*]]282; CHECK-NEXT: [[I46:%.*]] = sub nsw i8 [[I41]], [[I43]]283; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[I44]], i8 0, i8 [[I46]]284; CHECK-NEXT: ret i8 [[SPEC_SELECT]]285;286 %i44 = icmp sgt i8 %i41, %i43287 %i46 = sub nsw i8 %i41, %i43288 %spec.select = select i1 %i44, i8 0, i8 %i46289 ret i8 %spec.select290}291 292define i8 @not_smin_swap(i8 %i41, i8 %i43) {293; CHECK-LABEL: @not_smin_swap(294; CHECK-NEXT: [[I44:%.*]] = icmp slt i8 [[I41:%.*]], [[I43:%.*]]295; CHECK-NEXT: [[I46:%.*]] = sub nsw i8 [[I41]], [[I43]]296; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[I44]], i8 [[I46]], i8 0297; CHECK-NEXT: ret i8 [[SPEC_SELECT]]298;299 %i44 = icmp slt i8 %i41, %i43300 %i46 = sub nsw i8 %i41, %i43301 %spec.select = select i1 %i44, i8 %i46, i8 0302 ret i8 %spec.select303}304 305define i8 @sel_umin_constant(i8 %x) {306; CHECK-LABEL: @sel_umin_constant(307; CHECK-NEXT: [[UMIN:%.*]] = call i8 @llvm.umin.i8(i8 [[X:%.*]], i8 16)308; CHECK-NEXT: ret i8 [[UMIN]]309;310 %cmp = icmp sgt i8 %x, -1311 %umin = call i8 @llvm.umin.i8(i8 %x, i8 16)312 %sel = select i1 %cmp, i8 %umin, i8 16313 ret i8 %sel314}315 316define i8 @sel_constant_smax_with_range_attr(i8 %x) {317; CHECK-LABEL: @sel_constant_smax_with_range_attr(318; CHECK-NEXT: [[SEL:%.*]] = call i8 @llvm.smax.i8(i8 [[X:%.*]], i8 16)319; CHECK-NEXT: ret i8 [[SEL]]320;321 %cmp = icmp slt i8 %x, 0322 %smax = call range(i8 8, 16) i8 @llvm.smax.i8(i8 %x, i8 16)323 %sel = select i1 %cmp, i8 16, i8 %smax324 ret i8 %sel325}326 327; Negative tests328 329define i8 @sel_umin_constant_mismatch(i8 %x) {330; CHECK-LABEL: @sel_umin_constant_mismatch(331; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[X:%.*]], -1332; CHECK-NEXT: [[UMIN:%.*]] = call i8 @llvm.umin.i8(i8 [[X]], i8 16)333; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 [[UMIN]], i8 15334; CHECK-NEXT: ret i8 [[SEL]]335;336 %cmp = icmp sgt i8 %x, -1337 %umin = call i8 @llvm.umin.i8(i8 %x, i8 16)338 %sel = select i1 %cmp, i8 %umin, i8 15339 ret i8 %sel340}341 342define i8 @sel_umin_constant_op_mismatch(i8 %x, i8 %y) {343; CHECK-LABEL: @sel_umin_constant_op_mismatch(344; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[X:%.*]], -1345; CHECK-NEXT: [[UMIN:%.*]] = call i8 @llvm.umin.i8(i8 [[Y:%.*]], i8 16)346; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 [[UMIN]], i8 16347; CHECK-NEXT: ret i8 [[SEL]]348;349 %cmp = icmp sgt i8 %x, -1350 %umin = call i8 @llvm.umin.i8(i8 %y, i8 16)351 %sel = select i1 %cmp, i8 %umin, i8 16352 ret i8 %sel353}354 355define i8 @sel_umin_non_constant(i8 %x, i8 %y) {356; CHECK-LABEL: @sel_umin_non_constant(357; CHECK-NEXT: [[UMIN:%.*]] = call i8 @llvm.umin.i8(i8 [[X:%.*]], i8 16)358; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i8 [[X]], 0359; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP1]], i8 [[Y:%.*]], i8 [[UMIN]]360; CHECK-NEXT: ret i8 [[SEL]]361;362 %cmp = icmp sgt i8 %x, -1363 %umin = call i8 @llvm.umin.i8(i8 %x, i8 16)364 %sel = select i1 %cmp, i8 %umin, i8 %y365 ret i8 %sel366}367