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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; This test makes sure that these instructions are properly eliminated.3;4; RUN: opt < %s -passes=instcombine -S | FileCheck %s5 6define i32 @shl_C1_add_A_C2_i32(i16 %A) {7; CHECK-LABEL: @shl_C1_add_A_C2_i32(8; CHECK-NEXT: [[B:%.*]] = zext nneg i16 [[A:%.*]] to i329; CHECK-NEXT: [[D:%.*]] = shl i32 192, [[B]]10; CHECK-NEXT: ret i32 [[D]]11;12 %B = zext i16 %A to i3213 %C = add i32 %B, 514 %D = shl i32 6, %C15 ret i32 %D16}17 18define i32 @ashr_C1_add_A_C2_i32(i32 %A) {19; CHECK-LABEL: @ashr_C1_add_A_C2_i32(20; CHECK-NEXT: ret i32 021;22 %B = and i32 %A, 6553523 %C = add i32 %B, 524 %D = ashr i32 6, %C25 ret i32 %D26}27 28define i32 @lshr_C1_add_A_C2_i32(i32 %A) {29; CHECK-LABEL: @lshr_C1_add_A_C2_i32(30; CHECK-NEXT: [[B:%.*]] = and i32 [[A:%.*]], 6553531; CHECK-NEXT: [[D:%.*]] = shl i32 192, [[B]]32; CHECK-NEXT: ret i32 [[D]]33;34 %B = and i32 %A, 6553535 %C = add i32 %B, 536 %D = shl i32 6, %C37 ret i32 %D38}39 40define <4 x i32> @shl_C1_add_A_C2_v4i32(<4 x i16> %A) {41; CHECK-LABEL: @shl_C1_add_A_C2_v4i32(42; CHECK-NEXT: [[B:%.*]] = zext nneg <4 x i16> [[A:%.*]] to <4 x i32>43; CHECK-NEXT: [[D:%.*]] = shl <4 x i32> <i32 6, i32 4, i32 poison, i32 -458752>, [[B]]44; CHECK-NEXT: ret <4 x i32> [[D]]45;46 %B = zext <4 x i16> %A to <4 x i32>47 %C = add <4 x i32> %B, <i32 0, i32 1, i32 50, i32 16>48 %D = shl <4 x i32> <i32 6, i32 2, i32 1, i32 -7>, %C49 ret <4 x i32> %D50}51 52define <4 x i32> @ashr_C1_add_A_C2_v4i32(<4 x i32> %A) {53; CHECK-LABEL: @ashr_C1_add_A_C2_v4i32(54; CHECK-NEXT: [[B:%.*]] = and <4 x i32> [[A:%.*]], <i32 0, i32 15, i32 255, i32 65535>55; CHECK-NEXT: [[D:%.*]] = ashr <4 x i32> <i32 6, i32 1, i32 poison, i32 -1>, [[B]]56; CHECK-NEXT: ret <4 x i32> [[D]]57;58 %B = and <4 x i32> %A, <i32 0, i32 15, i32 255, i32 65535>59 %C = add <4 x i32> %B, <i32 0, i32 1, i32 50, i32 16>60 %D = ashr <4 x i32> <i32 6, i32 2, i32 1, i32 -7>, %C61 ret <4 x i32> %D62}63 64define <4 x i32> @lshr_C1_add_A_C2_v4i32(<4 x i32> %A) {65; CHECK-LABEL: @lshr_C1_add_A_C2_v4i32(66; CHECK-NEXT: [[B:%.*]] = and <4 x i32> [[A:%.*]], <i32 0, i32 15, i32 255, i32 65535>67; CHECK-NEXT: [[D:%.*]] = lshr <4 x i32> <i32 6, i32 1, i32 poison, i32 65535>, [[B]]68; CHECK-NEXT: ret <4 x i32> [[D]]69;70 %B = and <4 x i32> %A, <i32 0, i32 15, i32 255, i32 65535>71 %C = add <4 x i32> %B, <i32 0, i32 1, i32 50, i32 16>72 %D = lshr <4 x i32> <i32 6, i32 2, i32 1, i32 -7>, %C73 ret <4 x i32> %D74}75 76define <4 x i32> @shl_C1_add_A_C2_v4i32_splat(i16 %I) {77; CHECK-LABEL: @shl_C1_add_A_C2_v4i32_splat(78; CHECK-NEXT: [[A:%.*]] = zext i16 [[I:%.*]] to i3279; CHECK-NEXT: [[B:%.*]] = insertelement <4 x i32> poison, i32 [[A]], i64 080; CHECK-NEXT: [[C:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> poison, <4 x i32> zeroinitializer81; CHECK-NEXT: [[E:%.*]] = shl <4 x i32> <i32 6, i32 4, i32 poison, i32 -458752>, [[C]]82; CHECK-NEXT: ret <4 x i32> [[E]]83;84 %A = zext i16 %I to i3285 %B = insertelement <4 x i32> poison, i32 %A, i32 086 %C = shufflevector <4 x i32> %B, <4 x i32> poison, <4 x i32> zeroinitializer87 %D = add <4 x i32> %C, <i32 0, i32 1, i32 50, i32 16>88 %E = shl <4 x i32> <i32 6, i32 2, i32 1, i32 -7>, %D89 ret <4 x i32> %E90}91 92define <4 x i32> @ashr_C1_add_A_C2_v4i32_splat(i16 %I) {93; CHECK-LABEL: @ashr_C1_add_A_C2_v4i32_splat(94; CHECK-NEXT: [[A:%.*]] = zext i16 [[I:%.*]] to i3295; CHECK-NEXT: [[B:%.*]] = insertelement <4 x i32> poison, i32 [[A]], i64 096; CHECK-NEXT: [[C:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> poison, <4 x i32> zeroinitializer97; CHECK-NEXT: [[E:%.*]] = ashr <4 x i32> <i32 6, i32 1, i32 poison, i32 -1>, [[C]]98; CHECK-NEXT: ret <4 x i32> [[E]]99;100 %A = zext i16 %I to i32101 %B = insertelement <4 x i32> poison, i32 %A, i32 0102 %C = shufflevector <4 x i32> %B, <4 x i32> poison, <4 x i32> zeroinitializer103 %D = add <4 x i32> %C, <i32 0, i32 1, i32 50, i32 16>104 %E = ashr <4 x i32> <i32 6, i32 2, i32 1, i32 -7>, %D105 ret <4 x i32> %E106}107 108define <4 x i32> @lshr_C1_add_A_C2_v4i32_splat(i16 %I) {109; CHECK-LABEL: @lshr_C1_add_A_C2_v4i32_splat(110; CHECK-NEXT: [[A:%.*]] = zext i16 [[I:%.*]] to i32111; CHECK-NEXT: [[B:%.*]] = insertelement <4 x i32> poison, i32 [[A]], i64 0112; CHECK-NEXT: [[C:%.*]] = shufflevector <4 x i32> [[B]], <4 x i32> poison, <4 x i32> zeroinitializer113; CHECK-NEXT: [[E:%.*]] = lshr <4 x i32> <i32 6, i32 1, i32 poison, i32 65535>, [[C]]114; CHECK-NEXT: ret <4 x i32> [[E]]115;116 %A = zext i16 %I to i32117 %B = insertelement <4 x i32> poison, i32 %A, i32 0118 %C = shufflevector <4 x i32> %B, <4 x i32> poison, <4 x i32> zeroinitializer119 %D = add <4 x i32> %C, <i32 0, i32 1, i32 50, i32 16>120 %E = lshr <4 x i32> <i32 6, i32 2, i32 1, i32 -7>, %D121 ret <4 x i32> %E122}123