brintos

brintos / llvm-project-archived public Read only

0
0
Text · 5.9 KiB · 6cf60a7 Raw
215 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=instcombine -S < %s | FileCheck %s3 4declare void @use(i32)5 6define i32 @shl_sub_i32(i32 %x) {7; CHECK-LABEL: @shl_sub_i32(8; CHECK-NEXT:    [[R:%.*]] = lshr exact i32 -2147483648, [[X:%.*]]9; CHECK-NEXT:    ret i32 [[R]]10;11  %s = sub i32 31, %x12  %r = shl i32 1, %s13  ret i32 %r14}15 16define i32 @shl_sub_multiuse_i32(i32 %x) {17; CHECK-LABEL: @shl_sub_multiuse_i32(18; CHECK-NEXT:    [[S:%.*]] = sub i32 31, [[X:%.*]]19; CHECK-NEXT:    call void @use(i32 [[S]])20; CHECK-NEXT:    [[R:%.*]] = lshr exact i32 -2147483648, [[X]]21; CHECK-NEXT:    ret i32 [[R]]22;23  %s = sub i32 31, %x24  call void @use(i32 %s)25  %r = shl i32 1, %s26  ret i32 %r27}28 29define i8 @shl_sub_i8(i8 %x) {30; CHECK-LABEL: @shl_sub_i8(31; CHECK-NEXT:    [[R:%.*]] = lshr exact i8 -128, [[X:%.*]]32; CHECK-NEXT:    ret i8 [[R]]33;34  %s = sub i8 7, %x35  %r = shl i8 1, %s36  ret i8 %r37}38 39define i64 @shl_sub_i64(i64 %x) {40; CHECK-LABEL: @shl_sub_i64(41; CHECK-NEXT:    [[R:%.*]] = lshr exact i64 -9223372036854775808, [[X:%.*]]42; CHECK-NEXT:    ret i64 [[R]]43;44  %s = sub i64 63, %x45  %r = shl i64 1, %s46  ret i64 %r47}48 49define <2 x i64> @shl_sub_i64_vec(<2 x i64> %x) {50; CHECK-LABEL: @shl_sub_i64_vec(51; CHECK-NEXT:    [[R:%.*]] = lshr exact <2 x i64> splat (i64 -9223372036854775808), [[X:%.*]]52; CHECK-NEXT:    ret <2 x i64> [[R]]53;54  %s = sub <2 x i64> <i64 63, i64 63>, %x55  %r = shl <2 x i64> <i64 1, i64 1>, %s56  ret <2 x i64> %r57}58 59define <3 x i64> @shl_sub_i64_vec_poison(<3 x i64> %x) {60; CHECK-LABEL: @shl_sub_i64_vec_poison(61; CHECK-NEXT:    [[R:%.*]] = lshr exact <3 x i64> splat (i64 -9223372036854775808), [[X:%.*]]62; CHECK-NEXT:    ret <3 x i64> [[R]]63;64  %s = sub <3 x i64> <i64 63, i64 63, i64 63>, %x65  %r = shl <3 x i64> <i64 1, i64 poison, i64 1>, %s66  ret <3 x i64> %r67}68 69; Negative tests70 71define i32 @shl_bad_sub_i32(i32 %x) {72; CHECK-LABEL: @shl_bad_sub_i32(73; CHECK-NEXT:    [[S:%.*]] = sub i32 32, [[X:%.*]]74; CHECK-NEXT:    [[R:%.*]] = shl nuw i32 1, [[S]]75; CHECK-NEXT:    ret i32 [[R]]76;77  %s = sub i32 32, %x78  %r = shl i32 1, %s79  ret i32 %r80}81 82define i32 @bad_shl_sub_i32(i32 %x) {83; CHECK-LABEL: @bad_shl_sub_i32(84; CHECK-NEXT:    [[S:%.*]] = sub i32 31, [[X:%.*]]85; CHECK-NEXT:    [[R:%.*]] = shl i32 2, [[S]]86; CHECK-NEXT:    ret i32 [[R]]87;88  %s = sub i32 31, %x89  %r = shl i32 2, %s90  ret i32 %r91}92 93define i32 @shl_bad_sub2_i32(i32 %x) {94; CHECK-LABEL: @shl_bad_sub2_i32(95; CHECK-NEXT:    [[S:%.*]] = add i32 [[X:%.*]], -3196; CHECK-NEXT:    [[R:%.*]] = shl nuw i32 1, [[S]]97; CHECK-NEXT:    ret i32 [[R]]98;99  %s = sub i32 %x, 31100  %r = shl i32 1, %s101  ret i32 %r102}103 104define i32 @bad_shl2_sub_i32(i32 %x) {105; CHECK-LABEL: @bad_shl2_sub_i32(106; CHECK-NEXT:    [[S:%.*]] = add i32 [[X:%.*]], -31107; CHECK-NEXT:    [[R:%.*]] = shl nuw i32 1, [[S]]108; CHECK-NEXT:    ret i32 [[R]]109;110  %s = sub i32 %x, 31111  %r = shl i32 1, %s112  ret i32 %r113}114 115define i8 @shl_bad_sub_i8(i8 %x) {116; CHECK-LABEL: @shl_bad_sub_i8(117; CHECK-NEXT:    [[S:%.*]] = sub i8 4, [[X:%.*]]118; CHECK-NEXT:    [[R:%.*]] = shl nuw i8 1, [[S]]119; CHECK-NEXT:    ret i8 [[R]]120;121  %s = sub i8 4, %x122  %r = shl i8 1, %s123  ret i8 %r124}125 126define i64 @shl_bad_sub_i64(i64 %x) {127; CHECK-LABEL: @shl_bad_sub_i64(128; CHECK-NEXT:    [[S:%.*]] = sub i64 67, [[X:%.*]]129; CHECK-NEXT:    [[R:%.*]] = shl nuw i64 1, [[S]]130; CHECK-NEXT:    ret i64 [[R]]131;132  %s = sub i64 67, %x133  %r = shl i64 1, %s134  ret i64 %r135}136 137define <2 x i64> @shl_bad_sub_i64_vec(<2 x i64> %x) {138; CHECK-LABEL: @shl_bad_sub_i64_vec(139; CHECK-NEXT:    [[S:%.*]] = sub <2 x i64> splat (i64 53), [[X:%.*]]140; CHECK-NEXT:    [[R:%.*]] = shl nuw <2 x i64> splat (i64 1), [[S]]141; CHECK-NEXT:    ret <2 x i64> [[R]]142;143  %s = sub <2 x i64> <i64 53, i64 53>, %x144  %r = shl <2 x i64> <i64 1, i64 1>, %s145  ret <2 x i64> %r146}147 148define <2 x i64> @bad_shl_sub_i64_vec(<2 x i64> %x) {149; CHECK-LABEL: @bad_shl_sub_i64_vec(150; CHECK-NEXT:    [[S:%.*]] = sub <2 x i64> splat (i64 63), [[X:%.*]]151; CHECK-NEXT:    [[R:%.*]] = shl <2 x i64> splat (i64 2), [[S]]152; CHECK-NEXT:    ret <2 x i64> [[R]]153;154  %s = sub <2 x i64> <i64 63, i64 63>, %x155  %r = shl <2 x i64> <i64 2, i64 2>, %s156  ret <2 x i64> %r157}158 159define <3 x i64> @shl_sub_i64_vec_undef_bad(<3 x i64> %x) {160; CHECK-LABEL: @shl_sub_i64_vec_undef_bad(161; CHECK-NEXT:    [[S:%.*]] = sub <3 x i64> <i64 63, i64 undef, i64 63>, [[X:%.*]]162; CHECK-NEXT:    [[R:%.*]] = shl nuw <3 x i64> splat (i64 1), [[S]]163; CHECK-NEXT:    ret <3 x i64> [[R]]164;165  %s = sub <3 x i64> <i64 63, i64 undef, i64 63>, %x166  %r = shl <3 x i64> <i64 1, i64 1, i64 1>, %s167  ret <3 x i64> %r168}169 170define <3 x i64> @shl_sub_i64_vec_poison_bad2(<3 x i64> %x) {171; CHECK-LABEL: @shl_sub_i64_vec_poison_bad2(172; CHECK-NEXT:    [[S:%.*]] = sub <3 x i64> <i64 63, i64 poison, i64 63>, [[X:%.*]]173; CHECK-NEXT:    [[R:%.*]] = shl nuw <3 x i64> <i64 1, i64 poison, i64 1>, [[S]]174; CHECK-NEXT:    ret <3 x i64> [[R]]175;176  %s = sub <3 x i64> <i64 63, i64 poison, i64 63>, %x177  %r = shl <3 x i64> <i64 1, i64 poison, i64 1>, %s178  ret <3 x i64> %r179}180 181define i32 @shl_const_op1_sub_const_op0(i32 %x) {182; CHECK-LABEL: @shl_const_op1_sub_const_op0(183; CHECK-NEXT:    [[TMP1:%.*]] = shl i32 [[X:%.*]], 3184; CHECK-NEXT:    [[R:%.*]] = sub i32 336, [[TMP1]]185; CHECK-NEXT:    ret i32 [[R]]186;187  %s = sub i32 42, %x188  %r = shl i32 %s, 3189  ret i32 %r190}191 192define <2 x i32> @shl_const_op1_sub_const_op0_splat(<2 x i32> %x) {193; CHECK-LABEL: @shl_const_op1_sub_const_op0_splat(194; CHECK-NEXT:    [[TMP1:%.*]] = shl <2 x i32> [[X:%.*]], splat (i32 3)195; CHECK-NEXT:    [[R:%.*]] = sub <2 x i32> splat (i32 336), [[TMP1]]196; CHECK-NEXT:    ret <2 x i32> [[R]]197;198  %s = sub <2 x i32> <i32 42, i32 42>, %x199  %r = shl <2 x i32> %s, <i32 3, i32 3>200  ret <2 x i32> %r201}202 203define i32 @shl_const_op1_sub_const_op0_use(i32 %x) {204; CHECK-LABEL: @shl_const_op1_sub_const_op0_use(205; CHECK-NEXT:    [[S:%.*]] = sub i32 42, [[X:%.*]]206; CHECK-NEXT:    call void @use(i32 [[S]])207; CHECK-NEXT:    [[R:%.*]] = shl i32 [[S]], 3208; CHECK-NEXT:    ret i32 [[R]]209;210  %s = sub i32 42, %x211  call void @use(i32 %s)212  %r = shl i32 %s, 3213  ret i32 %r214}215