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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -S < %s -passes=instcombine | FileCheck %s3 4define i1 @test_direct_implication(i1 %cond) {5; CHECK-LABEL: @test_direct_implication(6; CHECK-NEXT: entry:7; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]8; CHECK: if.true:9; CHECK-NEXT: br label [[MERGE:%.*]]10; CHECK: if.false:11; CHECK-NEXT: br label [[MERGE]]12; CHECK: merge:13; CHECK-NEXT: ret i1 [[COND]]14;15entry:16 br i1 %cond, label %if.true, label %if.false17 18if.true:19 br label %merge20 21if.false:22 br label %merge23 24merge:25 %ret = phi i1 [true, %if.true], [false, %if.false]26 ret i1 %ret27}28 29define i1 @test_inverted_implication(i1 %cond) {30; CHECK-LABEL: @test_inverted_implication(31; CHECK-NEXT: entry:32; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]33; CHECK: if.true:34; CHECK-NEXT: br label [[MERGE:%.*]]35; CHECK: if.false:36; CHECK-NEXT: br label [[MERGE]]37; CHECK: merge:38; CHECK-NEXT: [[RET:%.*]] = xor i1 [[COND]], true39; CHECK-NEXT: ret i1 [[RET]]40;41entry:42 br i1 %cond, label %if.true, label %if.false43 44if.true:45 br label %merge46 47if.false:48 br label %merge49 50merge:51 %ret = phi i1 [false, %if.true], [true, %if.false]52 ret i1 %ret53}54 55define i1 @test_edge_dominance(i1 %cmp) {56; CHECK-LABEL: @test_edge_dominance(57; CHECK-NEXT: entry:58; CHECK-NEXT: br i1 [[CMP:%.*]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]59; CHECK: if.then:60; CHECK-NEXT: br label [[IF_END]]61; CHECK: if.end:62; CHECK-NEXT: ret i1 [[CMP]]63;64entry:65 br i1 %cmp, label %if.end, label %if.then66 67if.then:68 br label %if.end69 70if.end:71 %phi = phi i1 [ true, %entry ], [ false, %if.then ]72 ret i1 %phi73}74 75define i1 @test_direct_implication_complex_cfg(i1 %cond, i32 %cnt1) {76; CHECK-LABEL: @test_direct_implication_complex_cfg(77; CHECK-NEXT: entry:78; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]79; CHECK: if.true:80; CHECK-NEXT: br label [[LOOP1:%.*]]81; CHECK: loop1:82; CHECK-NEXT: [[IV1:%.*]] = phi i32 [ 0, [[IF_TRUE]] ], [ [[IV1_NEXT:%.*]], [[LOOP1]] ]83; CHECK-NEXT: [[IV1_NEXT]] = add i32 [[IV1]], 184; CHECK-NEXT: [[LOOP_COND_1:%.*]] = icmp slt i32 [[IV1_NEXT]], [[CNT1:%.*]]85; CHECK-NEXT: br i1 [[LOOP_COND_1]], label [[LOOP1]], label [[IF_TRUE_END:%.*]]86; CHECK: if.true.end:87; CHECK-NEXT: br label [[MERGE:%.*]]88; CHECK: if.false:89; CHECK-NEXT: br label [[MERGE]]90; CHECK: merge:91; CHECK-NEXT: ret i1 [[COND]]92;93entry:94 br i1 %cond, label %if.true, label %if.false95 96if.true:97 br label %loop198 99loop1:100 %iv1 = phi i32 [0, %if.true], [%iv1.next, %loop1]101 %iv1.next = add i32 %iv1, 1102 %loop.cond.1 = icmp slt i32 %iv1.next, %cnt1103 br i1 %loop.cond.1, label %loop1, label %if.true.end104 105if.true.end:106 br label %merge107 108if.false:109 br label %merge110 111merge:112 %ret = phi i1 [true, %if.true.end], [false, %if.false]113 ret i1 %ret114}115 116define i1 @test_inverted_implication_complex_cfg(i1 %cond, i32 %cnt1) {117; CHECK-LABEL: @test_inverted_implication_complex_cfg(118; CHECK-NEXT: entry:119; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]120; CHECK: if.true:121; CHECK-NEXT: br label [[LOOP1:%.*]]122; CHECK: loop1:123; CHECK-NEXT: [[IV1:%.*]] = phi i32 [ 0, [[IF_TRUE]] ], [ [[IV1_NEXT:%.*]], [[LOOP1]] ]124; CHECK-NEXT: [[IV1_NEXT]] = add i32 [[IV1]], 1125; CHECK-NEXT: [[LOOP_COND_1:%.*]] = icmp slt i32 [[IV1_NEXT]], [[CNT1:%.*]]126; CHECK-NEXT: br i1 [[LOOP_COND_1]], label [[LOOP1]], label [[IF_TRUE_END:%.*]]127; CHECK: if.true.end:128; CHECK-NEXT: br label [[MERGE:%.*]]129; CHECK: if.false:130; CHECK-NEXT: br label [[MERGE]]131; CHECK: merge:132; CHECK-NEXT: [[RET:%.*]] = xor i1 [[COND]], true133; CHECK-NEXT: ret i1 [[RET]]134;135entry:136 br i1 %cond, label %if.true, label %if.false137 138if.true:139 br label %loop1140 141loop1:142 %iv1 = phi i32 [0, %if.true], [%iv1.next, %loop1]143 %iv1.next = add i32 %iv1, 1144 %loop.cond.1 = icmp slt i32 %iv1.next, %cnt1145 br i1 %loop.cond.1, label %loop1, label %if.true.end146 147if.true.end:148 br label %merge149 150if.false:151 br label %merge152 153merge:154 %ret = phi i1 [false, %if.true.end], [true, %if.false]155 ret i1 %ret156}157 158define i1 @test_multiple_predecessors(i1 %cond, i1 %cond2) {159; CHECK-LABEL: @test_multiple_predecessors(160; CHECK-NEXT: entry:161; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]162; CHECK: if.true:163; CHECK-NEXT: br label [[MERGE:%.*]]164; CHECK: if.false:165; CHECK-NEXT: br i1 [[COND2:%.*]], label [[IF2_TRUE:%.*]], label [[IF2_FALSE:%.*]]166; CHECK: if2.true:167; CHECK-NEXT: br label [[MERGE]]168; CHECK: if2.false:169; CHECK-NEXT: br label [[MERGE]]170; CHECK: merge:171; CHECK-NEXT: ret i1 [[COND]]172;173entry:174 br i1 %cond, label %if.true, label %if.false175 176if.true:177 br label %merge178 179if.false:180 br i1 %cond2, label %if2.true, label %if2.false181 182if2.true:183 br label %merge184 185if2.false:186 br label %merge187 188merge:189 %ret = phi i1 [ true, %if.true ], [ false, %if2.true ], [ false, %if2.false ]190 ret i1 %ret191}192 193define i1 @test_multiple_predecessors_wrong_value(i1 %cond, i1 %cond2) {194; CHECK-LABEL: @test_multiple_predecessors_wrong_value(195; CHECK-NEXT: entry:196; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]197; CHECK: if.true:198; CHECK-NEXT: br label [[MERGE:%.*]]199; CHECK: if.false:200; CHECK-NEXT: br i1 [[COND2:%.*]], label [[IF2_TRUE:%.*]], label [[IF2_FALSE:%.*]]201; CHECK: if2.true:202; CHECK-NEXT: br label [[MERGE]]203; CHECK: if2.false:204; CHECK-NEXT: br label [[MERGE]]205; CHECK: merge:206; CHECK-NEXT: [[RET:%.*]] = phi i1 [ true, [[IF_TRUE]] ], [ true, [[IF2_TRUE]] ], [ false, [[IF2_FALSE]] ]207; CHECK-NEXT: ret i1 [[RET]]208;209entry:210 br i1 %cond, label %if.true, label %if.false211 212if.true:213 br label %merge214 215if.false:216 br i1 %cond2, label %if2.true, label %if2.false217 218if2.true:219 br label %merge220 221if2.false:222 br label %merge223 224merge:225 %ret = phi i1 [ true, %if.true ], [ true, %if2.true ], [ false, %if2.false ]226 ret i1 %ret227}228 229define i1 @test_multiple_predecessors_no_edge_domination(i1 %cond, i1 %cond2) {230; CHECK-LABEL: @test_multiple_predecessors_no_edge_domination(231; CHECK-NEXT: entry:232; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]233; CHECK: if.true:234; CHECK-NEXT: br i1 [[COND2:%.*]], label [[MERGE:%.*]], label [[IF_FALSE]]235; CHECK: if.false:236; CHECK-NEXT: br i1 [[COND2]], label [[IF2_TRUE:%.*]], label [[IF2_FALSE:%.*]]237; CHECK: if2.true:238; CHECK-NEXT: br label [[MERGE]]239; CHECK: if2.false:240; CHECK-NEXT: br label [[MERGE]]241; CHECK: merge:242; CHECK-NEXT: [[RET:%.*]] = phi i1 [ true, [[IF_TRUE]] ], [ false, [[IF2_TRUE]] ], [ false, [[IF2_FALSE]] ]243; CHECK-NEXT: ret i1 [[RET]]244;245entry:246 br i1 %cond, label %if.true, label %if.false247 248if.true:249 br i1 %cond2, label %merge, label %if.false250 251if.false:252 br i1 %cond2, label %if2.true, label %if2.false253 254if2.true:255 br label %merge256 257if2.false:258 br label %merge259 260merge:261 %ret = phi i1 [ true, %if.true ], [ false, %if2.true ], [ false, %if2.false ]262 ret i1 %ret263}264 265define i8 @test_switch(i8 %cond) {266; CHECK-LABEL: @test_switch(267; CHECK-NEXT: entry:268; CHECK-NEXT: switch i8 [[COND:%.*]], label [[DEFAULT:%.*]] [269; CHECK-NEXT: i8 1, label [[SW_1:%.*]]270; CHECK-NEXT: i8 7, label [[SW_7:%.*]]271; CHECK-NEXT: i8 19, label [[SW_19:%.*]]272; CHECK-NEXT: ]273; CHECK: sw.1:274; CHECK-NEXT: br label [[MERGE:%.*]]275; CHECK: sw.7:276; CHECK-NEXT: br label [[MERGE]]277; CHECK: sw.19:278; CHECK-NEXT: br label [[MERGE]]279; CHECK: default:280; CHECK-NEXT: ret i8 42281; CHECK: merge:282; CHECK-NEXT: ret i8 [[COND]]283;284entry:285 switch i8 %cond, label %default [286 i8 1, label %sw.1287 i8 7, label %sw.7288 i8 19, label %sw.19289 ]290 291sw.1:292 br label %merge293 294sw.7:295 br label %merge296 297sw.19:298 br label %merge299 300default:301 ret i8 42302 303merge:304 %ret = phi i8 [ 1, %sw.1 ], [ 7, %sw.7 ], [ 19, %sw.19 ]305 ret i8 %ret306}307 308define i8 @test_switch_direct_edge(i8 %cond) {309; CHECK-LABEL: @test_switch_direct_edge(310; CHECK-NEXT: entry:311; CHECK-NEXT: switch i8 [[COND:%.*]], label [[DEFAULT:%.*]] [312; CHECK-NEXT: i8 1, label [[SW_1:%.*]]313; CHECK-NEXT: i8 7, label [[SW_7:%.*]]314; CHECK-NEXT: i8 19, label [[MERGE:%.*]]315; CHECK-NEXT: ]316; CHECK: sw.1:317; CHECK-NEXT: br label [[MERGE]]318; CHECK: sw.7:319; CHECK-NEXT: br label [[MERGE]]320; CHECK: default:321; CHECK-NEXT: ret i8 42322; CHECK: merge:323; CHECK-NEXT: ret i8 [[COND]]324;325entry:326 switch i8 %cond, label %default [327 i8 1, label %sw.1328 i8 7, label %sw.7329 i8 19, label %merge330 ]331 332sw.1:333 br label %merge334 335sw.7:336 br label %merge337 338default:339 ret i8 42340 341merge:342 %ret = phi i8 [ 1, %sw.1 ], [ 7, %sw.7 ], [ 19, %entry ]343 ret i8 %ret344}345 346define i8 @test_switch_duplicate_direct_edge(i8 %cond) {347; CHECK-LABEL: @test_switch_duplicate_direct_edge(348; CHECK-NEXT: entry:349; CHECK-NEXT: switch i8 [[COND:%.*]], label [[DEFAULT:%.*]] [350; CHECK-NEXT: i8 1, label [[SW_1:%.*]]351; CHECK-NEXT: i8 7, label [[MERGE:%.*]]352; CHECK-NEXT: i8 19, label [[MERGE]]353; CHECK-NEXT: ]354; CHECK: sw.1:355; CHECK-NEXT: br label [[MERGE]]356; CHECK: default:357; CHECK-NEXT: ret i8 42358; CHECK: merge:359; CHECK-NEXT: [[RET:%.*]] = phi i8 [ 1, [[SW_1]] ], [ 7, [[ENTRY:%.*]] ], [ 7, [[ENTRY]] ]360; CHECK-NEXT: ret i8 [[RET]]361;362entry:363 switch i8 %cond, label %default [364 i8 1, label %sw.1365 i8 7, label %merge366 i8 19, label %merge367 ]368 369sw.1:370 br label %merge371 372default:373 ret i8 42374 375merge:376 %ret = phi i8 [ 1, %sw.1 ], [ 7, %entry ], [ 7, %entry ]377 ret i8 %ret378}379 380define i8 @test_switch_subset(i8 %cond) {381; CHECK-LABEL: @test_switch_subset(382; CHECK-NEXT: entry:383; CHECK-NEXT: switch i8 [[COND:%.*]], label [[DEFAULT:%.*]] [384; CHECK-NEXT: i8 1, label [[SW_1:%.*]]385; CHECK-NEXT: i8 7, label [[SW_7:%.*]]386; CHECK-NEXT: i8 19, label [[SW_19:%.*]]387; CHECK-NEXT: ]388; CHECK: sw.1:389; CHECK-NEXT: br label [[MERGE:%.*]]390; CHECK: sw.7:391; CHECK-NEXT: br label [[MERGE]]392; CHECK: sw.19:393; CHECK-NEXT: ret i8 24394; CHECK: default:395; CHECK-NEXT: ret i8 42396; CHECK: merge:397; CHECK-NEXT: ret i8 [[COND]]398;399entry:400 switch i8 %cond, label %default [401 i8 1, label %sw.1402 i8 7, label %sw.7403 i8 19, label %sw.19404 ]405 406sw.1:407 br label %merge408 409sw.7:410 br label %merge411 412sw.19:413 ret i8 24414 415default:416 ret i8 42417 418merge:419 %ret = phi i8 [ 1, %sw.1 ], [ 7, %sw.7 ]420 ret i8 %ret421}422 423define i8 @test_switch_wrong_value(i8 %cond) {424; CHECK-LABEL: @test_switch_wrong_value(425; CHECK-NEXT: entry:426; CHECK-NEXT: switch i8 [[COND:%.*]], label [[DEFAULT:%.*]] [427; CHECK-NEXT: i8 1, label [[SW_1:%.*]]428; CHECK-NEXT: i8 7, label [[SW_7:%.*]]429; CHECK-NEXT: i8 19, label [[SW_19:%.*]]430; CHECK-NEXT: ]431; CHECK: sw.1:432; CHECK-NEXT: br label [[MERGE:%.*]]433; CHECK: sw.7:434; CHECK-NEXT: br label [[MERGE]]435; CHECK: sw.19:436; CHECK-NEXT: br label [[MERGE]]437; CHECK: default:438; CHECK-NEXT: ret i8 42439; CHECK: merge:440; CHECK-NEXT: [[RET:%.*]] = phi i8 [ 1, [[SW_1]] ], [ 7, [[SW_7]] ], [ 10, [[SW_19]] ]441; CHECK-NEXT: ret i8 [[RET]]442;443entry:444 switch i8 %cond, label %default [445 i8 1, label %sw.1446 i8 7, label %sw.7447 i8 19, label %sw.19448 ]449 450sw.1:451 br label %merge452 453sw.7:454 br label %merge455 456sw.19:457 br label %merge458 459default:460 ret i8 42461 462merge:463 %ret = phi i8 [ 1, %sw.1 ], [ 7, %sw.7 ], [ 10, %sw.19 ]464 ret i8 %ret465}466 467define i8 @test_switch_inverted(i8 %cond) {468; CHECK-LABEL: @test_switch_inverted(469; CHECK-NEXT: entry:470; CHECK-NEXT: switch i8 [[COND:%.*]], label [[DEFAULT:%.*]] [471; CHECK-NEXT: i8 0, label [[SW_0:%.*]]472; CHECK-NEXT: i8 1, label [[SW_1:%.*]]473; CHECK-NEXT: i8 2, label [[SW_2:%.*]]474; CHECK-NEXT: ]475; CHECK: sw.0:476; CHECK-NEXT: br label [[MERGE:%.*]]477; CHECK: sw.1:478; CHECK-NEXT: br label [[MERGE]]479; CHECK: sw.2:480; CHECK-NEXT: br label [[MERGE]]481; CHECK: default:482; CHECK-NEXT: ret i8 42483; CHECK: merge:484; CHECK-NEXT: [[RET:%.*]] = xor i8 [[COND]], -1485; CHECK-NEXT: ret i8 [[RET]]486;487entry:488 switch i8 %cond, label %default [489 i8 0, label %sw.0490 i8 1, label %sw.1491 i8 2, label %sw.2492 ]493 494sw.0:495 br label %merge496 497sw.1:498 br label %merge499 500sw.2:501 br label %merge502 503default:504 ret i8 42505 506merge:507 %ret = phi i8 [ -1, %sw.0 ], [ -2, %sw.1 ], [ -3, %sw.2 ]508 ret i8 %ret509}510 511define i8 @test_switch_duplicate_edge(i8 %cond) {512; CHECK-LABEL: @test_switch_duplicate_edge(513; CHECK-NEXT: entry:514; CHECK-NEXT: switch i8 [[COND:%.*]], label [[DEFAULT:%.*]] [515; CHECK-NEXT: i8 1, label [[SW_1:%.*]]516; CHECK-NEXT: i8 7, label [[SW_7:%.*]]517; CHECK-NEXT: i8 19, label [[SW_7]]518; CHECK-NEXT: ]519; CHECK: sw.1:520; CHECK-NEXT: br label [[MERGE:%.*]]521; CHECK: sw.7:522; CHECK-NEXT: br label [[MERGE]]523; CHECK: default:524; CHECK-NEXT: ret i8 42525; CHECK: merge:526; CHECK-NEXT: [[RET:%.*]] = phi i8 [ 1, [[SW_1]] ], [ 7, [[SW_7]] ]527; CHECK-NEXT: ret i8 [[RET]]528;529entry:530 switch i8 %cond, label %default [531 i8 1, label %sw.1532 i8 7, label %sw.7533 i8 19, label %sw.7534 ]535 536sw.1:537 br label %merge538 539sw.7:540 br label %merge541 542default:543 ret i8 42544 545merge:546 %ret = phi i8 [ 1, %sw.1 ], [ 7, %sw.7 ]547 ret i8 %ret548}549 550define i8 @test_switch_default_edge(i8 %cond) {551; CHECK-LABEL: @test_switch_default_edge(552; CHECK-NEXT: entry:553; CHECK-NEXT: switch i8 [[COND:%.*]], label [[MERGE:%.*]] [554; CHECK-NEXT: i8 1, label [[SW_1:%.*]]555; CHECK-NEXT: i8 7, label [[SW_7:%.*]]556; CHECK-NEXT: i8 19, label [[SW_19:%.*]]557; CHECK-NEXT: ]558; CHECK: sw.1:559; CHECK-NEXT: br label [[MERGE]]560; CHECK: sw.7:561; CHECK-NEXT: br label [[MERGE]]562; CHECK: sw.19:563; CHECK-NEXT: br label [[MERGE]]564; CHECK: merge:565; CHECK-NEXT: [[RET:%.*]] = phi i8 [ 1, [[SW_1]] ], [ 7, [[SW_7]] ], [ 19, [[SW_19]] ], [ 42, [[ENTRY:%.*]] ]566; CHECK-NEXT: ret i8 [[RET]]567;568entry:569 switch i8 %cond, label %merge [570 i8 1, label %sw.1571 i8 7, label %sw.7572 i8 19, label %sw.19573 ]574 575sw.1:576 br label %merge577 578sw.7:579 br label %merge580 581sw.19:582 br label %merge583 584merge:585 %ret = phi i8 [ 1, %sw.1 ], [ 7, %sw.7 ], [ 19, %sw.19 ], [ 42, %entry ]586 ret i8 %ret587}588 589define i8 @test_switch_default_edge_direct(i8 %cond) {590; CHECK-LABEL: @test_switch_default_edge_direct(591; CHECK-NEXT: entry:592; CHECK-NEXT: switch i8 [[COND:%.*]], label [[MERGE:%.*]] [593; CHECK-NEXT: i8 1, label [[SW_1:%.*]]594; CHECK-NEXT: i8 7, label [[SW_7:%.*]]595; CHECK-NEXT: i8 19, label [[MERGE]]596; CHECK-NEXT: ]597; CHECK: sw.1:598; CHECK-NEXT: br label [[MERGE]]599; CHECK: sw.7:600; CHECK-NEXT: br label [[MERGE]]601; CHECK: merge:602; CHECK-NEXT: [[RET:%.*]] = phi i8 [ 1, [[SW_1]] ], [ 7, [[SW_7]] ], [ 19, [[ENTRY:%.*]] ], [ 19, [[ENTRY]] ]603; CHECK-NEXT: ret i8 [[RET]]604;605entry:606 switch i8 %cond, label %merge [607 i8 1, label %sw.1608 i8 7, label %sw.7609 i8 19, label %merge610 ]611sw.1:612 br label %merge613sw.7:614 br label %merge615merge:616 %ret = phi i8 [ 1, %sw.1 ], [ 7, %sw.7 ], [ 19, %entry ], [ 19, %entry ]617 ret i8 %ret618}619 620define i8 @test_switch_default_edge_duplicate(i8 %cond) {621; CHECK-LABEL: @test_switch_default_edge_duplicate(622; CHECK-NEXT: entry:623; CHECK-NEXT: switch i8 [[COND:%.*]], label [[SW_19:%.*]] [624; CHECK-NEXT: i8 1, label [[SW_1:%.*]]625; CHECK-NEXT: i8 7, label [[SW_7:%.*]]626; CHECK-NEXT: i8 19, label [[SW_19]]627; CHECK-NEXT: ]628; CHECK: sw.1:629; CHECK-NEXT: br label [[MERGE:%.*]]630; CHECK: sw.7:631; CHECK-NEXT: br label [[MERGE]]632; CHECK: sw.19:633; CHECK-NEXT: br label [[MERGE]]634; CHECK: merge:635; CHECK-NEXT: [[RET:%.*]] = phi i8 [ 1, [[SW_1]] ], [ 7, [[SW_7]] ], [ 19, [[SW_19]] ]636; CHECK-NEXT: ret i8 [[RET]]637;638entry:639 switch i8 %cond, label %sw.19 [640 i8 1, label %sw.1641 i8 7, label %sw.7642 i8 19, label %sw.19643 ]644sw.1:645 br label %merge646sw.7:647 br label %merge648sw.19:649 br label %merge650merge:651 %ret = phi i8 [ 1, %sw.1 ], [ 7, %sw.7 ], [ 19, %sw.19 ]652 ret i8 %ret653}654 655define i32 @test_phi_to_zext(i8 noundef %0) {656; CHECK-LABEL: @test_phi_to_zext(657; CHECK-NEXT: entry:658; CHECK-NEXT: switch i8 [[TMP0:%.*]], label [[DEFAULT:%.*]] [659; CHECK-NEXT: i8 -1, label [[SW_255:%.*]]660; CHECK-NEXT: i8 0, label [[SW_0:%.*]]661; CHECK-NEXT: i8 1, label [[SW_1:%.*]]662; CHECK-NEXT: ]663; CHECK: default:664; CHECK-NEXT: unreachable665; CHECK: sw.255:666; CHECK-NEXT: br label [[MERGE:%.*]]667; CHECK: sw.0:668; CHECK-NEXT: br label [[MERGE]]669; CHECK: sw.1:670; CHECK-NEXT: br label [[MERGE]]671; CHECK: merge:672; CHECK-NEXT: [[DOT0:%.*]] = phi i32 [ 1, [[SW_1]] ], [ 0, [[SW_0]] ], [ 255, [[SW_255]] ]673; CHECK-NEXT: ret i32 [[DOT0]]674;675entry:676 switch i8 %0, label %default [677 i8 255, label %sw.255678 i8 0, label %sw.0679 i8 1, label %sw.1680 ]681 682default:683 unreachable684 685sw.255:686 br label %merge687 688sw.0:689 br label %merge690 691sw.1:692 br label %merge693 694merge:695 %.0 = phi i32 [ 1, %sw.1 ], [ 0, %sw.0 ], [ 255, %sw.255 ]696 ret i32 %.0697}698 699define i32 @test_phi_to_zext_inverted(i8 noundef %0) {700; CHECK-LABEL: @test_phi_to_zext_inverted(701; CHECK-NEXT: entry:702; CHECK-NEXT: switch i8 [[TMP0:%.*]], label [[DEFAULT:%.*]] [703; CHECK-NEXT: i8 -1, label [[SW_255:%.*]]704; CHECK-NEXT: i8 0, label [[SW_0:%.*]]705; CHECK-NEXT: i8 1, label [[SW_1:%.*]]706; CHECK-NEXT: ]707; CHECK: default:708; CHECK-NEXT: unreachable709; CHECK: sw.255:710; CHECK-NEXT: br label [[MERGE:%.*]]711; CHECK: sw.0:712; CHECK-NEXT: br label [[MERGE]]713; CHECK: sw.1:714; CHECK-NEXT: br label [[MERGE]]715; CHECK: merge:716; CHECK-NEXT: [[DOT0:%.*]] = phi i32 [ -256, [[SW_255]] ], [ -2, [[SW_1]] ], [ -1, [[SW_0]] ]717; CHECK-NEXT: ret i32 [[DOT0]]718;719entry:720 switch i8 %0, label %default [721 i8 255, label %sw.255722 i8 0, label %sw.0723 i8 1, label %sw.1724 ]725 726default:727 unreachable728 729sw.255:730 br label %merge731 732sw.0:733 br label %merge734 735sw.1:736 br label %merge737 738merge:739 %.0 = phi i32 [ -256, %sw.255 ], [ -2, %sw.1 ], [ -1, %sw.0 ]740 ret i32 %.0741}742 743define i8 @test_multiple_predecessors_phi_to_zext(i1 %cond, i1 %cond2) {744; CHECK-LABEL: @test_multiple_predecessors_phi_to_zext(745; CHECK-NEXT: entry:746; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]747; CHECK: if.true:748; CHECK-NEXT: br i1 [[COND2:%.*]], label [[IF2_TRUE:%.*]], label [[IF2_FALSE:%.*]]749; CHECK: if.false:750; CHECK-NEXT: br label [[MERGE:%.*]]751; CHECK: if2.true:752; CHECK-NEXT: br label [[MERGE]]753; CHECK: if2.false:754; CHECK-NEXT: br label [[MERGE]]755; CHECK: merge:756; CHECK-NEXT: [[RET:%.*]] = phi i8 [ 0, [[IF_FALSE]] ], [ 1, [[IF2_TRUE]] ], [ 1, [[IF2_FALSE]] ]757; CHECK-NEXT: ret i8 [[RET]]758;759entry:760 br i1 %cond, label %if.true, label %if.false761 762if.true:763 br i1 %cond2, label %if2.true, label %if2.false764 765if.false:766 br label %merge767 768if2.true:769 br label %merge770 771if2.false:772 br label %merge773 774merge:775 %ret = phi i8 [ 0, %if.false ], [ 1, %if2.true ], [ 1, %if2.false ]776 ret i8 %ret777}778 779define i32 @test_phi_to_sext(i8 noundef %0) {780; CHECK-LABEL: @test_phi_to_sext(781; CHECK-NEXT: entry:782; CHECK-NEXT: switch i8 [[TMP0:%.*]], label [[DEFAULT:%.*]] [783; CHECK-NEXT: i8 -1, label [[SW_255:%.*]]784; CHECK-NEXT: i8 0, label [[SW_0:%.*]]785; CHECK-NEXT: i8 1, label [[SW_1:%.*]]786; CHECK-NEXT: ]787; CHECK: default:788; CHECK-NEXT: unreachable789; CHECK: sw.255:790; CHECK-NEXT: br label [[MERGE:%.*]]791; CHECK: sw.0:792; CHECK-NEXT: br label [[MERGE]]793; CHECK: sw.1:794; CHECK-NEXT: br label [[MERGE]]795; CHECK: merge:796; CHECK-NEXT: [[DOT0:%.*]] = phi i32 [ 1, [[SW_1]] ], [ 0, [[SW_0]] ], [ -1, [[SW_255]] ]797; CHECK-NEXT: ret i32 [[DOT0]]798;799entry:800 switch i8 %0, label %default [801 i8 255, label %sw.255802 i8 0, label %sw.0803 i8 1, label %sw.1804 ]805 806default:807 unreachable808 809sw.255:810 br label %merge811 812sw.0:813 br label %merge814 815sw.1:816 br label %merge817 818merge:819 %.0 = phi i32 [ 1, %sw.1 ], [ 0, %sw.0 ], [ -1, %sw.255 ]820 ret i32 %.0821}822 823define i32 @test_phi_to_sext_inverted(i8 noundef %0) {824; CHECK-LABEL: @test_phi_to_sext_inverted(825; CHECK-NEXT: entry:826; CHECK-NEXT: switch i8 [[TMP0:%.*]], label [[DEFAULT:%.*]] [827; CHECK-NEXT: i8 -1, label [[SW_255:%.*]]828; CHECK-NEXT: i8 0, label [[SW_0:%.*]]829; CHECK-NEXT: i8 1, label [[SW_1:%.*]]830; CHECK-NEXT: ]831; CHECK: default:832; CHECK-NEXT: unreachable833; CHECK: sw.255:834; CHECK-NEXT: br label [[MERGE:%.*]]835; CHECK: sw.0:836; CHECK-NEXT: br label [[MERGE]]837; CHECK: sw.1:838; CHECK-NEXT: br label [[MERGE]]839; CHECK: merge:840; CHECK-NEXT: [[DOT0:%.*]] = phi i32 [ -2, [[SW_1]] ], [ -1, [[SW_0]] ], [ 0, [[SW_255]] ]841; CHECK-NEXT: ret i32 [[DOT0]]842;843entry:844 switch i8 %0, label %default [845 i8 255, label %sw.255846 i8 0, label %sw.0847 i8 1, label %sw.1848 ]849 850default:851 unreachable852 853sw.255:854 br label %merge855 856sw.0:857 br label %merge858 859sw.1:860 br label %merge861 862merge:863 %.0 = phi i32 [ -2, %sw.1 ], [ -1, %sw.0 ], [ 0, %sw.255 ]864 ret i32 %.0865}866 867define i8 @test_multiple_predecessors_phi_to_sext(i1 %cond, i1 %cond2) {868; CHECK-LABEL: @test_multiple_predecessors_phi_to_sext(869; CHECK-NEXT: entry:870; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]871; CHECK: if.true:872; CHECK-NEXT: br i1 [[COND2:%.*]], label [[IF2_TRUE:%.*]], label [[IF2_FALSE:%.*]]873; CHECK: if.false:874; CHECK-NEXT: br label [[MERGE:%.*]]875; CHECK: if2.true:876; CHECK-NEXT: br label [[MERGE]]877; CHECK: if2.false:878; CHECK-NEXT: br label [[MERGE]]879; CHECK: merge:880; CHECK-NEXT: [[RET:%.*]] = phi i8 [ 0, [[IF_FALSE]] ], [ -1, [[IF2_TRUE]] ], [ -1, [[IF2_FALSE]] ]881; CHECK-NEXT: ret i8 [[RET]]882;883entry:884 br i1 %cond, label %if.true, label %if.false885 886if.true:887 br i1 %cond2, label %if2.true, label %if2.false888 889if.false:890 br label %merge891 892if2.true:893 br label %merge894 895if2.false:896 br label %merge897 898merge:899 %ret = phi i8 [ 0, %if.false ], [ -1, %if2.true ], [ -1, %if2.false ]900 ret i8 %ret901}902 903define i32 @test_neg_value_not_possible_to_zext_or_sext(i8 noundef %0) {904; CHECK-LABEL: @test_neg_value_not_possible_to_zext_or_sext(905; CHECK-NEXT: entry:906; CHECK-NEXT: switch i8 [[TMP0:%.*]], label [[DEFAULT:%.*]] [907; CHECK-NEXT: i8 -1, label [[SW_255:%.*]]908; CHECK-NEXT: i8 0, label [[SW_0:%.*]]909; CHECK-NEXT: i8 1, label [[SW_1:%.*]]910; CHECK-NEXT: ]911; CHECK: default:912; CHECK-NEXT: unreachable913; CHECK: sw.255:914; CHECK-NEXT: br label [[MERGE:%.*]]915; CHECK: sw.0:916; CHECK-NEXT: br label [[MERGE]]917; CHECK: sw.1:918; CHECK-NEXT: br label [[MERGE]]919; CHECK: merge:920; CHECK-NEXT: [[DOT0:%.*]] = phi i32 [ 1, [[SW_1]] ], [ 0, [[SW_0]] ], [ 511, [[SW_255]] ]921; CHECK-NEXT: ret i32 [[DOT0]]922;923entry:924 switch i8 %0, label %default [925 i8 255, label %sw.255926 i8 0, label %sw.0927 i8 1, label %sw.1928 ]929 930default:931 unreachable932 933sw.255:934 br label %merge935 936sw.0:937 br label %merge938 939sw.1:940 br label %merge941 942merge:943 %.0 = phi i32 [ 1, %sw.1 ], [ 0, %sw.0 ], [ 511, %sw.255 ]944 ret i32 %.0945}946 947define i8 @test_neg_multiple_predecessors_value_not_possible_to_zext_or_sext(i1 %cond, i1 %cond2) {948; CHECK-LABEL: @test_neg_multiple_predecessors_value_not_possible_to_zext_or_sext(949; CHECK-NEXT: entry:950; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]951; CHECK: if.true:952; CHECK-NEXT: br i1 [[COND2:%.*]], label [[IF2_TRUE:%.*]], label [[IF2_FALSE:%.*]]953; CHECK: if.false:954; CHECK-NEXT: br label [[MERGE:%.*]]955; CHECK: if2.true:956; CHECK-NEXT: br label [[MERGE]]957; CHECK: if2.false:958; CHECK-NEXT: br label [[MERGE]]959; CHECK: merge:960; CHECK-NEXT: [[RET:%.*]] = phi i8 [ 0, [[IF_FALSE]] ], [ 1, [[IF2_TRUE]] ], [ -1, [[IF2_FALSE]] ]961; CHECK-NEXT: ret i8 [[RET]]962;963entry:964 br i1 %cond, label %if.true, label %if.false965 966if.true:967 br i1 %cond2, label %if2.true, label %if2.false968 969if.false:970 br label %merge971 972if2.true:973 br label %merge974 975if2.false:976 br label %merge977 978merge:979 %ret = phi i8 [ 0, %if.false ], [ 1, %if2.true ], [ -1, %if2.false ]980 ret i8 %ret981}982 983define i8 @test_phi_to_trunc(i32 %0) {984; CHECK-LABEL: @test_phi_to_trunc(985; CHECK-NEXT: entry:986; CHECK-NEXT: switch i32 [[TMP0:%.*]], label [[DEFAULT:%.*]] [987; CHECK-NEXT: i32 0, label [[MERGE:%.*]]988; CHECK-NEXT: i32 1, label [[SW_1:%.*]]989; CHECK-NEXT: i32 255, label [[SW_255:%.*]]990; CHECK-NEXT: ]991; CHECK: default:992; CHECK-NEXT: unreachable993; CHECK: sw.1:994; CHECK-NEXT: br label [[MERGE]]995; CHECK: sw.255:996; CHECK-NEXT: br label [[MERGE]]997; CHECK: merge:998; CHECK-NEXT: [[DOT0:%.*]] = phi i8 [ -1, [[SW_255]] ], [ 1, [[SW_1]] ], [ 0, [[ENTRY:%.*]] ]999; CHECK-NEXT: ret i8 [[DOT0]]1000;1001entry:1002 switch i32 %0, label %default [1003 i32 0, label %merge1004 i32 1, label %sw.11005 i32 255, label %sw.2551006 ]1007 1008default:1009 unreachable1010 1011sw.1:1012 br label %merge1013 1014sw.255:1015 br label %merge1016 1017merge:1018 %.0 = phi i8 [ -1, %sw.255 ], [ 1, %sw.1 ], [ 0, %entry ]1019 ret i8 %.01020}1021 1022define i8 @test_phi_to_trunc_inverted(i32 %0) {1023; CHECK-LABEL: @test_phi_to_trunc_inverted(1024; CHECK-NEXT: entry:1025; CHECK-NEXT: switch i32 [[TMP0:%.*]], label [[DEFAULT:%.*]] [1026; CHECK-NEXT: i32 0, label [[MERGE:%.*]]1027; CHECK-NEXT: i32 1, label [[SW_1:%.*]]1028; CHECK-NEXT: i32 255, label [[SW_255:%.*]]1029; CHECK-NEXT: ]1030; CHECK: default:1031; CHECK-NEXT: unreachable1032; CHECK: sw.1:1033; CHECK-NEXT: br label [[MERGE]]1034; CHECK: sw.255:1035; CHECK-NEXT: br label [[MERGE]]1036; CHECK: merge:1037; CHECK-NEXT: [[DOT0:%.*]] = phi i8 [ 0, [[SW_255]] ], [ -2, [[SW_1]] ], [ -1, [[ENTRY:%.*]] ]1038; CHECK-NEXT: ret i8 [[DOT0]]1039;1040entry:1041 switch i32 %0, label %default [1042 i32 0, label %merge1043 i32 1, label %sw.11044 i32 255, label %sw.2551045 ]1046 1047default:1048 unreachable1049 1050sw.1:1051 br label %merge1052 1053sw.255:1054 br label %merge1055 1056merge:1057 %.0 = phi i8 [ 0, %sw.255 ], [ -2, %sw.1 ], [ -1, %entry ]1058 ret i8 %.01059}1060 1061define i8 @test_neg_phi_to_trunc(i32 %0) {1062; CHECK-LABEL: @test_neg_phi_to_trunc(1063; CHECK-NEXT: entry:1064; CHECK-NEXT: switch i32 [[TMP0:%.*]], label [[DEFAULT:%.*]] [1065; CHECK-NEXT: i32 0, label [[MERGE:%.*]]1066; CHECK-NEXT: i32 1, label [[SW_1:%.*]]1067; CHECK-NEXT: i32 511, label [[SW_511:%.*]]1068; CHECK-NEXT: ]1069; CHECK: default:1070; CHECK-NEXT: unreachable1071; CHECK: sw.1:1072; CHECK-NEXT: br label [[MERGE]]1073; CHECK: sw.511:1074; CHECK-NEXT: br label [[MERGE]]1075; CHECK: merge:1076; CHECK-NEXT: [[DOT0:%.*]] = phi i8 [ 2, [[SW_511]] ], [ 1, [[SW_1]] ], [ 0, [[ENTRY:%.*]] ]1077; CHECK-NEXT: ret i8 [[DOT0]]1078;1079entry:1080 switch i32 %0, label %default [1081 i32 0, label %merge1082 i32 1, label %sw.11083 i32 511, label %sw.5111084 ]1085 1086default:1087 unreachable1088 1089sw.1:1090 br label %merge1091 1092sw.511:1093 br label %merge1094 1095merge:1096 %.0 = phi i8 [ 2, %sw.511 ], [ 1, %sw.1 ], [ 0, %entry ]1097 ret i8 %.01098}1099 1100define i8 @test_neg_phi_to_trunc_multiple_values_trunc_to_same_value(i32 %0) {1101; CHECK-LABEL: @test_neg_phi_to_trunc_multiple_values_trunc_to_same_value(1102; CHECK-NEXT: entry:1103; CHECK-NEXT: switch i32 [[TMP0:%.*]], label [[DEFAULT:%.*]] [1104; CHECK-NEXT: i32 0, label [[MERGE:%.*]]1105; CHECK-NEXT: i32 255, label [[SW_255:%.*]]1106; CHECK-NEXT: i32 511, label [[SW_511:%.*]]1107; CHECK-NEXT: ]1108; CHECK: default:1109; CHECK-NEXT: unreachable1110; CHECK: sw.255:1111; CHECK-NEXT: br label [[MERGE]]1112; CHECK: sw.511:1113; CHECK-NEXT: br label [[MERGE]]1114; CHECK: merge:1115; CHECK-NEXT: [[DOT0:%.*]] = phi i8 [ -1, [[SW_255]] ], [ -1, [[SW_511]] ], [ 0, [[ENTRY:%.*]] ]1116; CHECK-NEXT: ret i8 [[DOT0]]1117;1118entry:1119 switch i32 %0, label %default [1120 i32 0, label %merge1121 i32 255, label %sw.2551122 i32 511, label %sw.5111123 ]1124 1125default:1126 unreachable1127 1128sw.255:1129 br label %merge1130 1131sw.511:1132 br label %merge1133 1134merge:1135 %.0 = phi i8 [ -1, %sw.255 ], [ -1, %sw.511 ], [ 0, %entry ]1136 ret i8 %.01137}1138