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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4define i16 @narrow_sext_and(i16 %x16, i32 %y32) {5; CHECK-LABEL: define i16 @narrow_sext_and(6; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {7; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i168; CHECK-NEXT: [[R:%.*]] = and i16 [[X16]], [[TMP1]]9; CHECK-NEXT: ret i16 [[R]]10;11 %x32 = sext i16 %x16 to i3212 %b = and i32 %x32, %y3213 %r = trunc i32 %b to i1614 ret i16 %r15}16 17define i16 @narrow_zext_and(i16 %x16, i32 %y32) {18; CHECK-LABEL: define i16 @narrow_zext_and(19; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {20; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i1621; CHECK-NEXT: [[R:%.*]] = and i16 [[X16]], [[TMP1]]22; CHECK-NEXT: ret i16 [[R]]23;24 %x32 = zext i16 %x16 to i3225 %b = and i32 %x32, %y3226 %r = trunc i32 %b to i1627 ret i16 %r28}29 30define i16 @narrow_sext_or(i16 %x16, i32 %y32) {31; CHECK-LABEL: define i16 @narrow_sext_or(32; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {33; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i1634; CHECK-NEXT: [[R:%.*]] = or i16 [[X16]], [[TMP1]]35; CHECK-NEXT: ret i16 [[R]]36;37 %x32 = sext i16 %x16 to i3238 %b = or i32 %x32, %y3239 %r = trunc i32 %b to i1640 ret i16 %r41}42 43define i16 @narrow_zext_or(i16 %x16, i32 %y32) {44; CHECK-LABEL: define i16 @narrow_zext_or(45; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {46; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i1647; CHECK-NEXT: [[R:%.*]] = or i16 [[X16]], [[TMP1]]48; CHECK-NEXT: ret i16 [[R]]49;50 %x32 = zext i16 %x16 to i3251 %b = or i32 %x32, %y3252 %r = trunc i32 %b to i1653 ret i16 %r54}55 56define i16 @narrow_sext_xor(i16 %x16, i32 %y32) {57; CHECK-LABEL: define i16 @narrow_sext_xor(58; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {59; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i1660; CHECK-NEXT: [[R:%.*]] = xor i16 [[X16]], [[TMP1]]61; CHECK-NEXT: ret i16 [[R]]62;63 %x32 = sext i16 %x16 to i3264 %b = xor i32 %x32, %y3265 %r = trunc i32 %b to i1666 ret i16 %r67}68 69define i16 @narrow_zext_xor(i16 %x16, i32 %y32) {70; CHECK-LABEL: define i16 @narrow_zext_xor(71; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {72; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i1673; CHECK-NEXT: [[R:%.*]] = xor i16 [[X16]], [[TMP1]]74; CHECK-NEXT: ret i16 [[R]]75;76 %x32 = zext i16 %x16 to i3277 %b = xor i32 %x32, %y3278 %r = trunc i32 %b to i1679 ret i16 %r80}81 82define i16 @narrow_sext_add(i16 %x16, i32 %y32) {83; CHECK-LABEL: define i16 @narrow_sext_add(84; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {85; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i1686; CHECK-NEXT: [[R:%.*]] = add i16 [[X16]], [[TMP1]]87; CHECK-NEXT: ret i16 [[R]]88;89 %x32 = sext i16 %x16 to i3290 %b = add i32 %x32, %y3291 %r = trunc i32 %b to i1692 ret i16 %r93}94 95define i16 @narrow_zext_add(i16 %x16, i32 %y32) {96; CHECK-LABEL: define i16 @narrow_zext_add(97; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {98; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i1699; CHECK-NEXT: [[R:%.*]] = add i16 [[X16]], [[TMP1]]100; CHECK-NEXT: ret i16 [[R]]101;102 %x32 = zext i16 %x16 to i32103 %b = add i32 %x32, %y32104 %r = trunc i32 %b to i16105 ret i16 %r106}107 108define i16 @narrow_sext_sub(i16 %x16, i32 %y32) {109; CHECK-LABEL: define i16 @narrow_sext_sub(110; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {111; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i16112; CHECK-NEXT: [[R:%.*]] = sub i16 [[X16]], [[TMP1]]113; CHECK-NEXT: ret i16 [[R]]114;115 %x32 = sext i16 %x16 to i32116 %b = sub i32 %x32, %y32117 %r = trunc i32 %b to i16118 ret i16 %r119}120 121define i16 @narrow_zext_sub(i16 %x16, i32 %y32) {122; CHECK-LABEL: define i16 @narrow_zext_sub(123; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {124; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i16125; CHECK-NEXT: [[R:%.*]] = sub i16 [[X16]], [[TMP1]]126; CHECK-NEXT: ret i16 [[R]]127;128 %x32 = zext i16 %x16 to i32129 %b = sub i32 %x32, %y32130 %r = trunc i32 %b to i16131 ret i16 %r132}133 134define i16 @narrow_sext_mul(i16 %x16, i32 %y32) {135; CHECK-LABEL: define i16 @narrow_sext_mul(136; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {137; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i16138; CHECK-NEXT: [[R:%.*]] = mul i16 [[X16]], [[TMP1]]139; CHECK-NEXT: ret i16 [[R]]140;141 %x32 = sext i16 %x16 to i32142 %b = mul i32 %x32, %y32143 %r = trunc i32 %b to i16144 ret i16 %r145}146 147define i16 @narrow_zext_mul(i16 %x16, i32 %y32) {148; CHECK-LABEL: define i16 @narrow_zext_mul(149; CHECK-SAME: i16 [[X16:%.*]], i32 [[Y32:%.*]]) {150; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[Y32]] to i16151; CHECK-NEXT: [[R:%.*]] = mul i16 [[X16]], [[TMP1]]152; CHECK-NEXT: ret i16 [[R]]153;154 %x32 = zext i16 %x16 to i32155 %b = mul i32 %x32, %y32156 %r = trunc i32 %b to i16157 ret i16 %r158}159 160; Verify that the commuted patterns work. The div is to ensure that complexity-based161; canonicalization doesn't swap the binop operands. Use vector types to show those work too.162 163define <2 x i16> @narrow_sext_and_commute(<2 x i16> %x16, <2 x i32> %y32) {164; CHECK-LABEL: define <2 x i16> @narrow_sext_and_commute(165; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {166; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>167; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>168; CHECK-NEXT: [[R:%.*]] = and <2 x i16> [[X16]], [[TMP1]]169; CHECK-NEXT: ret <2 x i16> [[R]]170;171 %y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>172 %x32 = sext <2 x i16> %x16 to <2 x i32>173 %b = and <2 x i32> %y32op0, %x32174 %r = trunc <2 x i32> %b to <2 x i16>175 ret <2 x i16> %r176}177 178define <2 x i16> @narrow_zext_and_commute(<2 x i16> %x16, <2 x i32> %y32) {179; CHECK-LABEL: define <2 x i16> @narrow_zext_and_commute(180; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {181; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>182; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>183; CHECK-NEXT: [[R:%.*]] = and <2 x i16> [[X16]], [[TMP1]]184; CHECK-NEXT: ret <2 x i16> [[R]]185;186 %y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>187 %x32 = zext <2 x i16> %x16 to <2 x i32>188 %b = and <2 x i32> %y32op0, %x32189 %r = trunc <2 x i32> %b to <2 x i16>190 ret <2 x i16> %r191}192 193define <2 x i16> @narrow_sext_or_commute(<2 x i16> %x16, <2 x i32> %y32) {194; CHECK-LABEL: define <2 x i16> @narrow_sext_or_commute(195; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {196; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>197; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>198; CHECK-NEXT: [[R:%.*]] = or <2 x i16> [[X16]], [[TMP1]]199; CHECK-NEXT: ret <2 x i16> [[R]]200;201 %y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>202 %x32 = sext <2 x i16> %x16 to <2 x i32>203 %b = or <2 x i32> %y32op0, %x32204 %r = trunc <2 x i32> %b to <2 x i16>205 ret <2 x i16> %r206}207 208define <2 x i16> @narrow_zext_or_commute(<2 x i16> %x16, <2 x i32> %y32) {209; CHECK-LABEL: define <2 x i16> @narrow_zext_or_commute(210; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {211; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>212; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>213; CHECK-NEXT: [[R:%.*]] = or <2 x i16> [[X16]], [[TMP1]]214; CHECK-NEXT: ret <2 x i16> [[R]]215;216 %y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>217 %x32 = zext <2 x i16> %x16 to <2 x i32>218 %b = or <2 x i32> %y32op0, %x32219 %r = trunc <2 x i32> %b to <2 x i16>220 ret <2 x i16> %r221}222 223define <2 x i16> @narrow_sext_xor_commute(<2 x i16> %x16, <2 x i32> %y32) {224; CHECK-LABEL: define <2 x i16> @narrow_sext_xor_commute(225; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {226; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>227; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>228; CHECK-NEXT: [[R:%.*]] = xor <2 x i16> [[X16]], [[TMP1]]229; CHECK-NEXT: ret <2 x i16> [[R]]230;231 %y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>232 %x32 = sext <2 x i16> %x16 to <2 x i32>233 %b = xor <2 x i32> %y32op0, %x32234 %r = trunc <2 x i32> %b to <2 x i16>235 ret <2 x i16> %r236}237 238define <2 x i16> @narrow_zext_xor_commute(<2 x i16> %x16, <2 x i32> %y32) {239; CHECK-LABEL: define <2 x i16> @narrow_zext_xor_commute(240; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {241; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>242; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>243; CHECK-NEXT: [[R:%.*]] = xor <2 x i16> [[X16]], [[TMP1]]244; CHECK-NEXT: ret <2 x i16> [[R]]245;246 %y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>247 %x32 = zext <2 x i16> %x16 to <2 x i32>248 %b = xor <2 x i32> %y32op0, %x32249 %r = trunc <2 x i32> %b to <2 x i16>250 ret <2 x i16> %r251}252 253define <2 x i16> @narrow_sext_add_commute(<2 x i16> %x16, <2 x i32> %y32) {254; CHECK-LABEL: define <2 x i16> @narrow_sext_add_commute(255; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {256; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>257; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>258; CHECK-NEXT: [[R:%.*]] = add <2 x i16> [[X16]], [[TMP1]]259; CHECK-NEXT: ret <2 x i16> [[R]]260;261 %y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>262 %x32 = sext <2 x i16> %x16 to <2 x i32>263 %b = add <2 x i32> %y32op0, %x32264 %r = trunc <2 x i32> %b to <2 x i16>265 ret <2 x i16> %r266}267 268define <2 x i16> @narrow_zext_add_commute(<2 x i16> %x16, <2 x i32> %y32) {269; CHECK-LABEL: define <2 x i16> @narrow_zext_add_commute(270; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {271; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>272; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>273; CHECK-NEXT: [[R:%.*]] = add <2 x i16> [[X16]], [[TMP1]]274; CHECK-NEXT: ret <2 x i16> [[R]]275;276 %y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>277 %x32 = zext <2 x i16> %x16 to <2 x i32>278 %b = add <2 x i32> %y32op0, %x32279 %r = trunc <2 x i32> %b to <2 x i16>280 ret <2 x i16> %r281}282 283define <2 x i16> @narrow_sext_sub_commute(<2 x i16> %x16, <2 x i32> %y32) {284; CHECK-LABEL: define <2 x i16> @narrow_sext_sub_commute(285; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {286; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>287; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>288; CHECK-NEXT: [[R:%.*]] = sub <2 x i16> [[TMP1]], [[X16]]289; CHECK-NEXT: ret <2 x i16> [[R]]290;291 %y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>292 %x32 = sext <2 x i16> %x16 to <2 x i32>293 %b = sub <2 x i32> %y32op0, %x32294 %r = trunc <2 x i32> %b to <2 x i16>295 ret <2 x i16> %r296}297 298define <2 x i16> @narrow_zext_sub_commute(<2 x i16> %x16, <2 x i32> %y32) {299; CHECK-LABEL: define <2 x i16> @narrow_zext_sub_commute(300; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {301; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>302; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>303; CHECK-NEXT: [[R:%.*]] = sub <2 x i16> [[TMP1]], [[X16]]304; CHECK-NEXT: ret <2 x i16> [[R]]305;306 %y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>307 %x32 = zext <2 x i16> %x16 to <2 x i32>308 %b = sub <2 x i32> %y32op0, %x32309 %r = trunc <2 x i32> %b to <2 x i16>310 ret <2 x i16> %r311}312 313define <2 x i16> @narrow_sext_mul_commute(<2 x i16> %x16, <2 x i32> %y32) {314; CHECK-LABEL: define <2 x i16> @narrow_sext_mul_commute(315; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {316; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>317; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>318; CHECK-NEXT: [[R:%.*]] = mul <2 x i16> [[X16]], [[TMP1]]319; CHECK-NEXT: ret <2 x i16> [[R]]320;321 %y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>322 %x32 = sext <2 x i16> %x16 to <2 x i32>323 %b = mul <2 x i32> %y32op0, %x32324 %r = trunc <2 x i32> %b to <2 x i16>325 ret <2 x i16> %r326}327 328define <2 x i16> @narrow_zext_mul_commute(<2 x i16> %x16, <2 x i32> %y32) {329; CHECK-LABEL: define <2 x i16> @narrow_zext_mul_commute(330; CHECK-SAME: <2 x i16> [[X16:%.*]], <2 x i32> [[Y32:%.*]]) {331; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> [[Y32]], <i32 7, i32 -17>332; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16>333; CHECK-NEXT: [[R:%.*]] = mul <2 x i16> [[X16]], [[TMP1]]334; CHECK-NEXT: ret <2 x i16> [[R]]335;336 %y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17>337 %x32 = zext <2 x i16> %x16 to <2 x i32>338 %b = mul <2 x i32> %y32op0, %x32339 %r = trunc <2 x i32> %b to <2 x i16>340 ret <2 x i16> %r341}342 343; Test cases for PR43580344define i8 @narrow_zext_ashr_keep_trunc(i8 %i1, i8 %i2) {345; CHECK-LABEL: define i8 @narrow_zext_ashr_keep_trunc(346; CHECK-SAME: i8 [[I1:%.*]], i8 [[I2:%.*]]) {347; CHECK-NEXT: [[I1_EXT:%.*]] = sext i8 [[I1]] to i16348; CHECK-NEXT: [[I2_EXT:%.*]] = sext i8 [[I2]] to i16349; CHECK-NEXT: [[SUB:%.*]] = add nsw i16 [[I1_EXT]], [[I2_EXT]]350; CHECK-NEXT: [[SHIFT:%.*]] = lshr i16 [[SUB]], 1351; CHECK-NEXT: [[T:%.*]] = trunc i16 [[SHIFT]] to i8352; CHECK-NEXT: ret i8 [[T]]353;354 %i1.ext = sext i8 %i1 to i32355 %i2.ext = sext i8 %i2 to i32356 %sub = add nsw i32 %i1.ext, %i2.ext357 %shift = ashr i32 %sub, 1358 %t = trunc i32 %shift to i8359 ret i8 %t360}361 362define i8 @narrow_zext_ashr_keep_trunc2(i9 %i1, i9 %i2) {363; CHECK-LABEL: define i8 @narrow_zext_ashr_keep_trunc2(364; CHECK-SAME: i9 [[I1:%.*]], i9 [[I2:%.*]]) {365; CHECK-NEXT: [[I1_EXT:%.*]] = zext i9 [[I1]] to i16366; CHECK-NEXT: [[I2_EXT:%.*]] = zext i9 [[I2]] to i16367; CHECK-NEXT: [[SUB:%.*]] = add nuw nsw i16 [[I1_EXT]], [[I2_EXT]]368; CHECK-NEXT: [[SHIFT:%.*]] = lshr i16 [[SUB]], 1369; CHECK-NEXT: [[T:%.*]] = trunc i16 [[SHIFT]] to i8370; CHECK-NEXT: ret i8 [[T]]371;372 %i1.ext = sext i9 %i1 to i64373 %i2.ext = sext i9 %i2 to i64374 %sub = add nsw i64 %i1.ext, %i2.ext375 %shift = ashr i64 %sub, 1376 %t = trunc i64 %shift to i8377 ret i8 %t378}379 380define i7 @narrow_zext_ashr_keep_trunc3(i8 %i1, i8 %i2) {381; CHECK-LABEL: define i7 @narrow_zext_ashr_keep_trunc3(382; CHECK-SAME: i8 [[I1:%.*]], i8 [[I2:%.*]]) {383; CHECK-NEXT: [[I1_EXT:%.*]] = zext i8 [[I1]] to i14384; CHECK-NEXT: [[I2_EXT:%.*]] = zext i8 [[I2]] to i14385; CHECK-NEXT: [[SUB:%.*]] = add nuw nsw i14 [[I1_EXT]], [[I2_EXT]]386; CHECK-NEXT: [[SHIFT:%.*]] = lshr i14 [[SUB]], 1387; CHECK-NEXT: [[T:%.*]] = trunc i14 [[SHIFT]] to i7388; CHECK-NEXT: ret i7 [[T]]389;390 %i1.ext = sext i8 %i1 to i64391 %i2.ext = sext i8 %i2 to i64392 %sub = add nsw i64 %i1.ext, %i2.ext393 %shift = ashr i64 %sub, 1394 %t = trunc i64 %shift to i7395 ret i7 %t396}397 398define <8 x i8> @narrow_zext_ashr_keep_trunc_vector(<8 x i8> %i1, <8 x i8> %i2) {399; CHECK-LABEL: define <8 x i8> @narrow_zext_ashr_keep_trunc_vector(400; CHECK-SAME: <8 x i8> [[I1:%.*]], <8 x i8> [[I2:%.*]]) {401; CHECK-NEXT: [[I1_EXT:%.*]] = sext <8 x i8> [[I1]] to <8 x i32>402; CHECK-NEXT: [[I2_EXT:%.*]] = sext <8 x i8> [[I2]] to <8 x i32>403; CHECK-NEXT: [[SUB:%.*]] = add nsw <8 x i32> [[I1_EXT]], [[I2_EXT]]404; CHECK-NEXT: [[SHIFT:%.*]] = lshr <8 x i32> [[SUB]], splat (i32 1)405; CHECK-NEXT: [[T:%.*]] = trunc <8 x i32> [[SHIFT]] to <8 x i8>406; CHECK-NEXT: ret <8 x i8> [[T]]407;408 %i1.ext = sext <8 x i8> %i1 to <8 x i32>409 %i2.ext = sext <8 x i8> %i2 to <8 x i32>410 %sub = add nsw <8 x i32> %i1.ext, %i2.ext411 %shift = ashr <8 x i32> %sub, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>412 %t = trunc <8 x i32> %shift to <8 x i8>413 ret <8 x i8> %t414}415 416define i8 @dont_narrow_zext_ashr_keep_trunc(i8 %i1, i8 %i2) {417; CHECK-LABEL: define i8 @dont_narrow_zext_ashr_keep_trunc(418; CHECK-SAME: i8 [[I1:%.*]], i8 [[I2:%.*]]) {419; CHECK-NEXT: [[I1_EXT:%.*]] = sext i8 [[I1]] to i16420; CHECK-NEXT: [[I2_EXT:%.*]] = sext i8 [[I2]] to i16421; CHECK-NEXT: [[SUB:%.*]] = add nsw i16 [[I1_EXT]], [[I2_EXT]]422; CHECK-NEXT: [[SHIFT:%.*]] = lshr i16 [[SUB]], 1423; CHECK-NEXT: [[T:%.*]] = trunc i16 [[SHIFT]] to i8424; CHECK-NEXT: ret i8 [[T]]425;426 %i1.ext = sext i8 %i1 to i16427 %i2.ext = sext i8 %i2 to i16428 %sub = add nsw i16 %i1.ext, %i2.ext429 %shift = ashr i16 %sub, 1430 %t = trunc i16 %shift to i8431 ret i8 %t432}433