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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4define i64 @test1(i32 %x) nounwind {5; CHECK-LABEL: @test1(6; CHECK-NEXT: ret i64 07;8 %y = lshr i32 %x, 19 %r = udiv i32 %y, -110 %z = sext i32 %r to i6411 ret i64 %z12}13define i64 @test2(i32 %x) nounwind {14; CHECK-LABEL: @test2(15; CHECK-NEXT: ret i64 016;17 %y = lshr i32 %x, 3118 %r = udiv i32 %y, 319 %z = sext i32 %r to i6420 ret i64 %z21}22 23; The udiv instructions shouldn't be optimized away, and the24; sext instructions should be optimized to zext.25 26define i64 @test1_PR2274(i32 %x, i32 %g) nounwind {27; CHECK-LABEL: @test1_PR2274(28; CHECK-NEXT: [[Y:%.*]] = lshr i32 [[X:%.*]], 3029; CHECK-NEXT: [[R:%.*]] = udiv i32 [[Y]], [[G:%.*]]30; CHECK-NEXT: [[Z:%.*]] = zext nneg i32 [[R]] to i6431; CHECK-NEXT: ret i64 [[Z]]32;33 %y = lshr i32 %x, 3034 %r = udiv i32 %y, %g35 %z = sext i32 %r to i6436 ret i64 %z37}38define i64 @test2_PR2274(i32 %x, i32 %v) nounwind {39; CHECK-LABEL: @test2_PR2274(40; CHECK-NEXT: [[Y:%.*]] = lshr i32 [[X:%.*]], 3141; CHECK-NEXT: [[R:%.*]] = udiv i32 [[Y]], [[V:%.*]]42; CHECK-NEXT: [[Z:%.*]] = zext nneg i32 [[R]] to i6443; CHECK-NEXT: ret i64 [[Z]]44;45 %y = lshr i32 %x, 3146 %r = udiv i32 %y, %v47 %z = sext i32 %r to i6448 ret i64 %z49}50 51; The udiv should be simplified according to the rule:52; X udiv (C1 << N), where C1 is `1<<C2` --> X >> (N+C2)53@b = external global [1 x i16]54 55define i32 @PR30366(i1 %a) {56; CHECK-LABEL: @PR30366(57; CHECK-NEXT: [[Z:%.*]] = zext i1 [[A:%.*]] to i3258; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i16 ptrtoint (ptr @b to i16) to i3259; CHECK-NEXT: [[D1:%.*]] = lshr i32 [[Z]], [[TMP1]]60; CHECK-NEXT: ret i32 [[D1]]61;62 %z = zext i1 %a to i3263 %shl = shl i16 1, ptrtoint (ptr @b to i16)64 %z2 = zext i16 %shl to i3265 %d = udiv i32 %z, %z266 ret i32 %d67}68 69; OSS-Fuzz #485770; https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=485771define i177 @ossfuzz_4857(i177 %X, i177 %Y) {72; CHECK-LABEL: @ossfuzz_4857(73; CHECK-NEXT: store i1 poison, ptr undef, align 174; CHECK-NEXT: ret i177 075;76 %B5 = udiv i177 %Y, -177 %B4 = add i177 %B5, -178 %B2 = add i177 %B4, -179 %B6 = mul i177 %B5, %B280 %B3 = add i177 %B2, %B281 %B9 = xor i177 %B4, %B382 %B13 = ashr i177 %Y, %B283 %B22 = add i177 %B9, %B1384 %B1 = udiv i177 %B5, %B685 %C9 = icmp ult i177 %Y, %B2286 store i1 %C9, ptr undef87 ret i177 %B188}89 90; 2 low bits are not needed because 12 has 2 trailing zeros91 92define i8 @udiv_demanded_low_bits_set(i8 %a) {93; CHECK-LABEL: @udiv_demanded_low_bits_set(94; CHECK-NEXT: [[U:%.*]] = udiv i8 [[A:%.*]], 1295; CHECK-NEXT: ret i8 [[U]]96;97 %o = or i8 %a, 398 %u = udiv i8 %o, 1299 ret i8 %u100}101 102; This can't divide evenly, so it is poison.103 104define i8 @udiv_exact_demanded_low_bits_set(i8 %a) {105; CHECK-LABEL: @udiv_exact_demanded_low_bits_set(106; CHECK-NEXT: ret i8 poison107;108 %o = or i8 %a, 3109 %u = udiv exact i8 %o, 12110 ret i8 %u111}112 113; All high bits are set, so this simplifies.114 115define i8 @udiv_demanded_high_bits_set(i8 %x, i8 %y) {116; CHECK-LABEL: @udiv_demanded_high_bits_set(117; CHECK-NEXT: ret i8 21118;119 %o = or i8 %x, -4120 %r = udiv i8 %o, 12121 ret i8 %r122}123 124; This should fold the same as above.125 126define i8 @udiv_exact_demanded_high_bits_set(i8 %x, i8 %y) {127; CHECK-LABEL: @udiv_exact_demanded_high_bits_set(128; CHECK-NEXT: ret i8 21129;130 %o = or i8 %x, -4131 %r = udiv exact i8 %o, 12132 ret i8 %r133}134 135; 2 low bits are not needed because 12 has 2 trailing zeros136 137define i8 @udiv_demanded_low_bits_clear(i8 %a) {138; CHECK-LABEL: @udiv_demanded_low_bits_clear(139; CHECK-NEXT: [[U:%.*]] = udiv i8 [[A:%.*]], 12140; CHECK-NEXT: ret i8 [[U]]141;142 %o = and i8 %a, -4143 %u = udiv i8 %o, 12144 ret i8 %u145}146 147; This should fold the same as above.148 149define i8 @udiv_exact_demanded_low_bits_clear(i8 %a) {150; CHECK-LABEL: @udiv_exact_demanded_low_bits_clear(151; CHECK-NEXT: [[U:%.*]] = udiv i8 [[A:%.*]], 12152; CHECK-NEXT: ret i8 [[U]]153;154 %o = and i8 %a, -4155 %u = udiv exact i8 %o, 12156 ret i8 %u157}158 159define <vscale x 1 x i32> @udiv_demanded3(<vscale x 1 x i32> %a) {160; CHECK-LABEL: @udiv_demanded3(161; CHECK-NEXT: [[U:%.*]] = udiv <vscale x 1 x i32> [[A:%.*]], splat (i32 12)162; CHECK-NEXT: ret <vscale x 1 x i32> [[U]]163;164 %o = or <vscale x 1 x i32> %a, splat (i32 3)165 %u = udiv <vscale x 1 x i32> %o, splat (i32 12)166 ret <vscale x 1 x i32> %u167}168 169; PR74242170define i32 @div_by_zero_or_one_from_dom_cond(i32 %a, i32 %b) {171; CHECK-LABEL: @div_by_zero_or_one_from_dom_cond(172; CHECK-NEXT: entry:173; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[A:%.*]], 1174; CHECK-NEXT: br i1 [[CMP]], label [[JOIN:%.*]], label [[ZERO_OR_ONE:%.*]]175; CHECK: zero_or_one:176; CHECK-NEXT: br label [[JOIN]]177; CHECK: join:178; CHECK-NEXT: ret i32 [[B:%.*]]179;180entry:181 %cmp = icmp ugt i32 %a, 1182 br i1 %cmp, label %join, label %zero_or_one183 184zero_or_one:185 %div = udiv i32 %b, %a186 br label %join187 188join:189 %res = phi i32 [ %div, %zero_or_one ], [ %b, %entry ]190 ret i32 %res191}192