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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=instcombine -S | FileCheck %s3 4declare i3 @llvm.ctlz.i3 (i3 , i1)5declare i32 @llvm.ctlz.i32 (i32, i1)6declare i34 @llvm.ctlz.i34 (i34, i1)7declare <2 x i33> @llvm.ctlz.v2i33 (<2 x i33>, i1)8declare <2 x i32> @llvm.ctlz.v2i32 (<2 x i32>, i1)9declare <vscale x 2 x i64> @llvm.ctlz.nxv2i64 (<vscale x 2 x i64>, i1)10declare <vscale x 2 x i63> @llvm.ctlz.nxv2i63 (<vscale x 2 x i63>, i1)11declare void @use(<2 x i32>)12declare void @use1(<vscale x 2 x i63>)13 14define i16 @trunc_ctlz_zext_i16_i32(i16 %x) {15; CHECK-LABEL: @trunc_ctlz_zext_i16_i32(16; CHECK-NEXT: [[TMP1:%.*]] = call range(i16 0, 17) i16 @llvm.ctlz.i16(i16 [[X:%.*]], i1 false)17; CHECK-NEXT: [[ZZ:%.*]] = add nuw nsw i16 [[TMP1]], 1618; CHECK-NEXT: ret i16 [[ZZ]]19;20 %z = zext i16 %x to i3221 %p = call i32 @llvm.ctlz.i32(i32 %z, i1 false)22 %zz = trunc i32 %p to i1623 ret i16 %zz24}25 26; Fixed vector case27 28define <2 x i8> @trunc_ctlz_zext_v2i8_v2i33(<2 x i8> %x) {29; CHECK-LABEL: @trunc_ctlz_zext_v2i8_v2i33(30; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) <2 x i8> @llvm.ctlz.v2i8(<2 x i8> [[X:%.*]], i1 true)31; CHECK-NEXT: [[ZZ:%.*]] = add nuw nsw <2 x i8> [[TMP1]], splat (i8 25)32; CHECK-NEXT: ret <2 x i8> [[ZZ]]33;34 %z = zext <2 x i8> %x to <2 x i33>35 %p = call <2 x i33> @llvm.ctlz.v2i33(<2 x i33> %z, i1 true)36 %zz = trunc <2 x i33> %p to <2 x i8>37 ret <2 x i8> %zz38}39 40; Scalable vector case41 42define <vscale x 2 x i16> @trunc_ctlz_zext_nxv2i16_nxv2i64(<vscale x 2 x i16> %x) {43; CHECK-LABEL: @trunc_ctlz_zext_nxv2i16_nxv2i64(44; CHECK-NEXT: [[TMP1:%.*]] = call range(i16 0, 17) <vscale x 2 x i16> @llvm.ctlz.nxv2i16(<vscale x 2 x i16> [[X:%.*]], i1 false)45; CHECK-NEXT: [[ZZ:%.*]] = add nuw nsw <vscale x 2 x i16> [[TMP1]], splat (i16 48)46; CHECK-NEXT: ret <vscale x 2 x i16> [[ZZ]]47;48 %z = zext <vscale x 2 x i16> %x to <vscale x 2 x i64>49 %p = call <vscale x 2 x i64> @llvm.ctlz.nxv2i64(<vscale x 2 x i64> %z, i1 false)50 %zz = trunc <vscale x 2 x i64> %p to <vscale x 2 x i16>51 ret <vscale x 2 x i16> %zz52}53 54; Multiple uses of ctlz for which the opt is disabled55 56define <2 x i17> @trunc_ctlz_zext_v2i17_v2i32_multiple_uses(<2 x i17> %x) {57; CHECK-LABEL: @trunc_ctlz_zext_v2i17_v2i32_multiple_uses(58; CHECK-NEXT: [[Z:%.*]] = zext <2 x i17> [[X:%.*]] to <2 x i32>59; CHECK-NEXT: [[P:%.*]] = call range(i32 15, 33) <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[Z]], i1 false)60; CHECK-NEXT: [[ZZ:%.*]] = trunc nuw nsw <2 x i32> [[P]] to <2 x i17>61; CHECK-NEXT: call void @use(<2 x i32> [[P]])62; CHECK-NEXT: ret <2 x i17> [[ZZ]]63;64 %z = zext <2 x i17> %x to <2 x i32>65 %p = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %z, i1 false)66 %zz = trunc <2 x i32> %p to <2 x i17>67 call void @use(<2 x i32> %p)68 ret <2 x i17> %zz69}70 71; Multiple uses of zext72 73define <vscale x 2 x i16> @trunc_ctlz_zext_nxv2i16_nxv2i63_multiple_uses(<vscale x 2 x i16> %x) {74; CHECK-LABEL: @trunc_ctlz_zext_nxv2i16_nxv2i63_multiple_uses(75; CHECK-NEXT: [[Z:%.*]] = zext <vscale x 2 x i16> [[X:%.*]] to <vscale x 2 x i63>76; CHECK-NEXT: [[TMP1:%.*]] = call range(i16 0, 17) <vscale x 2 x i16> @llvm.ctlz.nxv2i16(<vscale x 2 x i16> [[X]], i1 true)77; CHECK-NEXT: [[ZZ:%.*]] = add nuw nsw <vscale x 2 x i16> [[TMP1]], splat (i16 47)78; CHECK-NEXT: call void @use1(<vscale x 2 x i63> [[Z]])79; CHECK-NEXT: ret <vscale x 2 x i16> [[ZZ]]80;81 %z = zext <vscale x 2 x i16> %x to <vscale x 2 x i63>82 %p = call <vscale x 2 x i63> @llvm.ctlz.nxv2i63(<vscale x 2 x i63> %z, i1 true)83 %zz = trunc <vscale x 2 x i63> %p to <vscale x 2 x i16>84 call void @use1(<vscale x 2 x i63> %z)85 ret <vscale x 2 x i16> %zz86}87 88; Negative case where types of x and zz don't match89 90define i16 @trunc_ctlz_zext_i10_i32(i10 %x) {91; CHECK-LABEL: @trunc_ctlz_zext_i10_i32(92; CHECK-NEXT: [[Z:%.*]] = zext i10 [[X:%.*]] to i3293; CHECK-NEXT: [[P:%.*]] = call range(i32 22, 33) i32 @llvm.ctlz.i32(i32 [[Z]], i1 false)94; CHECK-NEXT: [[ZZ:%.*]] = trunc nuw nsw i32 [[P]] to i1695; CHECK-NEXT: ret i16 [[ZZ]]96;97 %z = zext i10 %x to i3298 %p = call i32 @llvm.ctlz.i32(i32 %z, i1 false)99 %zz = trunc i32 %p to i16100 ret i16 %zz101}102 103; Test width difference of more than log2 between x and t104; TODO: Enable the opt for this case if it is proved that the105; opt works for all combinations of bitwidth of zext src and dst.106; Refer : https://reviews.llvm.org/D103788107 108define i3 @trunc_ctlz_zext_i3_i34(i3 %x) {109; CHECK-LABEL: @trunc_ctlz_zext_i3_i34(110; CHECK-NEXT: [[Z:%.*]] = zext i3 [[X:%.*]] to i34111; CHECK-NEXT: [[P:%.*]] = call range(i34 31, 35) i34 @llvm.ctlz.i34(i34 [[Z]], i1 false)112; CHECK-NEXT: [[T:%.*]] = trunc i34 [[P]] to i3113; CHECK-NEXT: ret i3 [[T]]114;115 %z = zext i3 %x to i34116 %p = call i34 @llvm.ctlz.i34(i34 %z, i1 false)117 %t = trunc i34 %p to i3118 ret i3 %t119}120