301 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=jump-threading -S < %s | FileCheck %s3 4; Check the unreachable loop won't cause infinite loop5; in jump-threading when it tries to update the predecessors'6; profile metadata from a phi node.7 8define void @unreachable_single_bb_loop() {9;10; CHECK-LABEL: @unreachable_single_bb_loop(11; CHECK-NEXT: bb:12; CHECK-NEXT: [[TMP:%.*]] = call i32 @a()13; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP]], 114; CHECK-NEXT: br i1 [[TMP1]], label [[BB8:%.*]], label [[BB8]]15; CHECK: bb2:16; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP]], 117; CHECK-NEXT: switch i1 [[TMP4]], label [[BB2:%.*]] [18; CHECK-NEXT: i1 false, label [[BB8]]19; CHECK-NEXT: i1 true, label [[BB8]]20; CHECK-NEXT: ]21; CHECK: bb8:22; CHECK-NEXT: ret void23;24bb:25 %tmp = call i32 @a()26 %tmp1 = icmp eq i32 %tmp, 127 br i1 %tmp1, label %bb5, label %bb828 29; unreachable single bb loop.30bb2: ; preds = %bb231 %tmp4 = icmp ne i32 %tmp, 132 switch i1 %tmp4, label %bb2 [33 i1 0, label %bb534 i1 1, label %bb835 ]36 37bb5: ; preds = %bb2, %bb38 %tmp6 = phi i1 [ %tmp1, %bb ], [ false, %bb2 ]39 br i1 %tmp6, label %bb8, label %bb7, !prof !040 41bb7: ; preds = %bb542 br label %bb843 44bb8: ; preds = %bb8, %bb7, %bb5, %bb245 ret void46}47 48define void @unreachable_multi_bbs_loop() {49;50; CHECK-LABEL: @unreachable_multi_bbs_loop(51; CHECK-NEXT: bb:52; CHECK-NEXT: [[TMP:%.*]] = call i32 @a()53; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP]], 154; CHECK-NEXT: br i1 [[TMP1]], label [[BB8:%.*]], label [[BB8]]55; CHECK: bb3:56; CHECK-NEXT: br label [[BB2:%.*]]57; CHECK: bb2:58; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP]], 159; CHECK-NEXT: switch i1 [[TMP4]], label [[BB3:%.*]] [60; CHECK-NEXT: i1 false, label [[BB8]]61; CHECK-NEXT: i1 true, label [[BB8]]62; CHECK-NEXT: ]63; CHECK: bb8:64; CHECK-NEXT: ret void65;66bb:67 %tmp = call i32 @a()68 %tmp1 = icmp eq i32 %tmp, 169 br i1 %tmp1, label %bb5, label %bb870 71; unreachable two bbs loop.72bb3: ; preds = %bb273 br label %bb274 75bb2: ; preds = %bb376 %tmp4 = icmp ne i32 %tmp, 177 switch i1 %tmp4, label %bb3 [78 i1 0, label %bb579 i1 1, label %bb880 ]81 82bb5: ; preds = %bb2, %bb83 %tmp6 = phi i1 [ %tmp1, %bb ], [ false, %bb2 ]84 br i1 %tmp6, label %bb8, label %bb7, !prof !085 86bb7: ; preds = %bb587 br label %bb888 89bb8: ; preds = %bb8, %bb7, %bb5, %bb290 ret void91}92declare i32 @a()93 94; This gets into a state that could cause instruction simplify95; to hang - an insertelement instruction has itself as an operand.96 97define void @PR48362(i1 %arg) {98;99; CHECK-LABEL: @PR48362(100; CHECK-NEXT: cleanup.cont1500:101; CHECK-NEXT: unreachable102; CHECK: if.end1733:103; CHECK-NEXT: [[I82:%.*]] = load i32, ptr undef, align 1104; CHECK-NEXT: [[TOBOOL1731_NOT:%.*]] = icmp eq i32 [[I82]], 0105; CHECK-NEXT: br label [[IF_END1733:%.*]]106;107cleanup1491: ; preds = %for.body1140108 switch i32 0, label %cleanup2343.loopexit4 [109 i32 0, label %cleanup.cont1500110 i32 128, label %lbl_555.loopexit111 ]112 113cleanup.cont1500: ; preds = %cleanup1491114 unreachable115 116lbl_555.loopexit: ; preds = %cleanup1491117 br label %for.body1509118 119for.body1509: ; preds = %for.inc2340, %lbl_555.loopexit120 %l_580.sroa.0.0 = phi <4 x i32> [ <i32 1684658741, i32 1684658741, i32 1684658741, i32 1684658741>, %lbl_555.loopexit ], [ %l_580.sroa.0.2, %for.inc2340 ]121 %p_55.addr.10 = phi i16 [ 0, %lbl_555.loopexit ], [ %p_55.addr.11, %for.inc2340 ]122 %i82 = load i32, ptr undef, align 1123 %tobool1731.not = icmp eq i32 %i82, 0124 br i1 %tobool1731.not, label %if.end1733, label %if.then1732125 126if.then1732: ; preds = %for.body1509127 br label %cleanup2329128 129if.end1733: ; preds = %for.body1509130 %tobool1735.not = icmp eq i16 %p_55.addr.10, 0131 br i1 %tobool1735.not, label %if.then1736, label %if.else1904132 133if.then1736: ; preds = %if.end1733134 br label %cleanup2329135 136if.else1904: ; preds = %if.end1733137 br label %for.body1911138 139for.body1911: ; preds = %if.else1904140 %l_580.sroa.0.4.vec.extract683 = extractelement <4 x i32> %l_580.sroa.0.0, i32 2141 %xor2107 = xor i32 undef, %l_580.sroa.0.4.vec.extract683142 br label %land.end2173143 144land.end2173: ; preds = %for.body1911145 br i1 %arg, label %if.end2178, label %cleanup2297146 147if.end2178: ; preds = %land.end2173148 %l_580.sroa.0.2.vec.insert = insertelement <4 x i32> %l_580.sroa.0.0, i32 undef, i32 1149 br label %cleanup2297150 151cleanup2297: ; preds = %if.end2178, %land.end2173152 %l_580.sroa.0.1 = phi <4 x i32> [ %l_580.sroa.0.2.vec.insert, %if.end2178 ], [ %l_580.sroa.0.0, %land.end2173 ]153 br label %cleanup2329154 155cleanup2329: ; preds = %cleanup2297, %if.then1736, %if.then1732156 %l_580.sroa.0.2 = phi <4 x i32> [ %l_580.sroa.0.0, %if.then1736 ], [ %l_580.sroa.0.1, %cleanup2297 ], [ %l_580.sroa.0.0, %if.then1732 ]157 %cleanup.dest.slot.11 = phi i32 [ 0, %if.then1736 ], [ undef, %cleanup2297 ], [ 129, %if.then1732 ]158 %p_55.addr.11 = phi i16 [ %p_55.addr.10, %if.then1736 ], [ undef, %cleanup2297 ], [ %p_55.addr.10, %if.then1732 ]159 switch i32 %cleanup.dest.slot.11, label %cleanup2343.loopexit [160 i32 0, label %cleanup.cont2339161 i32 129, label %crit_edge114162 ]163 164cleanup.cont2339: ; preds = %cleanup2329165 br label %for.inc2340166 167for.inc2340: ; preds = %cleanup.cont2339168 br i1 %arg, label %for.body1509, label %crit_edge115169 170crit_edge114: ; preds = %cleanup2329171 unreachable172 173crit_edge115: ; preds = %for.inc2340174 unreachable175 176cleanup2343.loopexit: ; preds = %cleanup2329177 unreachable178 179cleanup2343.loopexit4: ; preds = %cleanup1491180 unreachable181}182 183; This segfaults due to recursion in %C4. Reason: %L6 is identified to be a184; "partially redundant load" and is replaced by a PHI node. The PHI node is then185; simplified to be constant and is removed. This leads to %L6 being replaced by186; %C4, which makes %C4 invalid since it uses %L6.187; The test case has been generated by the AMD Fuzzing project and simplified188; manually and by llvm-reduce.189 190define i32 @constant_phi_leads_to_self_reference(ptr %ptr) {191; CHECK-LABEL: @constant_phi_leads_to_self_reference(192; CHECK-NEXT: [[A9:%.*]] = alloca i1, align 1193; CHECK-NEXT: br label [[F6:%.*]]194; CHECK: T3:195; CHECK-NEXT: br label [[BB5:%.*]]196; CHECK: BB5:197; CHECK-NEXT: [[L10:%.*]] = load i1, ptr [[A9]], align 1198; CHECK-NEXT: br i1 [[L10]], label [[BB6:%.*]], label [[F6]]199; CHECK: BB6:200; CHECK-NEXT: [[LGV3:%.*]] = load i1, ptr [[PTR:%.*]], align 1201; CHECK-NEXT: [[C4:%.*]] = icmp sle i1 [[C4]], true202; CHECK-NEXT: store i1 [[C4]], ptr [[PTR]], align 1203; CHECK-NEXT: br i1 [[C4]], label [[F6]], label [[T3:%.*]]204; CHECK: F6:205; CHECK-NEXT: ret i32 0206; CHECK: F7:207; CHECK-NEXT: br label [[BB5]]208;209 %A9 = alloca i1, align 1210 br i1 false, label %BB4, label %F6211 212BB4: ; preds = %0213 br i1 false, label %F6, label %F1214 215F1: ; preds = %BB4216 br i1 false, label %T4, label %T3217 218T3: ; preds = %T4, %BB6, %F1219 %L6 = load i1, ptr %ptr, align 1220 br label %BB5221 222BB5: ; preds = %F7, %T3223 %L10 = load i1, ptr %A9, align 1224 br i1 %L10, label %BB6, label %F6225 226BB6: ; preds = %BB5227 %LGV3 = load i1, ptr %ptr, align 1228 %C4 = icmp sle i1 %L6, true229 store i1 %C4, ptr %ptr, align 1230 br i1 %L6, label %F6, label %T3231 232T4: ; preds = %F1233 br label %T3234 235F6: ; preds = %BB6, %BB5, %BB4, %0236 ret i32 0237 238F7: ; No predecessors!239 br label %BB5240}241 242; Same as above, but with multiple icmps referencing the same PHI node.243 244define i32 @recursive_icmp_mult(ptr %ptr) {245; CHECK-LABEL: @recursive_icmp_mult(246; CHECK-NEXT: [[A9:%.*]] = alloca i1, align 1247; CHECK-NEXT: br label [[F6:%.*]]248; CHECK: T3:249; CHECK-NEXT: br label [[BB5:%.*]]250; CHECK: BB5:251; CHECK-NEXT: [[L10:%.*]] = load i1, ptr [[A9]], align 1252; CHECK-NEXT: br i1 [[L10]], label [[BB6:%.*]], label [[F6]]253; CHECK: BB6:254; CHECK-NEXT: [[LGV3:%.*]] = load i1, ptr [[PTR:%.*]], align 1255; CHECK-NEXT: [[C4:%.*]] = icmp sle i1 [[C6:%.*]], true256; CHECK-NEXT: [[C5:%.*]] = icmp sle i1 [[C6]], false257; CHECK-NEXT: [[C6]] = icmp sle i1 [[C4]], [[C5]]258; CHECK-NEXT: store i1 [[C6]], ptr [[PTR]], align 1259; CHECK-NEXT: br i1 [[C6]], label [[F6]], label [[T3:%.*]]260; CHECK: F6:261; CHECK-NEXT: ret i32 0262; CHECK: F7:263; CHECK-NEXT: br label [[BB5]]264;265 %A9 = alloca i1, align 1266 br i1 false, label %BB4, label %F6267 268BB4: ; preds = %0269 br i1 false, label %F6, label %F1270 271F1: ; preds = %BB4272 br i1 false, label %T4, label %T3273 274T3: ; preds = %T4, %BB6, %F1275 %L6 = load i1, ptr %ptr, align 1276 br label %BB5277 278BB5: ; preds = %F7, %T3279 %L10 = load i1, ptr %A9, align 1280 br i1 %L10, label %BB6, label %F6281 282BB6: ; preds = %BB5283 %LGV3 = load i1, ptr %ptr, align 1284 %C4 = icmp sle i1 %L6, true285 %C5 = icmp sle i1 %L6, false286 %C6 = icmp sle i1 %C4, %C5287 store i1 %C6, ptr %ptr, align 1288 br i1 %L6, label %F6, label %T3289 290T4: ; preds = %F1291 br label %T3292 293F6: ; preds = %BB6, %BB5, %BB4, %0294 ret i32 0295 296F7: ; No predecessors!297 br label %BB5298}299 300!0 = !{!"branch_weights", i32 2146410443, i32 1073205}301