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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -mtriple=amdgcn-- -mcpu=tonga -passes=load-store-vectorizer -S -o - %s | FileCheck %s3 4@lds = internal addrspace(3) global [512 x float] undef, align 45 6; The original load has an implicit alignment of 4, and should not7; increase to an align 8 load.8 9define amdgpu_kernel void @load_keep_base_alignment_missing_align(ptr addrspace(1) %out) {10; CHECK-LABEL: @load_keep_base_alignment_missing_align(11; CHECK-NEXT: [[PTR0:%.*]] = getelementptr inbounds [512 x float], ptr addrspace(3) @lds, i32 0, i32 1112; CHECK-NEXT: [[TMP2:%.*]] = load <2 x float>, ptr addrspace(3) [[PTR0]], align 413; CHECK-NEXT: [[VAL01:%.*]] = extractelement <2 x float> [[TMP2]], i32 014; CHECK-NEXT: [[VAL12:%.*]] = extractelement <2 x float> [[TMP2]], i32 115; CHECK-NEXT: [[ADD:%.*]] = fadd float [[VAL01]], [[VAL12]]16; CHECK-NEXT: store float [[ADD]], ptr addrspace(1) [[OUT:%.*]], align 417; CHECK-NEXT: ret void18;19 %ptr0 = getelementptr inbounds [512 x float], ptr addrspace(3) @lds, i32 0, i32 1120 %val0 = load float, ptr addrspace(3) %ptr021 22 %ptr1 = getelementptr inbounds [512 x float], ptr addrspace(3) @lds, i32 0, i32 1223 %val1 = load float, ptr addrspace(3) %ptr124 %add = fadd float %val0, %val125 store float %add, ptr addrspace(1) %out26 ret void27}28 29define amdgpu_kernel void @store_keep_base_alignment_missing_align() {30; CHECK-LABEL: @store_keep_base_alignment_missing_align(31; CHECK-NEXT: [[ARRAYIDX0:%.*]] = getelementptr inbounds [512 x float], ptr addrspace(3) @lds, i32 0, i32 132; CHECK-NEXT: store <2 x float> zeroinitializer, ptr addrspace(3) [[ARRAYIDX0]], align 433; CHECK-NEXT: ret void34;35 %arrayidx0 = getelementptr inbounds [512 x float], ptr addrspace(3) @lds, i32 0, i32 136 %arrayidx1 = getelementptr inbounds [512 x float], ptr addrspace(3) @lds, i32 0, i32 237 store float 0.0, ptr addrspace(3) %arrayidx038 store float 0.0, ptr addrspace(3) %arrayidx139 ret void40}41