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1; RUN: opt -mtriple=amdgcn-amd-amdhsa -passes=load-store-vectorizer -S -o - %s | FileCheck %s2 3declare i32 @llvm.amdgcn.workitem.id.x() #14 5; CHECK-LABEL: @merge_v2p1i8(6; CHECK: load <2 x i64>7; CHECK: inttoptr i64 %{{[^ ]+}} to ptr addrspace(1)8; CHECK: inttoptr i64 %{{[^ ]+}} to ptr addrspace(1)9; CHECK: store <2 x i64> zeroinitializer10define amdgpu_kernel void @merge_v2p1i8(ptr addrspace(1) nocapture %a, ptr addrspace(1) nocapture readonly %b) #0 {11entry:12 %a.1 = getelementptr inbounds ptr addrspace(1), ptr addrspace(1) %a, i64 113 %b.1 = getelementptr inbounds ptr addrspace(1), ptr addrspace(1) %b, i64 114 15 %ld.c = load ptr addrspace(1), ptr addrspace(1) %b, align 416 %ld.c.idx.1 = load ptr addrspace(1), ptr addrspace(1) %b.1, align 417 18 store ptr addrspace(1) null, ptr addrspace(1) %a, align 419 store ptr addrspace(1) null, ptr addrspace(1) %a.1, align 420 21 ret void22}23 24; CHECK-LABEL: @merge_v2p3i8(25; CHECK: load <2 x i32>26; CHECK: inttoptr i32 %{{[^ ]+}} to ptr addrspace(3)27; CHECK: inttoptr i32 %{{[^ ]+}} to ptr addrspace(3)28; CHECK: store <2 x i32> zeroinitializer29define amdgpu_kernel void @merge_v2p3i8(ptr addrspace(3) nocapture %a, ptr addrspace(3) nocapture readonly %b) #0 {30entry:31 %a.1 = getelementptr inbounds ptr addrspace(3), ptr addrspace(3) %a, i64 132 %b.1 = getelementptr inbounds ptr addrspace(3), ptr addrspace(3) %b, i64 133 34 %ld.c = load ptr addrspace(3), ptr addrspace(3) %b, align 435 %ld.c.idx.1 = load ptr addrspace(3), ptr addrspace(3) %b.1, align 436 37 store ptr addrspace(3) null, ptr addrspace(3) %a, align 438 store ptr addrspace(3) null, ptr addrspace(3) %a.1, align 439 40 ret void41}42 43; CHECK-LABEL: @merge_ptr_i32(44; CHECK: load <4 x i32>45; CHECK: store <4 x i32>46define amdgpu_kernel void @merge_ptr_i32(ptr addrspace(3) nocapture %a, ptr addrspace(3) nocapture readonly %b) #0 {47entry:48 %a.0 = getelementptr inbounds ptr addrspace(3), ptr addrspace(3) %a, i64 049 %a.1 = getelementptr inbounds ptr addrspace(3), ptr addrspace(3) %a, i64 150 %a.2 = getelementptr inbounds ptr addrspace(3), ptr addrspace(3) %a, i64 251 52 %b.0 = getelementptr inbounds ptr addrspace(3), ptr addrspace(3) %b, i64 053 %b.1 = getelementptr inbounds ptr addrspace(3), ptr addrspace(3) %b, i64 154 %b.2 = getelementptr inbounds ptr addrspace(3), ptr addrspace(3) %b, i64 255 56 %ld.0 = load i32, ptr addrspace(3) %b.0, align 1657 %ld.1 = load ptr addrspace(3), ptr addrspace(3) %b.1, align 458 %ld.2 = load <2 x i32>, ptr addrspace(3) %b.2, align 859 60 store i32 0, ptr addrspace(3) %a.0, align 1661 store ptr addrspace(3) null, ptr addrspace(3) %a.1, align 462 store <2 x i32> <i32 0, i32 0>, ptr addrspace(3) %a.2, align 863 64 ret void65}66 67; CHECK-LABEL: @merge_ptr_i32_vec_first(68; CHECK: load <4 x i32>69; CHECK: store <4 x i32>70define amdgpu_kernel void @merge_ptr_i32_vec_first(ptr addrspace(3) nocapture %a, ptr addrspace(3) nocapture readonly %b) #0 {71entry:72 %a.0 = getelementptr inbounds ptr addrspace(3), ptr addrspace(3) %a, i64 073 %a.1 = getelementptr inbounds ptr addrspace(3), ptr addrspace(3) %a, i64 274 %a.2 = getelementptr inbounds ptr addrspace(3), ptr addrspace(3) %a, i64 375 76 %b.0 = getelementptr inbounds ptr addrspace(3), ptr addrspace(3) %b, i64 077 %b.1 = getelementptr inbounds ptr addrspace(3), ptr addrspace(3) %b, i64 278 %b.2 = getelementptr inbounds ptr addrspace(3), ptr addrspace(3) %b, i64 379 80 %ld.0 = load <2 x i32>, ptr addrspace(3) %b.0, align 1681 %ld.1 = load ptr addrspace(3), ptr addrspace(3) %b.1, align 882 %ld.2 = load i32, ptr addrspace(3) %b.2, align 483 84 store <2 x i32> <i32 0, i32 0>, ptr addrspace(3) %a.0, align 1685 store ptr addrspace(3) null, ptr addrspace(3) %a.1, align 886 store i32 0, ptr addrspace(3) %a.2, align 487 88 ret void89}90 91; CHECK-LABEL: @merge_load_i64_ptr64(92; CHECK: load <2 x i64>93; CHECK: [[ELT1:%[^ ]+]] = extractelement <2 x i64> %{{[^ ]+}}, i32 194; CHECK: inttoptr i64 [[ELT1]] to ptr addrspace(1)95define amdgpu_kernel void @merge_load_i64_ptr64(ptr addrspace(1) nocapture %a) #0 {96entry:97 %a.1 = getelementptr inbounds i64, ptr addrspace(1) %a, i64 198 99 %ld.0 = load i64, ptr addrspace(1) %a100 %ld.1 = load ptr addrspace(1), ptr addrspace(1) %a.1101 102 ret void103}104 105; CHECK-LABEL: @merge_load_ptr64_i64(106; CHECK: load <2 x i64>107; CHECK: [[ELT0:%[^ ]+]] = extractelement <2 x i64> %{{[^ ]+}}, i32 0108; CHECK: inttoptr i64 [[ELT0]] to ptr addrspace(1)109define amdgpu_kernel void @merge_load_ptr64_i64(ptr addrspace(1) nocapture %a) #0 {110entry:111 %a.1 = getelementptr inbounds i64, ptr addrspace(1) %a, i64 1112 113 %ld.0 = load ptr addrspace(1), ptr addrspace(1) %a114 %ld.1 = load i64, ptr addrspace(1) %a.1115 116 ret void117}118 119; CHECK-LABEL: @merge_store_ptr64_i64(120; CHECK: [[ELT0:%[^ ]+]] = ptrtoint ptr addrspace(1) %ptr0 to i64121; CHECK: insertelement <2 x i64> poison, i64 [[ELT0]], i32 0122; CHECK: store <2 x i64>123define amdgpu_kernel void @merge_store_ptr64_i64(ptr addrspace(1) nocapture %a, ptr addrspace(1) %ptr0, i64 %val1) #0 {124entry:125 %a.1 = getelementptr inbounds i64, ptr addrspace(1) %a, i64 1126 127 128 store ptr addrspace(1) %ptr0, ptr addrspace(1) %a129 store i64 %val1, ptr addrspace(1) %a.1130 131 ret void132}133 134; CHECK-LABEL: @merge_store_i64_ptr64(135; CHECK: [[ELT1:%[^ ]+]] = ptrtoint ptr addrspace(1) %ptr1 to i64136; CHECK: insertelement <2 x i64> %{{[^ ]+}}, i64 [[ELT1]], i32 1137; CHECK: store <2 x i64>138define amdgpu_kernel void @merge_store_i64_ptr64(ptr addrspace(1) nocapture %a, i64 %val0, ptr addrspace(1) %ptr1) #0 {139entry:140 %a.1 = getelementptr inbounds ptr addrspace(1), ptr addrspace(1) %a, i64 1141 142 store i64 %val0, ptr addrspace(1) %a143 store ptr addrspace(1) %ptr1, ptr addrspace(1) %a.1144 145 ret void146}147 148; CHECK-LABEL: @merge_load_i32_ptr32(149; CHECK: load <2 x i32>150; CHECK: [[ELT1:%[^ ]+]] = extractelement <2 x i32> %{{[^ ]+}}, i32 1151; CHECK: inttoptr i32 [[ELT1]] to ptr addrspace(3)152define amdgpu_kernel void @merge_load_i32_ptr32(ptr addrspace(3) nocapture %a) #0 {153entry:154 %a.1 = getelementptr inbounds i32, ptr addrspace(3) %a, i32 1155 156 %ld.0 = load i32, ptr addrspace(3) %a157 %ld.1 = load ptr addrspace(3), ptr addrspace(3) %a.1158 159 ret void160}161 162; CHECK-LABEL: @merge_load_ptr32_i32(163; CHECK: load <2 x i32>164; CHECK: [[ELT0:%[^ ]+]] = extractelement <2 x i32> %{{[^ ]+}}, i32 0165; CHECK: inttoptr i32 [[ELT0]] to ptr addrspace(3)166define amdgpu_kernel void @merge_load_ptr32_i32(ptr addrspace(3) nocapture %a) #0 {167entry:168 %a.1 = getelementptr inbounds i32, ptr addrspace(3) %a, i32 1169 170 %ld.0 = load ptr addrspace(3), ptr addrspace(3) %a171 %ld.1 = load i32, ptr addrspace(3) %a.1172 173 ret void174}175 176; CHECK-LABEL: @merge_store_ptr32_i32(177; CHECK: [[ELT0:%[^ ]+]] = ptrtoint ptr addrspace(3) %ptr0 to i32178; CHECK: insertelement <2 x i32> poison, i32 [[ELT0]], i32 0179; CHECK: store <2 x i32>180define amdgpu_kernel void @merge_store_ptr32_i32(ptr addrspace(3) nocapture %a, ptr addrspace(3) %ptr0, i32 %val1) #0 {181entry:182 %a.1 = getelementptr inbounds i32, ptr addrspace(3) %a, i32 1183 184 store ptr addrspace(3) %ptr0, ptr addrspace(3) %a185 store i32 %val1, ptr addrspace(3) %a.1186 187 ret void188}189 190; CHECK-LABEL: @merge_store_i32_ptr32(191; CHECK: [[ELT1:%[^ ]+]] = ptrtoint ptr addrspace(3) %ptr1 to i32192; CHECK: insertelement <2 x i32> %{{[^ ]+}}, i32 [[ELT1]], i32 1193; CHECK: store <2 x i32>194define amdgpu_kernel void @merge_store_i32_ptr32(ptr addrspace(3) nocapture %a, i32 %val0, ptr addrspace(3) %ptr1) #0 {195entry:196 %a.1 = getelementptr inbounds ptr addrspace(3), ptr addrspace(3) %a, i32 1197 198 store i32 %val0, ptr addrspace(3) %a199 store ptr addrspace(3) %ptr1, ptr addrspace(3) %a.1200 201 ret void202}203 204; CHECK-LABEL: @no_merge_store_ptr32_i64(205; CHECK: store ptr addrspace(3)206; CHECK: store i64207define amdgpu_kernel void @no_merge_store_ptr32_i64(ptr addrspace(1) nocapture %a, ptr addrspace(3) %ptr0, i64 %val1) #0 {208entry:209 %a.1 = getelementptr inbounds i64, ptr addrspace(1) %a, i64 1210 211 212 store ptr addrspace(3) %ptr0, ptr addrspace(1) %a213 store i64 %val1, ptr addrspace(1) %a.1214 215 ret void216}217 218; CHECK-LABEL: @no_merge_store_i64_ptr32(219; CHECK: store i64220; CHECK: store ptr addrspace(3)221define amdgpu_kernel void @no_merge_store_i64_ptr32(ptr addrspace(1) nocapture %a, i64 %val0, ptr addrspace(3) %ptr1) #0 {222entry:223 %a.1 = getelementptr inbounds ptr addrspace(3), ptr addrspace(1) %a, i64 1224 225 store i64 %val0, ptr addrspace(1) %a226 store ptr addrspace(3) %ptr1, ptr addrspace(1) %a.1227 228 ret void229}230 231; CHECK-LABEL: @no_merge_load_i64_ptr32(232; CHECK: load i64,233; CHECK: load ptr addrspace(3),234define amdgpu_kernel void @no_merge_load_i64_ptr32(ptr addrspace(1) nocapture %a) #0 {235entry:236 %a.1 = getelementptr inbounds i64, ptr addrspace(1) %a, i64 1237 238 %ld.0 = load i64, ptr addrspace(1) %a239 %ld.1 = load ptr addrspace(3), ptr addrspace(1) %a.1240 241 ret void242}243 244; CHECK-LABEL: @no_merge_load_ptr32_i64(245; CHECK: load ptr addrspace(3),246; CHECK: load i64,247define amdgpu_kernel void @no_merge_load_ptr32_i64(ptr addrspace(1) nocapture %a) #0 {248entry:249 %a.1 = getelementptr inbounds i64, ptr addrspace(1) %a, i64 1250 251 %ld.0 = load ptr addrspace(3), ptr addrspace(1) %a252 %ld.1 = load i64, ptr addrspace(1) %a.1253 254 ret void255}256 257; XXX - This isn't merged for some reason258; CHECK-LABEL: @merge_v2p1i8_v2p1i8(259; CHECK: load <2 x ptr addrspace(1)>260; CHECK: load <2 x ptr addrspace(1)>261; CHECK: store <2 x ptr addrspace(1)>262; CHECK: store <2 x ptr addrspace(1)>263define amdgpu_kernel void @merge_v2p1i8_v2p1i8(ptr addrspace(1) nocapture noalias %a, ptr addrspace(1) nocapture readonly noalias %b) #0 {264entry:265 %a.1 = getelementptr inbounds <2 x ptr addrspace(1)>, ptr addrspace(1) %a, i64 1266 %b.1 = getelementptr inbounds <2 x ptr addrspace(1)>, ptr addrspace(1) %b, i64 1267 268 %ld.c = load <2 x ptr addrspace(1)>, ptr addrspace(1) %b, align 4269 %ld.c.idx.1 = load <2 x ptr addrspace(1)>, ptr addrspace(1) %b.1, align 4270 271 store <2 x ptr addrspace(1)> zeroinitializer, ptr addrspace(1) %a, align 4272 store <2 x ptr addrspace(1)> zeroinitializer, ptr addrspace(1) %a.1, align 4273 ret void274}275 276; CHECK-LABEL: @merge_load_ptr64_f64(277; CHECK: load <2 x i64>278; CHECK: [[ELT0:%[^ ]+]] = extractelement <2 x i64> %{{[^ ]+}}, i32 0279; CHECK: [[ELT0_INT:%[^ ]+]] = inttoptr i64 [[ELT0]] to ptr addrspace(1)280; CHECK: [[ELT1_INT:%[^ ]+]] = extractelement <2 x i64> %{{[^ ]+}}, i32 1281; CHECK: bitcast i64 [[ELT1_INT]] to double282define amdgpu_kernel void @merge_load_ptr64_f64(ptr addrspace(1) nocapture %a) #0 {283entry:284 %a.1 = getelementptr inbounds double, ptr addrspace(1) %a, i64 1285 286 %ld.0 = load ptr addrspace(1), ptr addrspace(1) %a287 %ld.1 = load double, ptr addrspace(1) %a.1288 289 ret void290}291 292; CHECK-LABEL: @merge_load_f64_ptr64(293; CHECK: load <2 x i64>294; CHECK: [[ELT0:%[^ ]+]] = extractelement <2 x i64> %{{[^ ]+}}, i32 0295; CHECK: bitcast i64 [[ELT0]] to double296; CHECK: [[ELT1:%[^ ]+]] = extractelement <2 x i64> %{{[^ ]+}}, i32 1297; CHECK: inttoptr i64 [[ELT1]] to ptr addrspace(1)298define amdgpu_kernel void @merge_load_f64_ptr64(ptr addrspace(1) nocapture %a) #0 {299entry:300 %a.1 = getelementptr inbounds double, ptr addrspace(1) %a, i64 1301 302 %ld.0 = load double, ptr addrspace(1) %a303 %ld.1 = load ptr addrspace(1), ptr addrspace(1) %a.1304 305 ret void306}307 308; CHECK-LABEL: @merge_store_ptr64_f64(309; CHECK: [[ELT0_INT:%[^ ]+]] = ptrtoint ptr addrspace(1) %ptr0 to i64310; CHECK: insertelement <2 x i64> poison, i64 [[ELT0_INT]], i32 0311; CHECK: [[ELT1_INT:%[^ ]+]] = bitcast double %val1 to i64312; CHECK: insertelement <2 x i64> %{{[^ ]+}}, i64 [[ELT1_INT]], i32 1313; CHECK: store <2 x i64>314define amdgpu_kernel void @merge_store_ptr64_f64(ptr addrspace(1) nocapture %a, ptr addrspace(1) %ptr0, double %val1) #0 {315entry:316 %a.1 = getelementptr inbounds double, ptr addrspace(1) %a, i64 1317 318 store ptr addrspace(1) %ptr0, ptr addrspace(1) %a319 store double %val1, ptr addrspace(1) %a.1320 321 ret void322}323 324; CHECK-LABEL: @merge_store_f64_ptr64(325; CHECK: [[ELT0_INT:%[^ ]+]] = bitcast double %val0 to i64326; CHECK: insertelement <2 x i64> poison, i64 [[ELT0_INT]], i32 0327; CHECK: [[ELT1_INT:%[^ ]+]] = ptrtoint ptr addrspace(1) %ptr1 to i64328; CHECK: insertelement <2 x i64> %{{[^ ]+}}, i64 [[ELT1_INT]], i32 1329; CHECK: store <2 x i64>330define amdgpu_kernel void @merge_store_f64_ptr64(ptr addrspace(1) nocapture %a, double %val0, ptr addrspace(1) %ptr1) #0 {331entry:332 %a.1 = getelementptr inbounds ptr addrspace(1), ptr addrspace(1) %a, i64 1333 334 store double %val0, ptr addrspace(1) %a335 store ptr addrspace(1) %ptr1, ptr addrspace(1) %a.1336 337 ret void338}339 340attributes #0 = { nounwind }341attributes #1 = { nounwind readnone }342