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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2 3; This checks updating of phi nodes when the transformation is deemed4; unprofitable after IV widening.5 6; RUN: opt < %s -S -passes='loop(loop-flatten),verify' \7; RUN: -verify-loop-info -verify-dom-info -verify-scev | \8; RUN: FileCheck %s --check-prefix=CHECK9 10target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"11 12@d = dso_local global i32 0, align 413@b = internal global i32 0, align 414@a = internal global i32 0, align 415@c = dso_local global ptr null, align 816 17define dso_local i32 @fn1() local_unnamed_addr #0 {18; CHECK-LABEL: @fn1(19; CHECK-NEXT: entry:20; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @d, align 421; CHECK-NEXT: store i32 [[TMP0]], ptr @b, align 422; CHECK-NEXT: store i32 [[TMP0]], ptr @a, align 423; CHECK-NEXT: [[CMP15:%.*]] = icmp sgt i32 [[TMP0]], 024; CHECK-NEXT: br i1 [[CMP15]], label [[FOR_COND1_PREHEADER_US_PREHEADER:%.*]], label [[FOR_END6:%.*]]25; CHECK: for.cond1.preheader.us.preheader:26; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[TMP0]] to i6427; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[TMP0]] to i6428; CHECK-NEXT: [[TMP3:%.*]] = sext i32 [[TMP0]] to i6429; CHECK-NEXT: br label [[FOR_COND1_PREHEADER_US:%.*]]30; CHECK: for.cond1.preheader.us:31; CHECK-NEXT: [[INDVAR2:%.*]] = phi i64 [ [[INDVAR_NEXT3:%.*]], [[FOR_COND1_FOR_INC4_CRIT_EDGE_US:%.*]] ], [ 0, [[FOR_COND1_PREHEADER_US_PREHEADER]] ]32; CHECK-NEXT: [[I_016_US:%.*]] = phi i32 [ [[INC5_US:%.*]], [[FOR_COND1_FOR_INC4_CRIT_EDGE_US]] ], [ 0, [[FOR_COND1_PREHEADER_US_PREHEADER]] ]33; CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr @c, align 834; CHECK-NEXT: [[TMP5:%.*]] = mul nsw i64 [[INDVAR2]], [[TMP2]]35; CHECK-NEXT: [[MUL_US:%.*]] = mul nsw i32 [[I_016_US]], [[TMP0]]36; CHECK-NEXT: [[TMP6:%.*]] = sext i32 [[MUL_US]] to i6437; CHECK-NEXT: br label [[FOR_BODY3_US:%.*]]38; CHECK: for.body3.us:39; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[INDVAR_NEXT:%.*]], [[FOR_BODY3_US]] ], [ 0, [[FOR_COND1_PREHEADER_US]] ]40; CHECK-NEXT: [[J_014_US:%.*]] = phi i32 [ 0, [[FOR_COND1_PREHEADER_US]] ], [ [[INC_US:%.*]], [[FOR_BODY3_US]] ]41; CHECK-NEXT: [[TMP7:%.*]] = add nsw i64 [[INDVAR]], [[TMP5]]42; CHECK-NEXT: [[TMP8:%.*]] = sext i32 [[J_014_US]] to i6443; CHECK-NEXT: [[TMP9:%.*]] = add nsw i64 [[TMP8]], [[TMP5]]44; CHECK-NEXT: [[ADD_US:%.*]] = add nsw i32 [[J_014_US]], [[MUL_US]]45; CHECK-NEXT: [[IDXPROM_US:%.*]] = sext i32 [[ADD_US]] to i6446; CHECK-NEXT: [[ARRAYIDX_US:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i64 [[TMP7]]47; CHECK-NEXT: store i32 32, ptr [[ARRAYIDX_US]], align 448; CHECK-NEXT: [[INDVAR_NEXT]] = add nuw nsw i64 [[INDVAR]], 149; CHECK-NEXT: [[INC_US]] = add nuw nsw i32 [[J_014_US]], 150; CHECK-NEXT: [[CMP2_US:%.*]] = icmp slt i64 [[INDVAR_NEXT]], [[TMP1]]51; CHECK-NEXT: br i1 [[CMP2_US]], label [[FOR_BODY3_US]], label [[FOR_COND1_FOR_INC4_CRIT_EDGE_US]]52; CHECK: for.cond1.for.inc4_crit_edge.us:53; CHECK-NEXT: [[INDVAR_NEXT3]] = add nuw nsw i64 [[INDVAR2]], 154; CHECK-NEXT: [[INC5_US]] = add nuw nsw i32 [[I_016_US]], 155; CHECK-NEXT: [[CMP_US:%.*]] = icmp slt i64 [[INDVAR_NEXT3]], [[TMP3]]56; CHECK-NEXT: br i1 [[CMP_US]], label [[FOR_COND1_PREHEADER_US]], label [[FOR_END6_LOOPEXIT:%.*]]57; CHECK: for.end6.loopexit:58; CHECK-NEXT: br label [[FOR_END6]]59; CHECK: for.end6:60; CHECK-NEXT: ret i32 undef61;62entry:63 %0 = load i32, ptr @d, align 464 store i32 %0, ptr @b, align 465 store i32 %0, ptr @a, align 466 %cmp15 = icmp sgt i32 %0, 067 br i1 %cmp15, label %for.cond1.preheader.us.preheader, label %for.end668 69for.cond1.preheader.us.preheader:70 br label %for.cond1.preheader.us71 72for.cond1.preheader.us:73 %i.016.us = phi i32 [ %inc5.us, %for.cond1.for.inc4_crit_edge.us ], [ 0, %for.cond1.preheader.us.preheader ]74 %1 = load ptr, ptr @c, align 875 %mul.us = mul nsw i32 %i.016.us, %076 br label %for.body3.us77 78for.body3.us:79 %j.014.us = phi i32 [ 0, %for.cond1.preheader.us ], [ %inc.us, %for.body3.us ]80 %add.us = add nsw i32 %j.014.us, %mul.us81 %idxprom.us = sext i32 %add.us to i6482 %arrayidx.us = getelementptr inbounds i32, ptr %1, i64 %idxprom.us83 store i32 32, ptr %arrayidx.us, align 484 %inc.us = add nuw nsw i32 %j.014.us, 185 %cmp2.us = icmp slt i32 %inc.us, %086 br i1 %cmp2.us, label %for.body3.us, label %for.cond1.for.inc4_crit_edge.us87 88for.cond1.for.inc4_crit_edge.us:89 %inc5.us = add nuw nsw i32 %i.016.us, 190 %cmp.us = icmp slt i32 %inc5.us, %091 br i1 %cmp.us, label %for.cond1.preheader.us, label %for.end6.loopexit92 93for.end6.loopexit:94 br label %for.end695 96for.end6:97 ret i32 undef98}99