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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt -passes=loop-idiom -mtriple=aarch64 < %s -S | FileCheck %s3 4; Recognize CTLZ builtin pattern.5; Here we'll just convert loop to countable,6; so do not insert builtin if CPU do not support CTLZ7;8; int ctlz_and_other(int n, char *a)9; {10; n = n >= 0 ? n : -n;11; int i = 0, n0 = n;12; while(n >>= 1) {13; a[i] = (n0 & (1 << i)) ? 1 : 0;14; i++;15; }16; return i;17; }18;19 20; Function Attrs: norecurse nounwind uwtable21define i32 @ctlz_and_other(i32 %n, ptr nocapture %a) {22; CHECK-LABEL: define i32 @ctlz_and_other(23; CHECK-SAME: i32 [[N:%.*]], ptr captures(none) [[A:%.*]]) {24; CHECK-NEXT: entry:25; CHECK-NEXT: [[ABS_N:%.*]] = call i32 @llvm.abs.i32(i32 [[N]], i1 true)26; CHECK-NEXT: [[SHR8:%.*]] = lshr i32 [[ABS_N]], 127; CHECK-NEXT: [[TOBOOL9:%.*]] = icmp eq i32 [[SHR8]], 028; CHECK-NEXT: br i1 [[TOBOOL9]], label [[WHILE_END:%.*]], label [[WHILE_BODY_PREHEADER:%.*]]29; CHECK: while.body.preheader:30; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.ctlz.i32(i32 [[SHR8]], i1 true)31; CHECK-NEXT: [[TMP1:%.*]] = sub i32 32, [[TMP0]]32; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i6433; CHECK-NEXT: br label [[WHILE_BODY:%.*]]34; CHECK: while.body:35; CHECK-NEXT: [[TCPHI:%.*]] = phi i32 [ [[TMP1]], [[WHILE_BODY_PREHEADER]] ], [ [[TCDEC:%.*]], [[WHILE_BODY]] ]36; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[WHILE_BODY]] ], [ 0, [[WHILE_BODY_PREHEADER]] ]37; CHECK-NEXT: [[SHR11:%.*]] = phi i32 [ [[SHR:%.*]], [[WHILE_BODY]] ], [ [[SHR8]], [[WHILE_BODY_PREHEADER]] ]38; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[INDVARS_IV]] to i3239; CHECK-NEXT: [[SHL:%.*]] = shl i32 1, [[TMP3]]40; CHECK-NEXT: [[AND:%.*]] = and i32 [[SHL]], [[ABS_N]]41; CHECK-NEXT: [[TOBOOL1:%.*]] = icmp ne i32 [[AND]], 042; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[TOBOOL1]] to i843; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[INDVARS_IV]]44; CHECK-NEXT: store i8 [[CONV]], ptr [[ARRAYIDX]], align 145; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw i64 [[INDVARS_IV]], 146; CHECK-NEXT: [[SHR]] = ashr i32 [[SHR11]], 147; CHECK-NEXT: [[TCDEC]] = sub nsw i32 [[TCPHI]], 148; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TCDEC]], 049; CHECK-NEXT: br i1 [[TOBOOL]], label [[WHILE_END_LOOPEXIT:%.*]], label [[WHILE_BODY]]50; CHECK: while.end.loopexit:51; CHECK-NEXT: [[INDVARS_IV_NEXT_LCSSA:%.*]] = phi i64 [ [[TMP2]], [[WHILE_BODY]] ]52; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[INDVARS_IV_NEXT_LCSSA]] to i3253; CHECK-NEXT: br label [[WHILE_END]]54; CHECK: while.end:55; CHECK-NEXT: [[I_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP4]], [[WHILE_END_LOOPEXIT]] ]56; CHECK-NEXT: ret i32 [[I_0_LCSSA]]57;58entry:59 %abs_n = call i32 @llvm.abs.i32(i32 %n, i1 true)60 %shr8 = lshr i32 %abs_n, 161 %tobool9 = icmp eq i32 %shr8, 062 br i1 %tobool9, label %while.end, label %while.body.preheader63 64while.body.preheader: ; preds = %entry65 br label %while.body66 67while.body: ; preds = %while.body.preheader, %while.body68 %indvars.iv = phi i64 [ %indvars.iv.next, %while.body ], [ 0, %while.body.preheader ]69 %shr11 = phi i32 [ %shr, %while.body ], [ %shr8, %while.body.preheader ]70 %0 = trunc i64 %indvars.iv to i3271 %shl = shl i32 1, %072 %and = and i32 %shl, %abs_n73 %tobool1 = icmp ne i32 %and, 074 %conv = zext i1 %tobool1 to i875 %arrayidx = getelementptr inbounds i8, ptr %a, i64 %indvars.iv76 store i8 %conv, ptr %arrayidx, align 177 %indvars.iv.next = add nuw i64 %indvars.iv, 178 %shr = ashr i32 %shr11, 179 %tobool = icmp eq i32 %shr, 080 br i1 %tobool, label %while.end.loopexit, label %while.body81 82while.end.loopexit: ; preds = %while.body83 %1 = trunc i64 %indvars.iv.next to i3284 br label %while.end85 86while.end: ; preds = %while.end.loopexit, %entry87 %i.0.lcssa = phi i32 [ 0, %entry ], [ %1, %while.end.loopexit ]88 ret i32 %i.0.lcssa89}90 91; Recognize CTLZ builtin pattern.92; Here it will replace the loop -93; assume builtin is always profitable.94;95; int ctlz_zero_check(int n)96; {97; n = n >= 0 ? n : -n;98; int i = 0;99; while(n) {100; n >>= 1;101; i++;102; }103; return i;104; }105;106 107; Function Attrs: norecurse nounwind readnone uwtable108define i32 @ctlz_zero_check(i32 %n) {109; CHECK-LABEL: define i32 @ctlz_zero_check(110; CHECK-SAME: i32 [[N:%.*]]) {111; CHECK-NEXT: entry:112; CHECK-NEXT: [[ABS_N:%.*]] = call i32 @llvm.abs.i32(i32 [[N]], i1 true)113; CHECK-NEXT: [[TOBOOL4:%.*]] = icmp eq i32 [[ABS_N]], 0114; CHECK-NEXT: br i1 [[TOBOOL4]], label [[WHILE_END:%.*]], label [[WHILE_BODY_PREHEADER:%.*]]115; CHECK: while.body.preheader:116; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.ctlz.i32(i32 [[ABS_N]], i1 true)117; CHECK-NEXT: [[TMP1:%.*]] = sub i32 32, [[TMP0]]118; CHECK-NEXT: br label [[WHILE_BODY:%.*]]119; CHECK: while.body:120; CHECK-NEXT: [[TCPHI:%.*]] = phi i32 [ [[TMP1]], [[WHILE_BODY_PREHEADER]] ], [ [[TCDEC:%.*]], [[WHILE_BODY]] ]121; CHECK-NEXT: [[I_06:%.*]] = phi i32 [ [[INC:%.*]], [[WHILE_BODY]] ], [ 0, [[WHILE_BODY_PREHEADER]] ]122; CHECK-NEXT: [[N_ADDR_05:%.*]] = phi i32 [ [[SHR:%.*]], [[WHILE_BODY]] ], [ [[ABS_N]], [[WHILE_BODY_PREHEADER]] ]123; CHECK-NEXT: [[SHR]] = ashr i32 [[N_ADDR_05]], 1124; CHECK-NEXT: [[INC]] = add nsw i32 [[I_06]], 1125; CHECK-NEXT: [[TCDEC]] = sub nsw i32 [[TCPHI]], 1126; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TCDEC]], 0127; CHECK-NEXT: br i1 [[TOBOOL]], label [[WHILE_END_LOOPEXIT:%.*]], label [[WHILE_BODY]]128; CHECK: while.end.loopexit:129; CHECK-NEXT: [[INC_LCSSA:%.*]] = phi i32 [ [[TMP1]], [[WHILE_BODY]] ]130; CHECK-NEXT: br label [[WHILE_END]]131; CHECK: while.end:132; CHECK-NEXT: [[I_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC_LCSSA]], [[WHILE_END_LOOPEXIT]] ]133; CHECK-NEXT: ret i32 [[I_0_LCSSA]]134;135entry:136 %abs_n = call i32 @llvm.abs.i32(i32 %n, i1 true)137 %tobool4 = icmp eq i32 %abs_n, 0138 br i1 %tobool4, label %while.end, label %while.body.preheader139 140while.body.preheader: ; preds = %entry141 br label %while.body142 143while.body: ; preds = %while.body.preheader, %while.body144 %i.06 = phi i32 [ %inc, %while.body ], [ 0, %while.body.preheader ]145 %n.addr.05 = phi i32 [ %shr, %while.body ], [ %abs_n, %while.body.preheader ]146 %shr = ashr i32 %n.addr.05, 1147 %inc = add nsw i32 %i.06, 1148 %tobool = icmp eq i32 %shr, 0149 br i1 %tobool, label %while.end.loopexit, label %while.body150 151while.end.loopexit: ; preds = %while.body152 br label %while.end153 154while.end: ; preds = %while.end.loopexit, %entry155 %i.0.lcssa = phi i32 [ 0, %entry ], [ %inc, %while.end.loopexit ]156 ret i32 %i.0.lcssa157}158 159; Recognize CTLZ builtin pattern.160; Here it will replace the loop -161; assume builtin is always profitable.162;163; int ctlz(int n)164; {165; n = n >= 0 ? n : -n;166; int i = 0;167; while(n >>= 1) {168; i++;169; }170; return i;171; }172;173 174; Function Attrs: norecurse nounwind readnone uwtable175define i32 @ctlz(i32 %n) {176; CHECK-LABEL: define i32 @ctlz(177; CHECK-SAME: i32 [[N:%.*]]) {178; CHECK-NEXT: entry:179; CHECK-NEXT: [[ABS_N:%.*]] = call i32 @llvm.abs.i32(i32 [[N]], i1 true)180; CHECK-NEXT: [[TMP0:%.*]] = ashr i32 [[ABS_N]], 1181; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctlz.i32(i32 [[TMP0]], i1 false)182; CHECK-NEXT: [[TMP2:%.*]] = sub i32 32, [[TMP1]]183; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 1184; CHECK-NEXT: br label [[WHILE_COND:%.*]]185; CHECK: while.cond:186; CHECK-NEXT: [[TCPHI:%.*]] = phi i32 [ [[TMP3]], [[ENTRY:%.*]] ], [ [[TCDEC:%.*]], [[WHILE_COND]] ]187; CHECK-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[ABS_N]], [[ENTRY]] ], [ [[SHR:%.*]], [[WHILE_COND]] ]188; CHECK-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[INC:%.*]], [[WHILE_COND]] ]189; CHECK-NEXT: [[SHR]] = ashr i32 [[N_ADDR_0]], 1190; CHECK-NEXT: [[TCDEC]] = sub nsw i32 [[TCPHI]], 1191; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TCDEC]], 0192; CHECK-NEXT: [[INC]] = add nsw i32 [[I_0]], 1193; CHECK-NEXT: br i1 [[TOBOOL]], label [[WHILE_END:%.*]], label [[WHILE_COND]]194; CHECK: while.end:195; CHECK-NEXT: [[I_0_LCSSA:%.*]] = phi i32 [ [[TMP2]], [[WHILE_COND]] ]196; CHECK-NEXT: ret i32 [[I_0_LCSSA]]197;198entry:199 %abs_n = call i32 @llvm.abs.i32(i32 %n, i1 true)200 br label %while.cond201 202while.cond: ; preds = %while.cond, %entry203 %n.addr.0 = phi i32 [ %abs_n, %entry ], [ %shr, %while.cond ]204 %i.0 = phi i32 [ 0, %entry ], [ %inc, %while.cond ]205 %shr = ashr i32 %n.addr.0, 1206 %tobool = icmp eq i32 %shr, 0207 %inc = add nsw i32 %i.0, 1208 br i1 %tobool, label %while.end, label %while.cond209 210while.end: ; preds = %while.cond211 ret i32 %i.0212}213 214; Recognize CTLZ builtin pattern.215; Here it will replace the loop -216; assume builtin is always profitable.217;218; This test covers how instcombine may optimise the previous ctlz case.219;220; int ctlz(int n)221; {222; n = n >= 0 ? n : -n;223; int i = 0;224; while(n >>= 1) {225; i++;226; }227; return i;228; }229 230define i32 @ctlz_fold(i32 noundef %n) {231; CHECK-LABEL: define i32 @ctlz_fold(232; CHECK-SAME: i32 noundef [[N:%.*]]) {233; CHECK-NEXT: entry:234; CHECK-NEXT: [[COND:%.*]] = tail call i32 @llvm.abs.i32(i32 [[N]], i1 true)235; CHECK-NEXT: [[TOBOOL_NOT5:%.*]] = icmp ult i32 [[COND]], 2236; CHECK-NEXT: br i1 [[TOBOOL_NOT5]], label [[WHILE_END:%.*]], label [[WHILE_BODY_PREHEADER:%.*]]237; CHECK: while.body.preheader:238; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctlz.i32(i32 [[COND]], i1 true)239; CHECK-NEXT: [[TMP2:%.*]] = sub i32 32, [[TMP1]]240; CHECK-NEXT: [[TMP3:%.*]] = sub i32 [[TMP2]], 1241; CHECK-NEXT: br label [[WHILE_BODY:%.*]]242; CHECK: while.body:243; CHECK-NEXT: [[TCPHI:%.*]] = phi i32 [ [[TMP3]], [[WHILE_BODY_PREHEADER]] ], [ [[TCDEC:%.*]], [[WHILE_BODY]] ]244; CHECK-NEXT: [[I_07:%.*]] = phi i32 [ [[INC:%.*]], [[WHILE_BODY]] ], [ 0, [[WHILE_BODY_PREHEADER]] ]245; CHECK-NEXT: [[N_ADDR_06:%.*]] = phi i32 [ [[SHR:%.*]], [[WHILE_BODY]] ], [ [[COND]], [[WHILE_BODY_PREHEADER]] ]246; CHECK-NEXT: [[SHR]] = lshr i32 [[N_ADDR_06]], 1247; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_07]], 1248; CHECK-NEXT: [[TCDEC]] = sub nsw i32 [[TCPHI]], 1249; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[TCDEC]], 0250; CHECK-NEXT: br i1 [[TOBOOL_NOT]], label [[WHILE_END_LOOPEXIT:%.*]], label [[WHILE_BODY]]251; CHECK: while.end.loopexit:252; CHECK-NEXT: [[INC_LCSSA:%.*]] = phi i32 [ [[TMP3]], [[WHILE_BODY]] ]253; CHECK-NEXT: br label [[WHILE_END]]254; CHECK: while.end:255; CHECK-NEXT: [[I_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC_LCSSA]], [[WHILE_END_LOOPEXIT]] ]256; CHECK-NEXT: ret i32 [[I_0_LCSSA]]257;258entry:259 %cond = tail call i32 @llvm.abs.i32(i32 %n, i1 true)260 %tobool.not5 = icmp ult i32 %cond, 2261 br i1 %tobool.not5, label %while.end, label %while.body.preheader262 263while.body.preheader: ; preds = %entry264 br label %while.body265 266while.body: ; preds = %while.body.preheader, %while.body267 %i.07 = phi i32 [ %inc, %while.body ], [ 0, %while.body.preheader ]268 %n.addr.06 = phi i32 [ %shr, %while.body ], [ %cond, %while.body.preheader ]269 %shr = lshr i32 %n.addr.06, 1270 %inc = add nuw nsw i32 %i.07, 1271 %tobool.not = icmp ult i32 %n.addr.06, 4272 br i1 %tobool.not, label %while.end.loopexit, label %while.body273 274while.end.loopexit: ; preds = %while.body275 %inc.lcssa = phi i32 [ %inc, %while.body ]276 br label %while.end277 278while.end: ; preds = %while.end.loopexit, %entry279 %i.0.lcssa = phi i32 [ 0, %entry ], [ %inc.lcssa, %while.end.loopexit ]280 ret i32 %i.0.lcssa281}282 283; Recognize CTLZ builtin pattern.284; Here it will replace the loop -285; assume builtin is always profitable.286;287; int ctlz_add(int n, int i0)288; {289; n = n >= 0 ? n : -n;290; int i = i0;291; while(n >>= 1) {292; i++;293; }294; return i;295; }296;297;298; Function Attrs: norecurse nounwind readnone uwtable299define i32 @ctlz_add(i32 %n, i32 %i0) {300; CHECK-LABEL: define i32 @ctlz_add(301; CHECK-SAME: i32 [[N:%.*]], i32 [[I0:%.*]]) {302; CHECK-NEXT: entry:303; CHECK-NEXT: [[ABS_N:%.*]] = call i32 @llvm.abs.i32(i32 [[N]], i1 true)304; CHECK-NEXT: [[TMP0:%.*]] = ashr i32 [[ABS_N]], 1305; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctlz.i32(i32 [[TMP0]], i1 false)306; CHECK-NEXT: [[TMP2:%.*]] = sub i32 32, [[TMP1]]307; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 1308; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP2]], [[I0]]309; CHECK-NEXT: br label [[WHILE_COND:%.*]]310; CHECK: while.cond:311; CHECK-NEXT: [[TCPHI:%.*]] = phi i32 [ [[TMP3]], [[ENTRY:%.*]] ], [ [[TCDEC:%.*]], [[WHILE_COND]] ]312; CHECK-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[ABS_N]], [[ENTRY]] ], [ [[SHR:%.*]], [[WHILE_COND]] ]313; CHECK-NEXT: [[I_0:%.*]] = phi i32 [ [[I0]], [[ENTRY]] ], [ [[INC:%.*]], [[WHILE_COND]] ]314; CHECK-NEXT: [[SHR]] = ashr i32 [[N_ADDR_0]], 1315; CHECK-NEXT: [[TCDEC]] = sub nsw i32 [[TCPHI]], 1316; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TCDEC]], 0317; CHECK-NEXT: [[INC]] = add nsw i32 [[I_0]], 1318; CHECK-NEXT: br i1 [[TOBOOL]], label [[WHILE_END:%.*]], label [[WHILE_COND]]319; CHECK: while.end:320; CHECK-NEXT: [[I_0_LCSSA:%.*]] = phi i32 [ [[TMP4]], [[WHILE_COND]] ]321; CHECK-NEXT: ret i32 [[I_0_LCSSA]]322;323entry:324 %abs_n = call i32 @llvm.abs.i32(i32 %n, i1 true)325 br label %while.cond326 327while.cond: ; preds = %while.cond, %entry328 %n.addr.0 = phi i32 [ %abs_n, %entry ], [ %shr, %while.cond ]329 %i.0 = phi i32 [ %i0, %entry ], [ %inc, %while.cond ]330 %shr = ashr i32 %n.addr.0, 1331 %tobool = icmp eq i32 %shr, 0332 %inc = add nsw i32 %i.0, 1333 br i1 %tobool, label %while.end, label %while.cond334 335while.end: ; preds = %while.cond336 ret i32 %i.0337}338 339 340; Recognize CTLZ builtin pattern.341; Here it will replace the loop -342; assume builtin is always profitable.343;344; int ctlz_sub(int n, int i0)345; {346; n = n >= 0 ? n : -n;347; int i = i0;348; while(n >>= 1) {349; i--;350; }351; return i;352; }353;354;355; Function Attrs: norecurse nounwind readnone uwtable356define i32 @ctlz_sub(i32 %n, i32 %i0) {357; CHECK-LABEL: define i32 @ctlz_sub(358; CHECK-SAME: i32 [[N:%.*]], i32 [[I0:%.*]]) {359; CHECK-NEXT: entry:360; CHECK-NEXT: [[ABS_N:%.*]] = call i32 @llvm.abs.i32(i32 [[N]], i1 true)361; CHECK-NEXT: [[TMP0:%.*]] = ashr i32 [[ABS_N]], 1362; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctlz.i32(i32 [[TMP0]], i1 false)363; CHECK-NEXT: [[TMP2:%.*]] = sub i32 32, [[TMP1]]364; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 1365; CHECK-NEXT: [[TMP4:%.*]] = sub i32 [[I0]], [[TMP2]]366; CHECK-NEXT: br label [[WHILE_COND:%.*]]367; CHECK: while.cond:368; CHECK-NEXT: [[TCPHI:%.*]] = phi i32 [ [[TMP3]], [[ENTRY:%.*]] ], [ [[TCDEC:%.*]], [[WHILE_COND]] ]369; CHECK-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[ABS_N]], [[ENTRY]] ], [ [[SHR:%.*]], [[WHILE_COND]] ]370; CHECK-NEXT: [[I_0:%.*]] = phi i32 [ [[I0]], [[ENTRY]] ], [ [[INC:%.*]], [[WHILE_COND]] ]371; CHECK-NEXT: [[SHR]] = ashr i32 [[N_ADDR_0]], 1372; CHECK-NEXT: [[TCDEC]] = sub nsw i32 [[TCPHI]], 1373; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TCDEC]], 0374; CHECK-NEXT: [[INC]] = add nsw i32 [[I_0]], -1375; CHECK-NEXT: br i1 [[TOBOOL]], label [[WHILE_END:%.*]], label [[WHILE_COND]]376; CHECK: while.end:377; CHECK-NEXT: [[I_0_LCSSA:%.*]] = phi i32 [ [[TMP4]], [[WHILE_COND]] ]378; CHECK-NEXT: ret i32 [[I_0_LCSSA]]379;380entry:381 %abs_n = call i32 @llvm.abs.i32(i32 %n, i1 true)382 br label %while.cond383 384while.cond: ; preds = %while.cond, %entry385 %n.addr.0 = phi i32 [ %abs_n, %entry ], [ %shr, %while.cond ]386 %i.0 = phi i32 [ %i0, %entry ], [ %inc, %while.cond ]387 %shr = ashr i32 %n.addr.0, 1388 %tobool = icmp eq i32 %shr, 0389 %inc = add nsw i32 %i.0, -1390 br i1 %tobool, label %while.end, label %while.cond391 392while.end: ; preds = %while.cond393 ret i32 %i.0394}395 396 397; Recognize CTLZ builtin pattern.398; Here it will replace the loop -399; assume builtin is always profitable.400;401; int ctlz_sext(short in)402; {403; int n = in;404; if (in < 0)405; n = -n;406; int i = 0;407; while(n >>= 1) {408; i++;409; }410; return i;411; }412;413 414; Function Attrs: norecurse nounwind readnone uwtable415define i32 @ctlz_sext(i16 %in) {416; CHECK-LABEL: define i32 @ctlz_sext(417; CHECK-SAME: i16 [[IN:%.*]]) {418; CHECK-NEXT: entry:419; CHECK-NEXT: [[ABS:%.*]] = call i16 @llvm.abs.i16(i16 [[IN]], i1 false)420; CHECK-NEXT: [[ABS_N:%.*]] = zext i16 [[ABS]] to i32421; CHECK-NEXT: [[TMP0:%.*]] = ashr i32 [[ABS_N]], 1422; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctlz.i32(i32 [[TMP0]], i1 false)423; CHECK-NEXT: [[TMP2:%.*]] = sub i32 32, [[TMP1]]424; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 1425; CHECK-NEXT: br label [[WHILE_COND:%.*]]426; CHECK: while.cond:427; CHECK-NEXT: [[TCPHI:%.*]] = phi i32 [ [[TMP3]], [[ENTRY:%.*]] ], [ [[TCDEC:%.*]], [[WHILE_COND]] ]428; CHECK-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[ABS_N]], [[ENTRY]] ], [ [[SHR:%.*]], [[WHILE_COND]] ]429; CHECK-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[INC:%.*]], [[WHILE_COND]] ]430; CHECK-NEXT: [[SHR]] = ashr i32 [[N_ADDR_0]], 1431; CHECK-NEXT: [[TCDEC]] = sub nsw i32 [[TCPHI]], 1432; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TCDEC]], 0433; CHECK-NEXT: [[INC]] = add nsw i32 [[I_0]], 1434; CHECK-NEXT: br i1 [[TOBOOL]], label [[WHILE_END:%.*]], label [[WHILE_COND]]435; CHECK: while.end:436; CHECK-NEXT: [[I_0_LCSSA:%.*]] = phi i32 [ [[TMP2]], [[WHILE_COND]] ]437; CHECK-NEXT: ret i32 [[I_0_LCSSA]]438;439entry:440 %abs = call i16 @llvm.abs.i16(i16 %in, i1 false)441 %abs_n = zext i16 %abs to i32442 br label %while.cond443 444while.cond: ; preds = %while.cond, %entry445 %n.addr.0 = phi i32 [ %abs_n, %entry ], [ %shr, %while.cond ]446 %i.0 = phi i32 [ 0, %entry ], [ %inc, %while.cond ]447 %shr = ashr i32 %n.addr.0, 1448 %tobool = icmp eq i32 %shr, 0449 %inc = add nsw i32 %i.0, 1450 br i1 %tobool, label %while.end, label %while.cond451 452while.end: ; preds = %while.cond453 ret i32 %i.0454}455 456 457; unsigned floor_log2(unsigned long n) {458; unsigned result = 0;459; while (n >>= 1) result++;460; return result;461; }462 463define i32 @floor_log2_use_inc(i64 noundef %n) {464; CHECK-LABEL: define i32 @floor_log2_use_inc(465; CHECK-SAME: i64 noundef [[N:%.*]]) {466; CHECK-NEXT: entry:467; CHECK-NEXT: [[TOBOOL_NOT2:%.*]] = icmp ult i64 [[N]], 2468; CHECK-NEXT: br i1 [[TOBOOL_NOT2]], label [[WHILE_END:%.*]], label [[WHILE_BODY_PREHEADER:%.*]]469; CHECK: while.body.preheader:470; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.ctlz.i64(i64 [[N]], i1 true)471; CHECK-NEXT: [[TMP2:%.*]] = sub i64 64, [[TMP1]]472; CHECK-NEXT: [[TMP4:%.*]] = sub i64 [[TMP2]], 1473; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP4]] to i32474; CHECK-NEXT: br label [[WHILE_BODY:%.*]]475; CHECK: while.body:476; CHECK-NEXT: [[TCPHI:%.*]] = phi i64 [ [[TMP4]], [[WHILE_BODY_PREHEADER]] ], [ [[TCDEC:%.*]], [[WHILE_BODY]] ]477; CHECK-NEXT: [[RESULT_04:%.*]] = phi i32 [ [[INC:%.*]], [[WHILE_BODY]] ], [ 0, [[WHILE_BODY_PREHEADER]] ]478; CHECK-NEXT: [[N_ADDR_03:%.*]] = phi i64 [ [[SHR:%.*]], [[WHILE_BODY]] ], [ [[N]], [[WHILE_BODY_PREHEADER]] ]479; CHECK-NEXT: [[SHR]] = lshr i64 [[N_ADDR_03]], 1480; CHECK-NEXT: [[INC]] = add i32 [[RESULT_04]], 1481; CHECK-NEXT: [[TCDEC]] = sub nsw i64 [[TCPHI]], 1482; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i64 [[TCDEC]], 0483; CHECK-NEXT: br i1 [[TOBOOL_NOT]], label [[WHILE_END_LOOPEXIT:%.*]], label [[WHILE_BODY]]484; CHECK: while.end.loopexit:485; CHECK-NEXT: [[INC_LCSSA:%.*]] = phi i32 [ [[TMP3]], [[WHILE_BODY]] ]486; CHECK-NEXT: br label [[WHILE_END]]487; CHECK: while.end:488; CHECK-NEXT: [[RESULT_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC_LCSSA]], [[WHILE_END_LOOPEXIT]] ]489; CHECK-NEXT: ret i32 [[RESULT_0_LCSSA]]490;491entry:492 %tobool.not2 = icmp ult i64 %n, 2493 br i1 %tobool.not2, label %while.end, label %while.body.preheader494 495while.body.preheader:496 br label %while.body497 498while.body:499 %result.04 = phi i32 [ %inc, %while.body ], [ 0, %while.body.preheader ]500 %n.addr.03 = phi i64 [ %shr, %while.body ], [ %n, %while.body.preheader ]501 %shr = lshr i64 %n.addr.03, 1502 %inc = add i32 %result.04, 1503 %tobool.not = icmp ult i64 %n.addr.03, 4504 br i1 %tobool.not, label %while.end.loopexit, label %while.body505 506while.end.loopexit:507 %inc.lcssa = phi i32 [ %inc, %while.body ]508 br label %while.end509 510while.end:511 %result.0.lcssa = phi i32 [ 0, %entry ], [ %inc.lcssa, %while.end.loopexit ]512 ret i32 %result.0.lcssa513}514 515 516define i32 @floor_log2_use_phi(i64 noundef %n) {517; CHECK-LABEL: define i32 @floor_log2_use_phi(518; CHECK-SAME: i64 noundef [[N:%.*]]) {519; CHECK-NEXT: entry:520; CHECK-NEXT: [[TOBOOL_NOT2:%.*]] = icmp ult i64 [[N]], 2521; CHECK-NEXT: br i1 [[TOBOOL_NOT2]], label [[WHILE_END:%.*]], label [[WHILE_BODY_PREHEADER:%.*]]522; CHECK: while.body.preheader:523; CHECK-NEXT: br label [[WHILE_BODY:%.*]]524; CHECK: while.body:525; CHECK-NEXT: [[RESULT_04:%.*]] = phi i32 [ [[INC:%.*]], [[WHILE_BODY]] ], [ 0, [[WHILE_BODY_PREHEADER]] ]526; CHECK-NEXT: [[N_ADDR_03:%.*]] = phi i64 [ [[SHR:%.*]], [[WHILE_BODY]] ], [ [[N]], [[WHILE_BODY_PREHEADER]] ]527; CHECK-NEXT: [[SHR]] = lshr i64 [[N_ADDR_03]], 1528; CHECK-NEXT: [[INC]] = add i32 [[RESULT_04]], 1529; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp ult i64 [[N_ADDR_03]], 4530; CHECK-NEXT: br i1 [[TOBOOL_NOT]], label [[WHILE_END_LOOPEXIT:%.*]], label [[WHILE_BODY]]531; CHECK: while.end.loopexit:532; CHECK-NEXT: [[INC_LCSSA:%.*]] = phi i32 [ [[RESULT_04]], [[WHILE_BODY]] ]533; CHECK-NEXT: br label [[WHILE_END]]534; CHECK: while.end:535; CHECK-NEXT: [[RESULT_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC_LCSSA]], [[WHILE_END_LOOPEXIT]] ]536; CHECK-NEXT: ret i32 [[RESULT_0_LCSSA]]537;538entry:539 %tobool.not2 = icmp ult i64 %n, 2540 br i1 %tobool.not2, label %while.end, label %while.body.preheader541 542while.body.preheader:543 br label %while.body544 545while.body:546 %result.04 = phi i32 [ %inc, %while.body ], [ 0, %while.body.preheader ]547 %n.addr.03 = phi i64 [ %shr, %while.body ], [ %n, %while.body.preheader ]548 %shr = lshr i64 %n.addr.03, 1549 %inc = add i32 %result.04, 1550 %tobool.not = icmp ult i64 %n.addr.03, 4551 br i1 %tobool.not, label %while.end.loopexit, label %while.body552 553while.end.loopexit:554 %inc.lcssa = phi i32 [ %result.04, %while.body ]555 br label %while.end556 557while.end:558 %result.0.lcssa = phi i32 [ 0, %entry ], [ %inc.lcssa, %while.end.loopexit ]559 ret i32 %result.0.lcssa560}561 562 563; unsigned floor_log2_dec(unsigned long n) {564; unsigned result = 0;565; while (n >>= 1) result--;566; return result;567; }568 569define i32 @floor_log2_dec(i64 noundef %n) {570; CHECK-LABEL: define i32 @floor_log2_dec(571; CHECK-SAME: i64 noundef [[N:%.*]]) {572; CHECK-NEXT: entry:573; CHECK-NEXT: [[TOBOOL_NOT2:%.*]] = icmp ult i64 [[N]], 2574; CHECK-NEXT: br i1 [[TOBOOL_NOT2]], label [[WHILE_END:%.*]], label [[WHILE_BODY_PREHEADER:%.*]]575; CHECK: while.body.preheader:576; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.ctlz.i64(i64 [[N]], i1 true)577; CHECK-NEXT: [[TMP1:%.*]] = sub i64 64, [[TMP0]]578; CHECK-NEXT: [[TMP2:%.*]] = sub i64 [[TMP1]], 1579; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i32580; CHECK-NEXT: [[TMP4:%.*]] = sub i32 0, [[TMP3]]581; CHECK-NEXT: br label [[WHILE_BODY:%.*]]582; CHECK: while.body:583; CHECK-NEXT: [[TCPHI:%.*]] = phi i64 [ [[TMP2]], [[WHILE_BODY_PREHEADER]] ], [ [[TCDEC:%.*]], [[WHILE_BODY]] ]584; CHECK-NEXT: [[RESULT_04:%.*]] = phi i32 [ [[INC:%.*]], [[WHILE_BODY]] ], [ 0, [[WHILE_BODY_PREHEADER]] ]585; CHECK-NEXT: [[N_ADDR_03:%.*]] = phi i64 [ [[SHR:%.*]], [[WHILE_BODY]] ], [ [[N]], [[WHILE_BODY_PREHEADER]] ]586; CHECK-NEXT: [[SHR]] = lshr i64 [[N_ADDR_03]], 1587; CHECK-NEXT: [[INC]] = add i32 [[RESULT_04]], -1588; CHECK-NEXT: [[TCDEC]] = sub nsw i64 [[TCPHI]], 1589; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i64 [[TCDEC]], 0590; CHECK-NEXT: br i1 [[TOBOOL_NOT]], label [[WHILE_END_LOOPEXIT:%.*]], label [[WHILE_BODY]]591; CHECK: while.end.loopexit:592; CHECK-NEXT: [[INC_LCSSA:%.*]] = phi i32 [ [[TMP4]], [[WHILE_BODY]] ]593; CHECK-NEXT: br label [[WHILE_END]]594; CHECK: while.end:595; CHECK-NEXT: [[RESULT_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC_LCSSA]], [[WHILE_END_LOOPEXIT]] ]596; CHECK-NEXT: ret i32 [[RESULT_0_LCSSA]]597;598entry:599 %tobool.not2 = icmp ult i64 %n, 2600 br i1 %tobool.not2, label %while.end, label %while.body.preheader601 602while.body.preheader:603 br label %while.body604 605while.body:606 %result.04 = phi i32 [ %inc, %while.body ], [ 0, %while.body.preheader ]607 %n.addr.03 = phi i64 [ %shr, %while.body ], [ %n, %while.body.preheader ]608 %shr = lshr i64 %n.addr.03, 1609 %inc = add i32 %result.04, -1610 %tobool.not = icmp ult i64 %n.addr.03, 4611 br i1 %tobool.not, label %while.end.loopexit, label %while.body612 613while.end.loopexit:614 %inc.lcssa = phi i32 [ %inc, %while.body ]615 br label %while.end616 617while.end:618 %result.0.lcssa = phi i32 [ 0, %entry ], [ %inc.lcssa, %while.end.loopexit ]619 ret i32 %result.0.lcssa620}621 622 623; unsigned int_log2_rec(unsigned x) {624; return x == 0 ? 0 : int_log2_rec(x >> 1) + 1;625; }626 627define i32 @int_log2_rec(i32 noundef %x) {628; CHECK-LABEL: define i32 @int_log2_rec(629; CHECK-SAME: i32 noundef [[X:%.*]]) {630; CHECK-NEXT: entry:631; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[X]], 0632; CHECK-NEXT: br i1 [[CMP2]], label [[COND_END:%.*]], label [[COND_FALSE_PREHEADER:%.*]]633; CHECK: cond.false.preheader:634; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.ctlz.i32(i32 [[X]], i1 true)635; CHECK-NEXT: [[TMP1:%.*]] = sub i32 32, [[TMP0]]636; CHECK-NEXT: br label [[COND_FALSE:%.*]]637; CHECK: cond.false:638; CHECK-NEXT: [[TCPHI:%.*]] = phi i32 [ [[TMP1]], [[COND_FALSE_PREHEADER]] ], [ [[TCDEC:%.*]], [[COND_FALSE]] ]639; CHECK-NEXT: [[X_TR4:%.*]] = phi i32 [ [[SHR:%.*]], [[COND_FALSE]] ], [ [[X]], [[COND_FALSE_PREHEADER]] ]640; CHECK-NEXT: [[ACCUMULATOR_TR3:%.*]] = phi i32 [ [[ADD:%.*]], [[COND_FALSE]] ], [ 0, [[COND_FALSE_PREHEADER]] ]641; CHECK-NEXT: [[SHR]] = lshr i32 [[X_TR4]], 1642; CHECK-NEXT: [[ADD]] = add i32 [[ACCUMULATOR_TR3]], 1643; CHECK-NEXT: [[TCDEC]] = sub nsw i32 [[TCPHI]], 1644; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TCDEC]], 0645; CHECK-NEXT: br i1 [[CMP]], label [[COND_END_LOOPEXIT:%.*]], label [[COND_FALSE]]646; CHECK: cond.end.loopexit:647; CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[TMP1]], [[COND_FALSE]] ]648; CHECK-NEXT: br label [[COND_END]]649; CHECK: cond.end:650; CHECK-NEXT: [[ACCUMULATOR_TR_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[ADD_LCSSA]], [[COND_END_LOOPEXIT]] ]651; CHECK-NEXT: ret i32 [[ACCUMULATOR_TR_LCSSA]]652;653entry:654 %cmp2 = icmp eq i32 %x, 0655 br i1 %cmp2, label %cond.end, label %cond.false.preheader656 657cond.false.preheader: ; preds = %entry658 br label %cond.false659 660cond.false: ; preds = %cond.false.preheader, %cond.false661 %x.tr4 = phi i32 [ %shr, %cond.false ], [ %x, %cond.false.preheader ]662 %accumulator.tr3 = phi i32 [ %add, %cond.false ], [ 0, %cond.false.preheader ]663 %shr = lshr i32 %x.tr4, 1664 %add = add i32 %accumulator.tr3, 1665 %cmp = icmp ult i32 %x.tr4, 2666 br i1 %cmp, label %cond.end.loopexit, label %cond.false667 668cond.end.loopexit: ; preds = %cond.false669 %add.lcssa = phi i32 [ %add, %cond.false ]670 br label %cond.end671 672cond.end: ; preds = %cond.end.loopexit, %entry673 %accumulator.tr.lcssa = phi i32 [ 0, %entry ], [ %add.lcssa, %cond.end.loopexit ]674 ret i32 %accumulator.tr.lcssa675}676 677 678; We can't easily transform this loop. It returns 1 for an input of both679; 0 and 1.680; int ctlz_do_while_use_inc(unsigned n)681; {682; int i = 0;683; do {684; i++;685; n >>= 1;686; } while(n != 0);687; return i;688; }689 690define i32 @ctlz_do_while_use_inc(i32 noundef %n) {691; CHECK-LABEL: define i32 @ctlz_do_while_use_inc(692; CHECK-SAME: i32 noundef [[N:%.*]]) {693; CHECK-NEXT: entry:694; CHECK-NEXT: br label [[DO_BODY:%.*]]695; CHECK: do.body:696; CHECK-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY:%.*]] ], [ [[SHR:%.*]], [[DO_BODY]] ]697; CHECK-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[INC:%.*]], [[DO_BODY]] ]698; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_0]], 1699; CHECK-NEXT: [[SHR]] = lshr i32 [[N_ADDR_0]], 1700; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp ult i32 [[N_ADDR_0]], 2701; CHECK-NEXT: br i1 [[CMP_NOT]], label [[DO_END:%.*]], label [[DO_BODY]]702; CHECK: do.end:703; CHECK-NEXT: [[INC_LCSSA:%.*]] = phi i32 [ [[INC]], [[DO_BODY]] ]704; CHECK-NEXT: ret i32 [[INC_LCSSA]]705;706entry:707 br label %do.body708 709do.body: ; preds = %do.body, %entry710 %n.addr.0 = phi i32 [ %n, %entry ], [ %shr, %do.body ]711 %i.0 = phi i32 [ 0, %entry ], [ %inc, %do.body ]712 %inc = add nuw nsw i32 %i.0, 1713 %shr = lshr i32 %n.addr.0, 1714 %cmp.not = icmp ult i32 %n.addr.0, 2715 br i1 %cmp.not, label %do.end, label %do.body716 717do.end: ; preds = %do.body718 %inc.lcssa = phi i32 [ %inc, %do.body ]719 ret i32 %inc.lcssa720}721 722 723; Recognize CTLZ builtin pattern.724; Here it will replace the loop -725; assume builtin is always profitable.726;727; int ctlz_do_while_use_phi(unsigned n)728; {729; int phi;730; int inc = 0;731; do {732; phi = inc;733; inc++;734; n >>= 1;735; } while(n != 0);736; return phi;737; }738 739define i32 @ctlz_do_while_use_phi(i32 noundef %n) {740; CHECK-LABEL: define i32 @ctlz_do_while_use_phi(741; CHECK-SAME: i32 noundef [[N:%.*]]) {742; CHECK-NEXT: entry:743; CHECK-NEXT: [[TMP0:%.*]] = lshr i32 [[N]], 1744; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctlz.i32(i32 [[TMP0]], i1 false)745; CHECK-NEXT: [[TMP2:%.*]] = sub i32 32, [[TMP1]]746; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 1747; CHECK-NEXT: br label [[DO_BODY:%.*]]748; CHECK: do.body:749; CHECK-NEXT: [[TCPHI:%.*]] = phi i32 [ [[TMP3]], [[ENTRY:%.*]] ], [ [[TCDEC:%.*]], [[DO_BODY]] ]750; CHECK-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ [[SHR:%.*]], [[DO_BODY]] ]751; CHECK-NEXT: [[INC_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[INC1:%.*]], [[DO_BODY]] ]752; CHECK-NEXT: [[INC1]] = add nuw nsw i32 [[INC_0]], 1753; CHECK-NEXT: [[SHR]] = lshr i32 [[N_ADDR_0]], 1754; CHECK-NEXT: [[TCDEC]] = sub nsw i32 [[TCPHI]], 1755; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[TCDEC]], 0756; CHECK-NEXT: br i1 [[CMP_NOT]], label [[DO_END:%.*]], label [[DO_BODY]]757; CHECK: do.end:758; CHECK-NEXT: [[INC_0_LCSSA:%.*]] = phi i32 [ [[TMP2]], [[DO_BODY]] ]759; CHECK-NEXT: ret i32 [[INC_0_LCSSA]]760;761entry:762 br label %do.body763 764do.body: ; preds = %do.body, %entry765 %n.addr.0 = phi i32 [ %n, %entry ], [ %shr, %do.body ]766 %inc.0 = phi i32 [ 0, %entry ], [ %inc1, %do.body ]767 %inc1 = add nuw nsw i32 %inc.0, 1768 %shr = lshr i32 %n.addr.0, 1769 %cmp.not = icmp ult i32 %n.addr.0, 2770 br i1 %cmp.not, label %do.end, label %do.body771 772do.end: ; preds = %do.body773 ret i32 %inc.0774}775 776; Check that we correctly bail on analysis when the ult comparison is with a777; constant that exceeds the (unsigned) range of a 64-bit integer, as we currently778; only handle loopback condition ult 2 or 4.779 780define i128 @large_constant(i128 noundef %n) {781; CHECK-LABEL: define i128 @large_constant(782; CHECK-SAME: i128 noundef [[N:%.*]]) {783; CHECK-NEXT: entry:784; CHECK-NEXT: br label [[DO_BODY:%.*]]785; CHECK: do.body:786; CHECK-NEXT: [[N_ADDR_0:%.*]] = phi i128 [ [[N]], [[ENTRY:%.*]] ], [ [[SHR:%.*]], [[DO_BODY]] ]787; CHECK-NEXT: [[SHR]] = lshr i128 [[N_ADDR_0]], 1788; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp ult i128 [[N_ADDR_0]], 18446744073709551616789; CHECK-NEXT: br i1 [[CMP_NOT]], label [[DO_END:%.*]], label [[DO_BODY]]790; CHECK: do.end:791; CHECK-NEXT: [[SHR_LCSSA:%.*]] = phi i128 [ [[SHR]], [[DO_BODY]] ]792; CHECK-NEXT: ret i128 [[SHR_LCSSA]]793;794entry:795 br label %do.body796 797do.body: ; preds = %do.body, %entry798 %n.addr.0 = phi i128 [ %n, %entry ], [ %shr, %do.body ]799 %shr = lshr i128 %n.addr.0, 1800 %cmp.not = icmp ult i128 %n.addr.0, 18446744073709551616801 br i1 %cmp.not, label %do.end, label %do.body802 803do.end: ; preds = %do.body804 ret i128 %shr805}806 807 808declare i32 @llvm.abs.i32(i32, i1)809declare i16 @llvm.abs.i16(i16, i1)810