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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=loop-idiom -S %s | FileCheck %s3 4define void @reuse_cast_1(ptr %ptr, i1 %c) {5; CHECK-LABEL: @reuse_cast_1(6; CHECK-NEXT: entry:7; CHECK-NEXT: br label [[LOOP_0:%.*]]8; CHECK: loop.0:9; CHECK-NEXT: [[TMP:%.*]] = load ptr, ptr [[PTR:%.*]], align 810; CHECK-NEXT: br i1 [[C:%.*]], label [[LOOP_2_PREHEADER:%.*]], label [[LOOP_1_PREHEADER:%.*]]11; CHECK: loop.1.preheader:12; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP]], i8 0, i64 400, i1 false)13; CHECK-NEXT: br label [[LOOP_1:%.*]]14; CHECK: loop.2.preheader:15; CHECK-NEXT: br label [[LOOP_2:%.*]]16; CHECK: loop.1:17; CHECK-NEXT: [[IV_1:%.*]] = phi i64 [ [[IV_1_NEXT:%.*]], [[LOOP_1]] ], [ 0, [[LOOP_1_PREHEADER]] ]18; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds float, ptr [[TMP]], i64 [[IV_1]]19; CHECK-NEXT: [[IV_1_NEXT]] = add nuw nsw i64 [[IV_1]], 120; CHECK-NEXT: [[C_1:%.*]] = icmp ne i64 [[IV_1_NEXT]], 10021; CHECK-NEXT: br i1 [[C_1]], label [[LOOP_1]], label [[LOOP_0_LATCH_LOOPEXIT1:%.*]]22; CHECK: loop.2:23; CHECK-NEXT: [[IV_2:%.*]] = phi i64 [ [[IV_2_NEXT:%.*]], [[LOOP_2]] ], [ 0, [[LOOP_2_PREHEADER]] ]24; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds float, ptr [[TMP]], i64 [[IV_2]]25; CHECK-NEXT: store float 0.000000e+00, ptr [[TMP10]], align 426; CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[PTR]], align 827; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds float, ptr [[TMP11]], i64 [[IV_2]]28; CHECK-NEXT: [[TMP13:%.*]] = load float, ptr [[TMP12]], align 429; CHECK-NEXT: [[IV_2_NEXT]] = add nuw nsw i64 [[IV_2]], 130; CHECK-NEXT: [[C_2:%.*]] = icmp ne i64 [[IV_2_NEXT]], 10031; CHECK-NEXT: br i1 [[C_2]], label [[LOOP_2]], label [[LOOP_0_LATCH_LOOPEXIT:%.*]]32; CHECK: loop.0.latch.loopexit:33; CHECK-NEXT: br label [[LOOP_0_LATCH:%.*]]34; CHECK: loop.0.latch.loopexit1:35; CHECK-NEXT: br label [[LOOP_0_LATCH]]36; CHECK: loop.0.latch:37; CHECK-NEXT: [[C_0:%.*]] = call i1 @cond()38; CHECK-NEXT: br i1 [[C_0]], label [[LOOP_0]], label [[END:%.*]]39; CHECK: end:40; CHECK-NEXT: ret void41;42entry:43 br label %loop.044 45loop.0: ; preds = %loop.0.latch, %entry46 %tmp = load ptr, ptr %ptr, align 847 br i1 %c, label %loop.2, label %loop.148 49loop.1: ; preds = %loop.1, %loop.050 %iv.1 = phi i64 [ %iv.1.next, %loop.1 ], [ 0, %loop.0 ]51 %tmp4 = getelementptr inbounds float, ptr %tmp, i64 %iv.152 store float 0.000000e+00, ptr %tmp4, align 453 %iv.1.next = add nuw nsw i64 %iv.1, 154 %c.1 = icmp ne i64 %iv.1.next, 10055 br i1 %c.1, label %loop.1, label %loop.0.latch56 57loop.2: ; preds = %loop.2, %loop.058 %iv.2 = phi i64 [ %iv.2.next, %loop.2 ], [ 0, %loop.0 ]59 %tmp10 = getelementptr inbounds float, ptr %tmp, i64 %iv.260 store float 0.000000e+00, ptr %tmp10, align 461 %tmp11 = load ptr, ptr %ptr, align 862 %tmp12 = getelementptr inbounds float, ptr %tmp11, i64 %iv.263 %tmp13 = load float, ptr %tmp12, align 464 %iv.2.next = add nuw nsw i64 %iv.2, 165 %c.2 = icmp ne i64 %iv.2.next, 10066 br i1 %c.2, label %loop.2, label %loop.0.latch67 68loop.0.latch: ; preds = %loop.2, %loop.169 %c.0 = call i1 @cond()70 br i1 %c.0, label %loop.0, label %end71 72end: ; preds = %loop.0.latch73 ret void74}75 76declare i1 @cond()77 78declare void @use.i8(ptr)79 80declare void @use.i1(i1)81 82define void @reuse_cast_2(i32 %x, ptr %ptr.1.start) {83; CHECK-LABEL: @reuse_cast_2(84; CHECK-NEXT: entry:85; CHECK-NEXT: [[STACK:%.*]] = alloca [2 x i32], align 486; CHECK-NEXT: [[C_0:%.*]] = icmp sgt i32 [[X:%.*]], 087; CHECK-NEXT: call void @use.i8(ptr [[STACK]])88; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[STACK]], ptr align 4 [[PTR_1_START:%.*]], i64 8, i1 false)89; CHECK-NEXT: br label [[LOOP:%.*]]90; CHECK: loop:91; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]92; CHECK-NEXT: [[PTR_1:%.*]] = phi ptr [ [[PTR_1_START]], [[ENTRY]] ], [ [[PTR_1_NEXT:%.*]], [[LOOP]] ]93; CHECK-NEXT: [[PTR_2:%.*]] = phi ptr [ [[STACK]], [[ENTRY]] ], [ [[PTR_2_NEXT:%.*]], [[LOOP]] ]94; CHECK-NEXT: [[PTR_1_NEXT]] = getelementptr inbounds i32, ptr [[PTR_1]], i64 195; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[PTR_1]], align 496; CHECK-NEXT: [[PTR_2_NEXT]] = getelementptr inbounds i32, ptr [[PTR_2]], i64 197; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 198; CHECK-NEXT: [[C_1:%.*]] = icmp eq i32 [[IV]], 099; CHECK-NEXT: br i1 [[C_1]], label [[LOOP]], label [[EXIT:%.*]]100; CHECK: exit:101; CHECK-NEXT: call void @use.i1(i1 [[C_0]])102; CHECK-NEXT: ret void103;104entry:105 %stack = alloca [2 x i32], align 4106 %c.0 = icmp sgt i32 %x, 0107 call void @use.i8(ptr %stack)108 br label %loop109 110loop: ; preds = %loop, %entry111 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]112 %ptr.1 = phi ptr [ %ptr.1.start, %entry ], [ %ptr.1.next, %loop ]113 %ptr.2 = phi ptr [ %stack, %entry ], [ %ptr.2.next, %loop ]114 %ptr.1.next = getelementptr inbounds i32, ptr %ptr.1, i64 1115 %lv = load i32, ptr %ptr.1, align 4116 %ptr.2.next = getelementptr inbounds i32, ptr %ptr.2, i64 1117 store i32 %lv, ptr %ptr.2, align 4118 %iv.next = add nuw nsw i32 %iv, 1119 %c.1 = icmp eq i32 %iv, 0120 br i1 %c.1, label %loop, label %exit121 122exit: ; preds = %loop123 call void @use.i1(i1 %c.0)124 ret void125}126