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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -p loop-idiom -S %s | FileCheck %s3 4target datalayout = "e-m:e-i64:64-i128:128-f80:128-n8:16:32:64-S128-ni:1-p2:32:8:8:32-ni:2"5 6declare void @foo()7declare void @bar()8 9define void @scev_expand_ptrtoint(i8 %x, ptr %start) {10; CHECK-LABEL: define void @scev_expand_ptrtoint(11; CHECK-SAME: i8 [[X:%.*]], ptr [[START:%.*]]) {12; CHECK-NEXT: [[ENTRY:.*]]:13; CHECK-NEXT: [[START1:%.*]] = ptrtoint ptr [[START]] to i6414; CHECK-NEXT: br label %[[LOOP_1_HEADER:.*]]15; CHECK: [[LOOP_1_HEADER]]:16; CHECK-NEXT: [[PTR_IV_1:%.*]] = phi ptr [ [[START]], %[[ENTRY]] ], [ [[PTR_IV_1_NEXT:%.*]], %[[LOOP_1_LATCH:.*]] ]17; CHECK-NEXT: [[C:%.*]] = icmp ule i8 [[X]], 118; CHECK-NEXT: br i1 [[C]], label %[[LOOP_1_LATCH]], label %[[MIDDLE:.*]]19; CHECK: [[LOOP_1_LATCH]]:20; CHECK-NEXT: [[PTR_IV_1_NEXT]] = getelementptr i8, ptr [[PTR_IV_1]], i64 121; CHECK-NEXT: br label %[[LOOP_1_HEADER]]22; CHECK: [[MIDDLE]]:23; CHECK-NEXT: [[PTR_IV_1_LCSSA:%.*]] = phi ptr [ [[PTR_IV_1]], %[[LOOP_1_HEADER]] ]24; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X]], 025; CHECK-NEXT: [[CMP_EXT:%.*]] = zext i1 [[CMP]] to i6426; CHECK-NEXT: [[GEP_START:%.*]] = getelementptr i8, ptr [[PTR_IV_1_LCSSA]], i64 [[CMP_EXT]]27; CHECK-NEXT: br label %[[LOOP_2_HEADER:.*]]28; CHECK: [[LOOP_2_HEADER]]:29; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[INDVAR_NEXT:%.*]], %[[LOOP_2_LATCH:.*]] ], [ 0, %[[MIDDLE]] ]30; CHECK-NEXT: [[PTR_IV_2:%.*]] = phi ptr [ [[GEP_START]], %[[MIDDLE]] ], [ [[PTR_IV_2_NEXT:%.*]], %[[LOOP_2_LATCH]] ]31; CHECK-NEXT: switch i8 [[X]], label %[[LOOP_2_LATCH]] [32; CHECK-NEXT: i8 1, label %[[LOOP_3_PREHEADER:.*]]33; CHECK-NEXT: i8 4, label %[[LOOP_3_PREHEADER]]34; CHECK-NEXT: ]35; CHECK: [[LOOP_3_PREHEADER]]:36; CHECK-NEXT: [[INDVAR_LCSSA:%.*]] = phi i64 [ [[INDVAR]], %[[LOOP_2_HEADER]] ], [ [[INDVAR]], %[[LOOP_2_HEADER]] ]37; CHECK-NEXT: [[PTR_IV_2_LCSSA:%.*]] = phi ptr [ [[PTR_IV_2]], %[[LOOP_2_HEADER]] ], [ [[PTR_IV_2]], %[[LOOP_2_HEADER]] ]38; CHECK-NEXT: [[TMP0:%.*]] = sub i64 1, [[START1]]39; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[PTR_IV_1_LCSSA]] to i6440; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], [[TMP0]]41; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[CMP_EXT]], [[TMP2]]42; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[INDVAR_LCSSA]], [[TMP4]]43; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[START]], i64 [[TMP5]]44; CHECK-NEXT: [[STRLEN:%.*]] = call i64 @strlen(ptr [[SCEVGEP]])45; CHECK-NEXT: br label %[[LOOP_3:.*]]46; CHECK: [[LOOP_2_LATCH]]:47; CHECK-NEXT: [[PTR_IV_2_NEXT]] = getelementptr i8, ptr [[PTR_IV_2]], i64 148; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 149; CHECK-NEXT: br label %[[LOOP_2_HEADER]]50; CHECK: [[LOOP_3]]:51; CHECK-NEXT: [[IV_3:%.*]] = phi i64 [ [[IV_3_NEXT:%.*]], %[[LOOP_3]] ], [ 1, %[[LOOP_3_PREHEADER]] ]52; CHECK-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[PTR_IV_2_LCSSA]], i64 [[IV_3]]53; CHECK-NEXT: [[TMP6:%.*]] = load i8, ptr [[GEP]], align 154; CHECK-NEXT: [[EC:%.*]] = icmp eq i8 [[TMP6]], 055; CHECK-NEXT: [[IV_3_NEXT]] = add i64 [[IV_3]], 156; CHECK-NEXT: br i1 true, label %[[EXIT:.*]], label %[[LOOP_3]]57; CHECK: [[EXIT]]:58; CHECK-NEXT: ret void59;60entry:61 br label %loop.1.header62 63loop.1.header:64 %ptr.iv.1 = phi ptr [ %start, %entry ], [ %ptr.iv.1.next, %loop.1.latch ]65 %c = icmp ule i8 %x, 166 br i1 %c, label %loop.1.latch, label %middle67 68loop.1.latch:69 %ptr.iv.1.next = getelementptr i8, ptr %ptr.iv.1, i64 170 br label %loop.1.header71 72middle:73 %cmp = icmp eq i8 %x, 074 %cmp.ext = zext i1 %cmp to i6475 %gep.start = getelementptr i8, ptr %ptr.iv.1, i64 %cmp.ext76 br label %loop.2.header77 78loop.2.header:79 %ptr.iv.2 = phi ptr [ %gep.start, %middle ], [ %ptr.iv.2.next, %loop.2.latch ]80 switch i8 %x, label %loop.2.latch [81 i8 1, label %loop.382 i8 4, label %loop.383 ]84 85loop.2.latch:86 %ptr.iv.2.next = getelementptr i8, ptr %ptr.iv.2, i64 187 br label %loop.2.header88 89loop.3:90 %iv.3 = phi i64 [ 1, %loop.2.header ], [ 1, %loop.2.header ], [ %iv.3.next, %loop.3 ]91 %gep = getelementptr i8, ptr %ptr.iv.2, i64 %iv.392 %1 = load i8, ptr %gep, align 193 %ec = icmp eq i8 %1, 094 %iv.3.next = add i64 %iv.3, 195 br i1 %ec, label %exit, label %loop.396 97exit:98 ret void99}100 101declare i1 @cond()102 103define ptr @test_lcssa_reuse_preserve_lcssa() {104; CHECK-LABEL: define ptr @test_lcssa_reuse_preserve_lcssa() {105; CHECK-NEXT: [[ENTRY:.*:]]106; CHECK-NEXT: br label %[[LOOP_0_HEADER:.*]]107; CHECK: [[LOOP_0_HEADER]]:108; CHECK-NEXT: br label %[[LOOP_1:.*]]109; CHECK: [[LOOP_1]]:110; CHECK-NEXT: [[IV_1:%.*]] = phi ptr [ null, %[[LOOP_0_HEADER]] ], [ [[IV_1_NEXT:%.*]], %[[LOOP_1]] ]111; CHECK-NEXT: [[IV_1_NEXT]] = getelementptr i8, ptr [[IV_1]], i64 1112; CHECK-NEXT: [[EC_1:%.*]] = call i1 @cond()113; CHECK-NEXT: br i1 [[EC_1]], label %[[THEN:.*]], label %[[LOOP_1]]114; CHECK: [[THEN]]:115; CHECK-NEXT: [[IV_1_LCSSA1:%.*]] = phi ptr [ [[IV_1]], %[[LOOP_1]] ]116; CHECK-NEXT: [[C_2:%.*]] = call i1 @cond()117; CHECK-NEXT: br i1 [[C_2]], label %[[LOOP_2_PREHEADER:.*]], label %[[LOOP_0_LATCH:.*]]118; CHECK: [[LOOP_2_PREHEADER]]:119; CHECK-NEXT: [[IV_1_LCSSA:%.*]] = phi ptr [ [[IV_1_LCSSA1]], %[[THEN]] ]120; CHECK-NEXT: [[IV_1_LCSSA_LCSSA:%.*]] = phi ptr [ [[IV_1_LCSSA1]], %[[THEN]] ]121; CHECK-NEXT: [[STRLEN:%.*]] = call i64 @strlen(ptr null)122; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[IV_1_LCSSA]], i64 1123; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[TMP0]], i64 [[STRLEN]]124; CHECK-NEXT: br label %[[LOOP_2:.*]]125; CHECK: [[LOOP_2]]:126; CHECK-NEXT: [[IV_2:%.*]] = phi ptr [ [[RES:%.*]], %[[LOOP_2]] ], [ [[IV_1_LCSSA_LCSSA]], %[[LOOP_2_PREHEADER]] ]127; CHECK-NEXT: [[RES]] = getelementptr i8, ptr [[IV_2]], i64 1128; CHECK-NEXT: [[L:%.*]] = load i8, ptr [[IV_1_LCSSA_LCSSA]], align 1129; CHECK-NEXT: [[EC_2:%.*]] = icmp eq i8 [[L]], 0130; CHECK-NEXT: br i1 true, label %[[EXIT:.*]], label %[[LOOP_2]]131; CHECK: [[LOOP_0_LATCH]]:132; CHECK-NEXT: br label %[[LOOP_0_HEADER]]133; CHECK: [[EXIT]]:134; CHECK-NEXT: ret ptr [[SCEVGEP]]135;136entry:137 br label %loop.0.header138 139loop.0.header:140 br label %loop.1141 142loop.1:143 %iv.1 = phi ptr [ null, %loop.0.header ], [ %iv.1.next, %loop.1 ]144 %iv.1.next = getelementptr i8, ptr %iv.1, i64 1145 %ec.1 = call i1 @cond()146 br i1 %ec.1, label %then, label %loop.1147 148then:149 %c.2 = call i1 @cond()150 br i1 %c.2, label %loop.2, label %loop.0.latch151 152loop.2:153 %iv.2 = phi ptr [ %res, %loop.2 ], [ %iv.1, %then ]154 %res = getelementptr i8, ptr %iv.2, i64 1155 %l = load i8, ptr %iv.1, align 1156 %ec.2 = icmp eq i8 %l, 0157 br i1 %ec.2, label %exit, label %loop.2158 159loop.0.latch:160 br label %loop.0.header161 162exit:163 ret ptr %res164}165 166; Test case for https://github.com/llvm/llvm-project/issues/155287.167; Make sure we don't crash when trying to construct a PtrToInt SCEV expression168; results in SCEVCouldNotCompute.169define void @phi_ptr_addressspace_ptrtoint_fail(ptr addrspace(1) %arg) {170; CHECK-LABEL: define void @phi_ptr_addressspace_ptrtoint_fail(171; CHECK-SAME: ptr addrspace(1) [[ARG:%.*]]) {172; CHECK-NEXT: [[BB:.*]]:173; CHECK-NEXT: br label %[[LOOP_1:.*]]174; CHECK: [[LOOP_1]]:175; CHECK-NEXT: [[IV_1:%.*]] = phi i64 [ 0, %[[BB]] ], [ [[ADD5:%.*]], %[[LOOP_1]] ]176; CHECK-NEXT: [[ADD5]] = add i64 [[IV_1]], 1177; CHECK-NEXT: [[GETELEMENTPTR:%.*]] = getelementptr i16, ptr addrspace(1) [[ARG]], i64 [[ADD5]]178; CHECK-NEXT: br i1 false, label %[[LOOP_1]], label %[[LOOP_2_PH:.*]]179; CHECK: [[LOOP_2_PH]]:180; CHECK-NEXT: [[IV_1_LCSSA1:%.*]] = phi i64 [ [[IV_1]], %[[LOOP_1]] ]181; CHECK-NEXT: [[IV_1_LCSSA:%.*]] = phi i64 [ [[IV_1]], %[[LOOP_1]] ]182; CHECK-NEXT: [[PHI:%.*]] = phi ptr addrspace(1) [ [[GETELEMENTPTR]], %[[LOOP_1]] ]183; CHECK-NEXT: [[TMP0:%.*]] = shl nuw nsw i64 [[IV_1_LCSSA1]], 2184; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr addrspace(1) [[ARG]], i64 [[TMP0]]185; CHECK-NEXT: call void @llvm.memset.p1.i64(ptr addrspace(1) align 4 [[SCEVGEP]], i8 0, i64 8, i1 false)186; CHECK-NEXT: br label %[[LOOP_2_HEADER:.*]]187; CHECK: [[LOOP_2_HEADER]]:188; CHECK-NEXT: [[IV_2:%.*]] = phi i64 [ [[IV_1_LCSSA]], %[[LOOP_2_PH]] ], [ [[IV_2_NEXT:%.*]], %[[LOOP_2_LATCH:.*]] ]189; CHECK-NEXT: [[GREP_ARG:%.*]] = getelementptr i32, ptr addrspace(1) [[ARG]], i64 [[IV_2]]190; CHECK-NEXT: [[EC:%.*]] = icmp ult i64 [[IV_2]], 1191; CHECK-NEXT: br i1 [[EC]], label %[[LOOP_2_LATCH]], label %[[EXIT:.*]]192; CHECK: [[LOOP_2_LATCH]]:193; CHECK-NEXT: [[IV_2_NEXT]] = add i64 [[IV_2]], 1194; CHECK-NEXT: br label %[[LOOP_2_HEADER]]195; CHECK: [[EXIT]]:196; CHECK-NEXT: ret void197;198bb:199 br label %loop.1200 201loop.1:202 %iv.1 = phi i64 [ 0, %bb ], [ %add5, %loop.1]203 %add5 = add i64 %iv.1, 1204 %getelementptr = getelementptr i16, ptr addrspace(1) %arg, i64 %add5205 br i1 false, label %loop.1, label %loop.2.ph206 207loop.2.ph:208 %phi = phi ptr addrspace(1) [ %getelementptr, %loop.1]209 br label %loop.2.header210 211loop.2.header:212 %iv.2 = phi i64 [ %iv.1, %loop.2.ph ], [ %iv.2.next, %loop.2.latch ]213 %grep.arg = getelementptr i32, ptr addrspace(1) %arg, i64 %iv.2214 store i32 0, ptr addrspace(1) %grep.arg, align 4215 %ec = icmp ult i64 %iv.2, 1216 br i1 %ec, label %loop.2.latch, label %exit217 218loop.2.latch:219 %iv.2.next = add i64 %iv.2, 1220 br label %loop.2.header221 222exit:223 ret void224}225