131 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals2; RUN: opt -passes=loop-idiom < %s -S | FileCheck %s3target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"4 5 6target triple = "x86_64-apple-darwin10.0.0"7 8;void test(int *f, unsigned n) {9; for (unsigned i = 0; i < 2 * n; i += 2) {10; f[i] = 0;11; f[i+1] = 0;12; }13;}14define void @test(ptr %f, i32 %n) nounwind ssp {15; CHECK-LABEL: @test(16; CHECK-NEXT: entry:17; CHECK-NEXT: [[MUL:%.*]] = shl i32 [[N:%.*]], 118; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[MUL]], 019; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]20; CHECK: for.body.preheader:21; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[MUL]] to i6422; CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[TMP0]], -123; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 124; CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP2]], 325; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[TMP3]], 826; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[F:%.*]], i8 0, i64 [[TMP4]], i1 false)27; CHECK-NEXT: br label [[FOR_BODY:%.*]]28; CHECK: for.body:29; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]30; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[F]], i64 [[INDVARS_IV]]31; CHECK-NEXT: [[TMP5:%.*]] = or disjoint i64 [[INDVARS_IV]], 132; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[F]], i64 [[TMP5]]33; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 234; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[INDVARS_IV_NEXT]], [[TMP0]]35; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]36; CHECK: for.end.loopexit:37; CHECK-NEXT: br label [[FOR_END]]38; CHECK: for.end:39; CHECK-NEXT: ret void40;41entry:42 %mul = shl i32 %n, 143 %cmp1 = icmp eq i32 %mul, 044 br i1 %cmp1, label %for.end, label %for.body.preheader45 46for.body.preheader: ; preds = %entry47 %0 = zext i32 %mul to i6448 br label %for.body49 50for.body: ; preds = %for.body.preheader, %for.body51 %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ]52 %arrayidx = getelementptr inbounds i32, ptr %f, i64 %indvars.iv53 store i32 0, ptr %arrayidx, align 454 %1 = or disjoint i64 %indvars.iv, 155 %arrayidx2 = getelementptr inbounds i32, ptr %f, i64 %156 store i32 0, ptr %arrayidx2, align 457 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 258 %cmp = icmp ult i64 %indvars.iv.next, %059 br i1 %cmp, label %for.body, label %for.end.loopexit60 61for.end.loopexit: ; preds = %for.body62 br label %for.end63 64for.end: ; preds = %for.end.loopexit, %entry65 ret void66}67 68;void test_pattern(int *f, unsigned n) {69; for (unsigned i = 0; i < 2 * n; i += 2) {70; f[i] = 2;71; f[i+1] = 2;72; }73;}74define void @test_pattern(ptr %f, i32 %n) nounwind ssp {75; CHECK-LABEL: @test_pattern(76; CHECK-NEXT: entry:77; CHECK-NEXT: [[MUL:%.*]] = shl i32 [[N:%.*]], 178; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[MUL]], 079; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_END:%.*]], label [[FOR_BODY_PREHEADER:%.*]]80; CHECK: for.body.preheader:81; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[MUL]] to i6482; CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[TMP0]], -183; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 184; CHECK-NEXT: [[TMP3:%.*]] = add nuw i64 [[TMP2]], 185; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[TMP3]], 286; CHECK-NEXT: call void @llvm.experimental.memset.pattern.p0.i32.i64(ptr align 4 [[F:%.*]], i32 2, i64 [[TMP4]], i1 false)87; CHECK-NEXT: br label [[FOR_BODY:%.*]]88; CHECK: for.body:89; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]90; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[F]], i64 [[INDVARS_IV]]91; CHECK-NEXT: [[TMP5:%.*]] = or disjoint i64 [[INDVARS_IV]], 192; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[F]], i64 [[TMP5]]93; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 294; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[INDVARS_IV_NEXT]], [[TMP0]]95; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]96; CHECK: for.end.loopexit:97; CHECK-NEXT: br label [[FOR_END]]98; CHECK: for.end:99; CHECK-NEXT: ret void100;101entry:102 %mul = shl i32 %n, 1103 %cmp1 = icmp eq i32 %mul, 0104 br i1 %cmp1, label %for.end, label %for.body.preheader105 106for.body.preheader: ; preds = %entry107 %0 = zext i32 %mul to i64108 br label %for.body109 110for.body: ; preds = %for.body.preheader, %for.body111 %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ]112 %arrayidx = getelementptr inbounds i32, ptr %f, i64 %indvars.iv113 store i32 2, ptr %arrayidx, align 4114 %1 = or disjoint i64 %indvars.iv, 1115 %arrayidx2 = getelementptr inbounds i32, ptr %f, i64 %1116 store i32 2, ptr %arrayidx2, align 4117 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 2118 %cmp = icmp ult i64 %indvars.iv.next, %0119 br i1 %cmp, label %for.body, label %for.end.loopexit120 121for.end.loopexit: ; preds = %for.body122 br label %for.end123 124for.end: ; preds = %for.end.loopexit, %entry125 ret void126}127;.128; CHECK: attributes #[[ATTR0:[0-9]+]] = { nounwind ssp }129; CHECK: attributes #[[ATTR1:[0-9]+]] = { nocallback nofree nounwind willreturn memory(argmem: write) }130;.131