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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt < %s -passes=loop-interchange -verify-dom-info -verify-loop-info -S 2>&1 | FileCheck %s3 4target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"5 6@D = common global [100 x [100 x [100 x i32]]] zeroinitializer7 8; Test for interchange in loop nest greater than 2.9; for(int i=0;i<100;i++)10; for(int j=0;j<100;j++)11; for(int k=0;k<100;k++)12; D[k][j][i] = D[k][j][i]+t;13;14; Loops InnerLoopId = 2 and OuterLoopId = 1 should be interchanged, and then15; also InnerLoopId = 1 and OuterLoopId = 0.16;17define void @interchange_08(i32 %t){18; CHECK-LABEL: define void @interchange_08(19; CHECK-SAME: i32 [[T:%.*]]) {20; CHECK-NEXT: [[ENTRY:.*:]]21; CHECK-NEXT: br label %[[FOR_BODY6_PREHEADER:.*]]22; CHECK: [[FOR_COND1_PREHEADER_PREHEADER:.*]]:23; CHECK-NEXT: br label %[[FOR_COND1_PREHEADER:.*]]24; CHECK: [[FOR_COND1_PREHEADER]]:25; CHECK-NEXT: [[I_028:%.*]] = phi i64 [ [[INC16:%.*]], %[[FOR_INC15:.*]] ], [ 0, %[[FOR_COND1_PREHEADER_PREHEADER]] ]26; CHECK-NEXT: br label %[[FOR_BODY6_SPLIT1:.*]]27; CHECK: [[FOR_COND4_PREHEADER_PREHEADER:.*]]:28; CHECK-NEXT: br label %[[FOR_COND4_PREHEADER:.*]]29; CHECK: [[FOR_COND4_PREHEADER]]:30; CHECK-NEXT: [[J_027:%.*]] = phi i64 [ [[TMP3:%.*]], %[[FOR_INC12_SPLIT:.*]] ], [ 0, %[[FOR_COND4_PREHEADER_PREHEADER]] ]31; CHECK-NEXT: br label %[[FOR_COND1_PREHEADER_PREHEADER]]32; CHECK: [[FOR_BODY6_PREHEADER]]:33; CHECK-NEXT: br label %[[FOR_BODY6:.*]]34; CHECK: [[FOR_BODY6]]:35; CHECK-NEXT: [[K_026:%.*]] = phi i64 [ [[TMP1:%.*]], %[[FOR_BODY6_SPLIT:.*]] ], [ 0, %[[FOR_BODY6_PREHEADER]] ]36; CHECK-NEXT: br label %[[FOR_COND4_PREHEADER_PREHEADER]]37; CHECK: [[FOR_BODY6_SPLIT1]]:38; CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [100 x [100 x [100 x i32]]], ptr @D, i64 0, i64 [[K_026]], i64 [[J_027]], i64 [[I_028]]39; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX8]], align 440; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[T]]41; CHECK-NEXT: store i32 [[ADD]], ptr [[ARRAYIDX8]], align 442; CHECK-NEXT: [[INC:%.*]] = add nuw nsw i64 [[K_026]], 143; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INC]], 10044; CHECK-NEXT: br label %[[FOR_INC12:.*]]45; CHECK: [[FOR_BODY6_SPLIT]]:46; CHECK-NEXT: [[TMP1]] = add nuw nsw i64 [[K_026]], 147; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 10048; CHECK-NEXT: br i1 [[TMP2]], label %[[FOR_END17:.*]], label %[[FOR_BODY6]]49; CHECK: [[FOR_INC12]]:50; CHECK-NEXT: [[INC13:%.*]] = add nuw nsw i64 [[J_027]], 151; CHECK-NEXT: [[EXITCOND29:%.*]] = icmp eq i64 [[INC13]], 10052; CHECK-NEXT: br label %[[FOR_INC15]]53; CHECK: [[FOR_INC12_SPLIT]]:54; CHECK-NEXT: [[TMP3]] = add nuw nsw i64 [[J_027]], 155; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[TMP3]], 10056; CHECK-NEXT: br i1 [[TMP4]], label %[[FOR_BODY6_SPLIT]], label %[[FOR_COND4_PREHEADER]]57; CHECK: [[FOR_INC15]]:58; CHECK-NEXT: [[INC16]] = add nuw nsw i64 [[I_028]], 159; CHECK-NEXT: [[EXITCOND30:%.*]] = icmp eq i64 [[INC16]], 10060; CHECK-NEXT: br i1 [[EXITCOND30]], label %[[FOR_INC12_SPLIT]], label %[[FOR_COND1_PREHEADER]]61; CHECK: [[FOR_END17]]:62; CHECK-NEXT: ret void63;64entry:65 br label %for.cond1.preheader66 67for.cond1.preheader: ; preds = %for.inc15, %entry68 %i.028 = phi i64 [ 0, %entry ], [ %inc16, %for.inc15 ]69 br label %for.cond4.preheader70 71for.cond4.preheader: ; preds = %for.inc12, %for.cond1.preheader72 %j.027 = phi i64 [ 0, %for.cond1.preheader ], [ %inc13, %for.inc12 ]73 br label %for.body674 75for.body6: ; preds = %for.body6, %for.cond4.preheader76 %k.026 = phi i64 [ 0, %for.cond4.preheader ], [ %inc, %for.body6 ]77 %arrayidx8 = getelementptr inbounds [100 x [100 x [100 x i32]]], ptr @D, i64 0, i64 %k.026, i64 %j.027, i64 %i.02878 %0 = load i32, ptr %arrayidx879 %add = add nsw i32 %0, %t80 store i32 %add, ptr %arrayidx881 %inc = add nuw nsw i64 %k.026, 182 %exitcond = icmp eq i64 %inc, 10083 br i1 %exitcond, label %for.inc12, label %for.body684 85for.inc12: ; preds = %for.body686 %inc13 = add nuw nsw i64 %j.027, 187 %exitcond29 = icmp eq i64 %inc13, 10088 br i1 %exitcond29, label %for.inc15, label %for.cond4.preheader89 90for.inc15: ; preds = %for.inc1291 %inc16 = add nuw nsw i64 %i.028, 192 %exitcond30 = icmp eq i64 %inc16, 10093 br i1 %exitcond30, label %for.end17, label %for.cond1.preheader94 95for.end17: ; preds = %for.inc1596 ret void97}98