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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=loop-interchange -cache-line-size=64 -pass-remarks-missed='loop-interchange' -verify-loop-lcssa -S | FileCheck %s3; RUN: opt < %s -passes=loop-interchange -cache-line-size=64 -da-disable-delinearization-checks -pass-remarks-missed='loop-interchange' -verify-loop-lcssa -S | FileCheck -check-prefix=CHECK-DELIN %s4 5target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"6 7; void foo(int n, int m) {8; int temp[16][16];9; int res[16][16];10; for(int i = 0; i < n; i++) {11; for(int j = 0; j < m; j++)12; res[j][i] = temp[j][i];13; }14; }15 16;; This loop can be interchanged with -da-disable-delinearization-checks, otherwise it cannot17;; be interchanged due to dependence.18define void @lcssa_08(i32 %n, i32 %m) {;19; CHECK-DELIN-LABEL: @lcssa_08(20; CHECK-DELIN-NEXT: entry:21; CHECK-DELIN-NEXT: [[TEMP:%.*]] = alloca [16 x [16 x i32]], align 422; CHECK-DELIN-NEXT: [[RES:%.*]] = alloca [16 x [16 x i32]], align 423; CHECK-DELIN-NEXT: [[CMP24:%.*]] = icmp sgt i32 [[N:%.*]], 024; CHECK-DELIN-NEXT: br i1 [[CMP24]], label [[INNER_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]25; CHECK-DELIN: outer.preheader:26; CHECK-DELIN-NEXT: br label [[OUTER_HEADER:%.*]]27; CHECK-DELIN: outer.header:28; CHECK-DELIN-NEXT: [[INDVARS_IV27:%.*]] = phi i64 [ 0, [[OUTER_PREHEADER:%.*]] ], [ [[INDVARS_IV_NEXT28:%.*]], [[OUTER_LATCH:%.*]] ]29; CHECK-DELIN-NEXT: [[CMP222:%.*]] = icmp sgt i32 [[M:%.*]], 030; CHECK-DELIN-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[M]] to i6431; CHECK-DELIN-NEXT: br i1 [[CMP222]], label [[INNER_FOR_BODY_SPLIT1:%.*]], label [[INNER_FOR_BODY_SPLIT:%.*]]32; CHECK-DELIN: inner.preheader:33; CHECK-DELIN-NEXT: [[WIDE_TRIP_COUNT29:%.*]] = zext i32 [[N]] to i6434; CHECK-DELIN-NEXT: br label [[INNER_FOR_BODY:%.*]]35; CHECK-DELIN: inner.for.body:36; CHECK-DELIN-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[INNER_PREHEADER]] ], [ [[TMP1:%.*]], [[INNER_FOR_BODY_SPLIT]] ]37; CHECK-DELIN-NEXT: br label [[OUTER_PREHEADER]]38; CHECK-DELIN: inner.for.body.split1:39; CHECK-DELIN-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [16 x [16 x i32]], ptr [[TEMP]], i64 0, i64 [[INDVARS_IV]], i64 [[INDVARS_IV27]]40; CHECK-DELIN-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX6]], align 441; CHECK-DELIN-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [16 x [16 x i32]], ptr [[RES]], i64 0, i64 [[INDVARS_IV]], i64 [[INDVARS_IV27]]42; CHECK-DELIN-NEXT: store i32 [[TMP0]], ptr [[ARRAYIDX8]], align 443; CHECK-DELIN-NEXT: [[INDVARS_IV_NEXT:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 144; CHECK-DELIN-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]45; CHECK-DELIN-NEXT: br label [[INNER_CRIT_EDGE:%.*]]46; CHECK-DELIN: inner.for.body.split:47; CHECK-DELIN-NEXT: [[WIDE_TRIP_COUNT_LCSSA:%.*]] = phi i64 [ [[WIDE_TRIP_COUNT]], [[OUTER_LATCH]] ], [ [[WIDE_TRIP_COUNT]], [[OUTER_HEADER]] ]48; CHECK-DELIN-NEXT: [[TMP1]] = add nuw nsw i64 [[INDVARS_IV]], 149; CHECK-DELIN-NEXT: [[TMP2:%.*]] = icmp ne i64 [[TMP1]], [[WIDE_TRIP_COUNT_LCSSA]]50; CHECK-DELIN-NEXT: br i1 [[TMP2]], label [[INNER_FOR_BODY]], label [[OUTER_CRIT_EDGE:%.*]]51; CHECK-DELIN: inner.crit_edge:52; CHECK-DELIN-NEXT: br label [[OUTER_LATCH]]53; CHECK-DELIN: outer.latch:54; CHECK-DELIN-NEXT: [[INDVARS_IV_NEXT28]] = add nuw nsw i64 [[INDVARS_IV27]], 155; CHECK-DELIN-NEXT: [[EXITCOND30:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT28]], [[WIDE_TRIP_COUNT29]]56; CHECK-DELIN-NEXT: br i1 [[EXITCOND30]], label [[OUTER_HEADER]], label [[INNER_FOR_BODY_SPLIT]]57; CHECK-DELIN: outer.crit_edge:58; CHECK-DELIN-NEXT: br label [[FOR_COND_CLEANUP]]59; CHECK-DELIN: for.cond.cleanup:60; CHECK-DELIN-NEXT: ret void61;62entry:63 %temp = alloca [16 x [16 x i32]], align 464 %res = alloca [16 x [16 x i32]], align 465 %cmp24 = icmp sgt i32 %n, 066 br i1 %cmp24, label %outer.preheader, label %for.cond.cleanup67 68outer.preheader: ; preds = %entry69 %wide.trip.count29 = zext i32 %n to i6470 br label %outer.header71 72outer.header: ; preds = %outer.preheader, %outer.latch73 %indvars.iv27 = phi i64 [ 0, %outer.preheader ], [ %indvars.iv.next28, %outer.latch ]74 %cmp222 = icmp sgt i32 %m, 075 br i1 %cmp222, label %inner.preheader, label %outer.latch76 77inner.preheader: ; preds = %outer.header78 ; When inner.preheader becomes the outer preheader, do not move79 ; %wide.trip.count into the inner loop header lest LCSSA break80 ; (if %wide.trip.count gets moved, its use is now outside the inner loop).81 %wide.trip.count = zext i32 %m to i6482 br label %inner.for.body83 84inner.for.body: ; preds = %inner.preheader, %inner.for.body85 %indvars.iv = phi i64 [ 0, %inner.preheader ], [ %indvars.iv.next, %inner.for.body ]86 %arrayidx6 = getelementptr inbounds [16 x [16 x i32]], ptr %temp, i64 0, i64 %indvars.iv, i64 %indvars.iv2787 %0 = load i32, ptr %arrayidx6, align 488 %arrayidx8 = getelementptr inbounds [16 x [16 x i32]], ptr %res, i64 0, i64 %indvars.iv, i64 %indvars.iv2789 store i32 %0, ptr %arrayidx8, align 490 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 191 %exitcond = icmp ne i64 %indvars.iv.next, %wide.trip.count92 br i1 %exitcond, label %inner.for.body, label %inner.crit_edge93 94inner.crit_edge: ; preds = %inner.for.body95 br label %outer.latch96 97outer.latch: ; preds = %inner.crit_edge, %outer.header98 %indvars.iv.next28 = add nuw nsw i64 %indvars.iv27, 199 %exitcond30 = icmp ne i64 %indvars.iv.next28, %wide.trip.count29100 br i1 %exitcond30, label %outer.header, label %outer.crit_edge101 102outer.crit_edge: ; preds = %outer.latch103 br label %for.cond.cleanup104 105for.cond.cleanup: ; preds = %outer.crit_edge, %entry106 ret void107}108 109@global = external local_unnamed_addr global [4 x [4 x [2 x i16]]] align 16110 111; %N.ext is defined in the outer loop header and used in the inner loop. After112; interchanging, it will be defined in the new inner loop and used in the new;113; outer latch, so we need to create a new LCSSA phi node for it.114 115define void @test2(i32 %N) {116; CHECK-LABEL: @test2(117; CHECK-NEXT: bb:118; CHECK-NEXT: br label [[INNER_PREHEADER:%.*]]119; CHECK: outer.header.preheader:120; CHECK-NEXT: br label [[OUTER_HEADER:%.*]]121; CHECK: outer.header:122; CHECK-NEXT: [[OUTER_IV:%.*]] = phi i64 [ [[OUTER_IV_NEXT:%.*]], [[OUTER_LATCH:%.*]] ], [ 0, [[OUTER_HEADER_PREHEADER:%.*]] ]123; CHECK-NEXT: [[N_EXT:%.*]] = sext i32 [[N:%.*]] to i64124; CHECK-NEXT: br label [[INNER_SPLIT1:%.*]]125; CHECK: inner.preheader:126; CHECK-NEXT: br label [[INNER:%.*]]127; CHECK: inner:128; CHECK-NEXT: [[INNER_IV:%.*]] = phi i64 [ [[TMP0:%.*]], [[INNER_SPLIT:%.*]] ], [ 0, [[INNER_PREHEADER]] ]129; CHECK-NEXT: br label [[OUTER_HEADER_PREHEADER]]130; CHECK: inner.split1:131; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x [4 x [2 x i16]]], ptr @global, i64 0, i64 [[INNER_IV]], i64 [[OUTER_IV]], i64 0132; CHECK-NEXT: [[INNER_IV_NEXT:%.*]] = add nsw i64 [[INNER_IV]], 1133; CHECK-NEXT: [[C_1:%.*]] = icmp ne i64 [[INNER_IV_NEXT]], [[N_EXT]]134; CHECK-NEXT: br label [[OUTER_LATCH]]135; CHECK: inner.split:136; CHECK-NEXT: [[N_EXT_LCSSA:%.*]] = phi i64 [ [[N_EXT]], [[OUTER_LATCH]] ]137; CHECK-NEXT: [[TMP0]] = add nsw i64 [[INNER_IV]], 1138; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[TMP0]], [[N_EXT_LCSSA]]139; CHECK-NEXT: br i1 [[TMP1]], label [[INNER]], label [[EXIT:%.*]]140; CHECK: outer.latch:141; CHECK-NEXT: [[OUTER_IV_NEXT]] = add nsw i64 [[OUTER_IV]], 1142; CHECK-NEXT: [[C_2:%.*]] = icmp ne i64 [[OUTER_IV]], [[N_EXT]]143; CHECK-NEXT: br i1 [[C_2]], label [[OUTER_HEADER]], label [[INNER_SPLIT]]144; CHECK: exit:145; CHECK-NEXT: ret void146;147bb:148 br label %outer.header149 150outer.header: ; preds = %bb11, %bb2151 %outer.iv = phi i64 [ 0, %bb ], [ %outer.iv.next, %outer.latch ]152 %N.ext = sext i32 %N to i64153 br label %inner154 155inner: ; preds = %bb6, %bb4156 %inner.iv = phi i64 [ 0, %outer.header ], [ %inner.iv.next, %inner ]157 %tmp8 = getelementptr inbounds [4 x [4 x [2 x i16]]], ptr @global, i64 0, i64 %inner.iv, i64 %outer.iv, i64 0158 %inner.iv.next = add nsw i64 %inner.iv, 1159 %c.1 = icmp ne i64 %inner.iv.next, %N.ext160 br i1 %c.1, label %inner, label %outer.latch161 162outer.latch: ; preds = %bb6163 %outer.iv.next = add nsw i64 %outer.iv, 1164 %c.2 = icmp ne i64 %outer.iv, %N.ext165 br i1 %c.2 , label %outer.header, label %exit166 167exit: ; preds = %bb11168 ret void169}170