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1; RUN: opt < %s -passes=loop-interchange -cache-line-size=64 -loop-interchange-threshold=-100 -verify-loop-lcssa -S | FileCheck %s2 3; Test case for PR41725. The induction variables in the latches escape the4; loops and we must move some PHIs around.5 6@a = common dso_local global i64 0, align 47@b = common dso_local global i64 0, align 48@c = common dso_local global [10 x [10 x i32 ]] zeroinitializer, align 169 10 11define void @test_lcssa_indvars1() {12; CHECK-LABEL: @test_lcssa_indvars1()13; CHECK-LABEL: inner.body:14; CHECK-NEXT: %iv.inner = phi i64 [ %[[IVNEXT:[0-9]+]], %inner.body.split ], [ 5, %inner.body.preheader ]15 16; CHECK-LABEL: inner.body.split:17; CHECK-NEXT: %0 = phi i64 [ %iv.outer.next, %outer.latch ]18; CHECK-NEXT: %[[IVNEXT]] = add nsw i64 %iv.inner, -119; CHECK-NEXT: %[[COND:[0-9]+]] = icmp eq i64 %iv.inner, 020; CHECK-NEXT: br i1 %[[COND]], label %exit, label %inner.body21 22; CHECK-LABEL: exit:23; CHECK-NEXT: %v4.lcssa = phi i64 [ %0, %inner.body.split ]24; CHECK-NEXT: %v8.lcssa.lcssa = phi i64 [ %[[IVNEXT]], %inner.body.split ]25; CHECK-NEXT: store i64 %v8.lcssa.lcssa, ptr @b, align 426; CHECK-NEXT: store i64 %v4.lcssa, ptr @a, align 427 28entry:29 br label %outer.header30 31outer.header: ; preds = %outer.latch, %entry32 %iv.outer = phi i64 [ 0, %entry ], [ %iv.outer.next, %outer.latch ]33 br label %inner.body34 35inner.body: ; preds = %inner.body, %outer.header36 %iv.inner = phi i64 [ 5, %outer.header ], [ %iv.inner.next, %inner.body ]37 %v7 = getelementptr inbounds [10 x [10 x i32]], ptr @c, i64 0, i64 %iv.inner, i64 %iv.outer38 store i32 0, ptr %v7, align 439 %iv.inner.next = add nsw i64 %iv.inner, -140 %v9 = icmp eq i64 %iv.inner, 041 br i1 %v9, label %outer.latch, label %inner.body42 43outer.latch: ; preds = %inner.body44 %v8.lcssa = phi i64 [ %iv.inner.next, %inner.body ]45 %iv.outer.next = add nuw nsw i64 %iv.outer, 146 %v5 = icmp ult i64 %iv.outer, 247 br i1 %v5, label %outer.header, label %exit48 49exit: ; preds = %outer.latch50 %v4.lcssa = phi i64 [ %iv.outer.next, %outer.latch ]51 %v8.lcssa.lcssa = phi i64 [ %v8.lcssa, %outer.latch ]52 store i64 %v8.lcssa.lcssa, ptr @b, align 453 store i64 %v4.lcssa, ptr @a, align 454 ret void55}56 57 58define void @test_lcssa_indvars2() {59; CHECK-LABEL: @test_lcssa_indvars2()60; CHECK-LABEL: inner.body:61; CHECK-NEXT: %iv.inner = phi i64 [ %[[IVNEXT:[0-9]+]], %inner.body.split ], [ 5, %inner.body.preheader ]62 63; CHECK-LABEL: inner.body.split:64; CHECK-NEXT: %0 = phi i64 [ %iv.outer, %outer.latch ]65; CHECK-NEXT: %[[IVNEXT]] = add nsw i64 %iv.inner, -166; CHECK-NEXT: %[[COND:[0-9]+]] = icmp eq i64 %[[IVNEXT]], 067; CHECK-NEXT: br i1 %[[COND]], label %exit, label %inner.body68 69; CHECK-LABEL: exit:70; CHECK-NEXT: %v4.lcssa = phi i64 [ %0, %inner.body.split ]71; CHECK-NEXT: %v8.lcssa.lcssa = phi i64 [ %iv.inner, %inner.body.split ]72; CHECK-NEXT: store i64 %v8.lcssa.lcssa, ptr @b, align 473; CHECK-NEXT: store i64 %v4.lcssa, ptr @a, align 474 75entry:76 br label %outer.header77 78outer.header: ; preds = %outer.latch, %entry79 %iv.outer = phi i64 [ 0, %entry ], [ %iv.outer.next, %outer.latch ]80 br label %inner.body81 82inner.body: ; preds = %inner.body, %outer.header83 %iv.inner = phi i64 [ 5, %outer.header ], [ %iv.inner.next, %inner.body ]84 %v7 = getelementptr inbounds [10 x [10 x i32]], ptr @c, i64 0, i64 %iv.inner, i64 %iv.outer85 store i32 0, ptr %v7, align 486 %iv.inner.next = add nsw i64 %iv.inner, -187 %v9 = icmp eq i64 %iv.inner.next, 088 br i1 %v9, label %outer.latch, label %inner.body89 90outer.latch: ; preds = %inner.body91 %v8.lcssa = phi i64 [ %iv.inner, %inner.body ]92 %iv.outer.next = add nuw nsw i64 %iv.outer, 193 %v5 = icmp ult i64 %iv.outer.next, 294 br i1 %v5, label %outer.header, label %exit95 96exit: ; preds = %outer.latch97 %v4.lcssa = phi i64 [ %iv.outer, %outer.latch ]98 %v8.lcssa.lcssa = phi i64 [ %v8.lcssa, %outer.latch ]99 store i64 %v8.lcssa.lcssa, ptr @b, align 4100 store i64 %v4.lcssa, ptr @a, align 4101 ret void102}103 104define void @test_lcssa_indvars3() {105; CHECK-LABEL: @test_lcssa_indvars3()106; CHECK-LABEL: inner.body:107; CHECK-NEXT: %iv.inner = phi i64 [ %[[IVNEXT:[0-9]+]], %inner.body.split ], [ 5, %inner.body.preheader ]108 109; CHECK-LABEL: inner.body.split:110; CHECK-NEXT: %0 = phi i64 [ %iv.outer.next, %outer.latch ]111; CHECK-NEXT: %[[IVNEXT]] = add nsw i64 %iv.inner, -1112; CHECK-NEXT: %[[COND:[0-9]+]] = icmp eq i64 %iv.inner, 0113; CHECK-NEXT: br i1 %[[COND]], label %exit, label %inner.body114 115; CHECK-LABEL: exit:116; CHECK-NEXT: %v4.lcssa = phi i64 [ %0, %inner.body.split ]117; CHECK-NEXT: %v8.lcssa.lcssa = phi i64 [ %[[IVNEXT]], %inner.body.split ]118; CHECK-NEXT: %v8.lcssa.lcssa.2 = phi i64 [ %[[IVNEXT]], %inner.body.split ]119; CHECK-NEXT: %r1 = add i64 %v8.lcssa.lcssa, %v8.lcssa.lcssa.2120; CHECK-NEXT: store i64 %r1, ptr @b, align 4121; CHECK-NEXT: store i64 %v4.lcssa, ptr @a, align 4122 123 124entry:125 br label %outer.header126 127outer.header: ; preds = %outer.latch, %entry128 %iv.outer = phi i64 [ 0, %entry ], [ %iv.outer.next, %outer.latch ]129 br label %inner.body130 131inner.body: ; preds = %inner.body, %outer.header132 %iv.inner = phi i64 [ 5, %outer.header ], [ %iv.inner.next, %inner.body ]133 %v7 = getelementptr inbounds [10 x [10 x i32]], ptr @c, i64 0, i64 %iv.inner, i64 %iv.outer134 store i32 0, ptr %v7, align 4135 %iv.inner.next = add nsw i64 %iv.inner, -1136 %v9 = icmp eq i64 %iv.inner, 0137 br i1 %v9, label %outer.latch, label %inner.body138 139outer.latch: ; preds = %inner.body140 %v8.lcssa = phi i64 [ %iv.inner.next, %inner.body ]141 ;%const.lcssa = phi i64 [ 111, %inner.body ]142 %iv.outer.next = add nuw nsw i64 %iv.outer, 1143 %v5 = icmp ult i64 %iv.outer, 2144 br i1 %v5, label %outer.header, label %exit145 146exit: ; preds = %outer.latch147 %v4.lcssa = phi i64 [ %iv.outer.next, %outer.latch ]148 %v8.lcssa.lcssa = phi i64 [ %v8.lcssa, %outer.latch ]149 %v8.lcssa.lcssa.2 = phi i64 [ %v8.lcssa, %outer.latch ]150 %r1 = add i64 %v8.lcssa.lcssa, %v8.lcssa.lcssa.2151 store i64 %r1, ptr @b, align 4152 store i64 %v4.lcssa, ptr @a, align 4153 ret void154}155 156 157; Make sure we do not crash for loops without reachable exits.158define void @no_reachable_exits() {159; Check we do not crash.160; CHECK-LABEL: @no_reachable_exits(161; CHECK-NEXT: bb:162; CHECK-NEXT: br label [[OUTER_PH:%.*]]163; CHECK: outer.ph:164; CHECK-NEXT: br label [[OUTER_HEADER:%.*]]165; CHECK: outer.header:166; CHECK-NEXT: [[TMP2:%.*]] = phi i32 [ 0, [[OUTER_PH]] ], [ [[TMP8:%.*]], [[OUTER_LATCH:%.*]] ]167; CHECK-NEXT: br i1 undef, label [[INNER_PH:%.*]], label [[OUTER_LATCH]]168; CHECK: inner.ph:169; CHECK-NEXT: br label [[INNER_BODY:%.*]]170; CHECK: inner.body:171; CHECK-NEXT: [[TMP31:%.*]] = phi i32 [ 0, [[INNER_PH]] ], [ [[TMP6:%.*]], [[INNER_BODY]] ]172; CHECK-NEXT: [[TMP5:%.*]] = load ptr, ptr undef, align 8173; CHECK-NEXT: [[TMP6]] = add nsw i32 [[TMP31]], 1174; CHECK-NEXT: br i1 false, label [[INNER_BODY]], label [[OUTER_LATCH_LOOPEXIT:%.*]]175; CHECK: outer.latch.loopexit:176; CHECK-NEXT: br label [[OUTER_LATCH]]177; CHECK: outer.latch:178; CHECK-NEXT: [[TMP8]] = add nsw i32 [[TMP2]], 1179; CHECK-NEXT: br i1 false, label [[OUTER_HEADER]], label [[EXIT:%.*]]180; CHECK: exit:181; CHECK-NEXT: unreachable182 183 184bb:185 br label %outer.ph186 187outer.ph: ; preds = %bb188 br label %outer.header189 190outer.header: ; preds = %outer.ph, %outer.latch191 %tmp2 = phi i32 [ 0, %outer.ph ], [ %tmp8, %outer.latch ]192 br i1 undef, label %inner.ph, label %outer.latch193 194inner.ph: ; preds = %outer.header195 br label %inner.body196 197inner.body: ; preds = %inner.ph, %inner.body198 %tmp31 = phi i32 [ 0, %inner.ph ], [ %tmp6, %inner.body]199 %tmp5 = load ptr, ptr undef, align 8200 %tmp6 = add nsw i32 %tmp31, 1201 br i1 undef, label %inner.body, label %outer.latch202 203outer.latch: ; preds = %inner.body, %outer.header204 %tmp8 = add nsw i32 %tmp2, 1205 br i1 undef, label %outer.header, label %exit206 207exit: ; preds = %outer.latch208 unreachable209}210