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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=loop-interchange -cache-line-size=64 -S < %s | FileCheck %s3 4; Test cases for PR43473.5 6; In the 2 test cases below, we have a LCSSA PHI in the inner loop exit, which7; is used in the outer loop latch. This is not supported.8 9define void @test1(i1 %arg) {10; CHECK-LABEL: @test1(11; CHECK-NEXT: entry:12; CHECK-NEXT: br label [[OUTER_HEADER:%.*]]13; CHECK: outer.header:14; CHECK-NEXT: [[OUTER_IV:%.*]] = phi i64 [ undef, [[ENTRY:%.*]] ], [ [[OUTER_IV_NEXT:%.*]], [[OUTER_LATCH:%.*]] ]15; CHECK-NEXT: [[IDX:%.*]] = getelementptr inbounds double, ptr undef, i64 [[OUTER_IV]]16; CHECK-NEXT: br label [[INNER:%.*]]17; CHECK: inner:18; CHECK-NEXT: [[INNER_IV:%.*]] = phi i64 [ 0, [[OUTER_HEADER]] ], [ [[INNER_IV_NEXT:%.*]], [[INNER]] ]19; CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[IDX]], align 820; CHECK-NEXT: store double undef, ptr [[IDX]], align 821; CHECK-NEXT: [[INNER_IV_NEXT]] = add nuw nsw i64 [[INNER_IV]], 122; CHECK-NEXT: br i1 [[ARG:%.*]], label [[INNER]], label [[OUTER_LATCH]]23; CHECK: outer.latch:24; CHECK-NEXT: [[INC43_LCSSA_WIDE_US:%.*]] = phi i64 [ [[INNER_IV_NEXT]], [[INNER]] ]25; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[INC43_LCSSA_WIDE_US]] to i3226; CHECK-NEXT: [[OUTER_IV_NEXT]] = add nsw i64 [[OUTER_IV]], 127; CHECK-NEXT: br i1 [[ARG]], label [[OUTER_HEADER]], label [[OUTER_EXIT:%.*]]28; CHECK: outer.exit:29; CHECK-NEXT: ret void30;31entry:32 br label %outer.header33 34outer.header: ; preds = %for.cond26.for.end44_crit_edge.us, %entry35 %outer.iv = phi i64 [ undef, %entry ], [ %outer.iv.next, %outer.latch ]36 %idx = getelementptr inbounds double, ptr undef, i64 %outer.iv37 br label %inner38 39inner: ; preds = %for.body28.us, %for.body25.us40 %inner.iv = phi i64 [ 0, %outer.header ], [ %inner.iv.next, %inner ]41 %0 = load double, ptr %idx, align 842 store double undef, ptr %idx, align 843 %inner.iv.next = add nuw nsw i64 %inner.iv, 144 br i1 %arg, label %inner, label %outer.latch45 46outer.latch: ; preds = %inner47 %inc43.lcssa.wide.us = phi i64 [ %inner.iv.next, %inner ]48 %1 = trunc i64 %inc43.lcssa.wide.us to i3249 %outer.iv.next = add nsw i64 %outer.iv, 150 br i1 %arg, label %outer.header, label %outer.exit51 52outer.exit: ; preds = %for.cond26.for.end44_crit_edge.us53 ret void54}55 56; Same as @test1, but with a dedicated inner loop exit block.57define void @test2(i1 %arg) {58; CHECK-LABEL: @test2(59; CHECK-NEXT: entry:60; CHECK-NEXT: br label [[OUTER_HEADER:%.*]]61; CHECK: outer.header:62; CHECK-NEXT: [[OUTER_IV:%.*]] = phi i64 [ undef, [[ENTRY:%.*]] ], [ [[OUTER_IV_NEXT:%.*]], [[OUTER_LATCH:%.*]] ]63; CHECK-NEXT: [[IDX:%.*]] = getelementptr inbounds double, ptr undef, i64 [[OUTER_IV]]64; CHECK-NEXT: br label [[INNER:%.*]]65; CHECK: inner:66; CHECK-NEXT: [[INNER_IV:%.*]] = phi i64 [ 0, [[OUTER_HEADER]] ], [ [[INNER_IV_NEXT:%.*]], [[INNER]] ]67; CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[IDX]], align 868; CHECK-NEXT: store double undef, ptr [[IDX]], align 869; CHECK-NEXT: [[INNER_IV_NEXT]] = add nuw nsw i64 [[INNER_IV]], 170; CHECK-NEXT: br i1 [[ARG:%.*]], label [[INNER]], label [[INNER_EXIT:%.*]]71; CHECK: inner.exit:72; CHECK-NEXT: [[INC43_LCSSA_WIDE_US:%.*]] = phi i64 [ [[INNER_IV_NEXT]], [[INNER]] ]73; CHECK-NEXT: br label [[OUTER_LATCH]]74; CHECK: outer.latch:75; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[INC43_LCSSA_WIDE_US]] to i3276; CHECK-NEXT: [[OUTER_IV_NEXT]] = add nsw i64 [[OUTER_IV]], 177; CHECK-NEXT: br i1 [[ARG]], label [[OUTER_HEADER]], label [[OUTER_EXIT:%.*]]78; CHECK: outer.exit:79; CHECK-NEXT: ret void80;81entry:82 br label %outer.header83 84outer.header: ; preds = %for.cond26.for.end44_crit_edge.us, %entry85 %outer.iv = phi i64 [ undef, %entry ], [ %outer.iv.next, %outer.latch ]86 %idx = getelementptr inbounds double, ptr undef, i64 %outer.iv87 br label %inner88 89inner: ; preds = %for.body28.us, %for.body25.us90 %inner.iv = phi i64 [ 0, %outer.header ], [ %inner.iv.next, %inner ]91 %0 = load double, ptr %idx, align 892 store double undef, ptr %idx, align 893 %inner.iv.next = add nuw nsw i64 %inner.iv, 194 br i1 %arg, label %inner, label %inner.exit95 96inner.exit:97 %inc43.lcssa.wide.us = phi i64 [ %inner.iv.next, %inner ]98 br label %outer.latch99 100outer.latch: ; preds = %inner101 %1 = trunc i64 %inc43.lcssa.wide.us to i32102 %outer.iv.next = add nsw i64 %outer.iv, 1103 br i1 %arg, label %outer.header, label %outer.exit104 105outer.exit: ; preds = %for.cond26.for.end44_crit_edge.us106 ret void107}108 109