194 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes='require<domtree>,loop(loop-simplifycfg)' -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s3; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes=loop-simplifycfg -verify-memoryssa -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s4 5target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"6 7define void @c() {8; CHECK-LABEL: @c(9; CHECK-NEXT: entry:10; CHECK-NEXT: br label [[D:%.*]]11; CHECK: d.loopexit:12; CHECK-NEXT: [[DOTLCSSA:%.*]] = phi i32 [ [[TMP1:%.*]], [[FOR_COND:%.*]] ]13; CHECK-NEXT: br label [[D]]14; CHECK: d:15; CHECK-NEXT: [[TMP0:%.*]] = phi i32 [ undef, [[ENTRY:%.*]] ], [ [[DOTLCSSA]], [[D_LOOPEXIT:%.*]] ]16; CHECK-NEXT: br label [[FOR_COND]]17; CHECK: for.cond:18; CHECK-NEXT: [[TMP1]] = phi i32 [ [[TMP0]], [[D]] ], [ 0, [[IF_END:%.*]] ]19; CHECK-NEXT: [[TOBOOL2:%.*]] = icmp eq i32 [[TMP1]], 020; CHECK-NEXT: br i1 [[TOBOOL2]], label [[IF_END]], label [[D_LOOPEXIT]]21; CHECK: if.end:22; CHECK-NEXT: br label [[FOR_COND]]23;24entry:25 br label %d26 27d.loopexit: ; preds = %if.end.7, %for.body28 %.lcssa = phi i32 [ %1, %for.body ], [ 0, %if.end.7 ]29 br label %d30 31d: ; preds = %d.loopexit, %entry32 %0 = phi i32 [ undef, %entry ], [ %.lcssa, %d.loopexit ]33 br label %for.cond34 35for.cond: ; preds = %if.end.8, %d36 %1 = phi i32 [ %0, %d ], [ 0, %if.end.8 ]37 br label %for.body38 39for.body: ; preds = %for.cond40 %tobool2 = icmp eq i32 %1, 041 br i1 %tobool2, label %if.end, label %d.loopexit42 43if.end: ; preds = %for.body44 br label %if.end.745 46if.end.7: ; preds = %if.end47 br i1 true, label %if.end.8, label %d.loopexit48 49if.end.8: ; preds = %if.end.750 br label %for.cond51}52 53define void @test_01() {54; CHECK-LABEL: @test_01(55; CHECK-NEXT: entry:56; CHECK-NEXT: br label [[FOR_COND:%.*]]57; CHECK: for.cond.loopexit:58; CHECK-NEXT: br label [[FOR_COND]]59; CHECK: for.cond:60; CHECK-NEXT: [[INC41_LCSSA3:%.*]] = phi i16 [ poison, [[FOR_COND_LOOPEXIT:%.*]] ], [ undef, [[ENTRY:%.*]] ]61; CHECK-NEXT: switch i32 0, label [[FOR_COND_SPLIT:%.*]] [62; CHECK-NEXT: i32 1, label [[FOR_COND_LOOPEXIT]]63; CHECK-NEXT: ]64; CHECK: for.cond.split:65; CHECK-NEXT: [[INC41_LCSSA3_LCSSA:%.*]] = phi i16 [ [[INC41_LCSSA3]], [[FOR_COND]] ]66; CHECK-NEXT: br label [[WHILE_COND:%.*]]67; CHECK: while.cond:68; CHECK-NEXT: [[INC41:%.*]] = phi i16 [ [[INC4:%.*]], [[WHILE_COND]] ], [ [[INC41_LCSSA3_LCSSA]], [[FOR_COND_SPLIT]] ]69; CHECK-NEXT: [[INC4]] = add nsw i16 [[INC41]], 170; CHECK-NEXT: br label [[WHILE_COND]]71;72entry:73 br label %for.cond74 75for.cond.loopexit: ; preds = %while.cond76 %inc41.lcssa = phi i16 [ %inc41, %while.cond ]77 br label %for.cond78 79for.cond: ; preds = %for.cond.loopexit, %entry80 %inc41.lcssa3 = phi i16 [ %inc41.lcssa, %for.cond.loopexit ], [ undef, %entry ]81 br label %while.cond82 83while.cond: ; preds = %while.body, %for.cond84 %inc41 = phi i16 [ %inc4, %while.body ], [ %inc41.lcssa3, %for.cond ]85 br i1 true, label %while.body, label %for.cond.loopexit86 87while.body: ; preds = %while.cond88 %inc4 = add nsw i16 %inc41, 189 br label %while.cond90}91 92define void @bar() {93; CHECK-LABEL: @bar(94; CHECK-NEXT: bb:95; CHECK-NEXT: switch i32 0, label [[BB_SPLIT:%.*]] [96; CHECK-NEXT: i32 1, label [[BB10:%.*]]97; CHECK-NEXT: ]98; CHECK: bb.split:99; CHECK-NEXT: br label [[BB1:%.*]]100; CHECK: bb1:101; CHECK-NEXT: [[TMP:%.*]] = phi i32 [ [[TMP7:%.*]], [[BB6:%.*]] ], [ undef, [[BB_SPLIT]] ]102; CHECK-NEXT: switch i32 undef, label [[BB5:%.*]] [103; CHECK-NEXT: i32 0, label [[BB6]]104; CHECK-NEXT: i32 1, label [[BB8:%.*]]105; CHECK-NEXT: ]106; CHECK: bb5:107; CHECK-NEXT: ret void108; CHECK: bb6:109; CHECK-NEXT: [[TMP7]] = add i32 undef, 123110; CHECK-NEXT: br label [[BB1]]111; CHECK: bb8:112; CHECK-NEXT: [[TMP9:%.*]] = phi i32 [ [[TMP]], [[BB1]] ]113; CHECK-NEXT: [[USE:%.*]] = add i32 [[TMP9]], 1114; CHECK-NEXT: ret void115; CHECK: bb10:116; CHECK-NEXT: ret void117;118 119bb:120 br label %bb1121 122bb1: ; preds = %bb6, %bb123 %tmp = phi i32 [ %tmp7, %bb6 ], [ undef, %bb ]124 br i1 false, label %bb2, label %bb4125 126bb2: ; preds = %bb1127 switch i32 undef, label %bb10 [128 i32 0, label %bb3129 i32 1, label %bb8130 ]131 132bb3: ; preds = %bb2133 br label %bb6134 135bb4: ; preds = %bb1136 switch i32 undef, label %bb5 [137 i32 0, label %bb6138 i32 1, label %bb8139 ]140 141bb5: ; preds = %bb4142 ret void143 144bb6: ; preds = %bb4, %bb3145 %tmp7 = add i32 undef, 123146 br label %bb1147 148bb8: ; preds = %bb4, %bb2149 %tmp9 = phi i32 [ %tmp, %bb2 ], [ %tmp, %bb4 ]150 %use = add i32 %tmp9, 1151 ret void152 153bb10: ; preds = %bb2154 ret void155}156 157define void @memlcssa() {158; CHECK-LABEL: @memlcssa(159; CHECK-NEXT: entry:160; CHECK-NEXT: switch i32 0, label [[ENTRY_SPLIT:%.*]] [161; CHECK-NEXT: i32 1, label [[DEFAULT_BB:%.*]]162; CHECK-NEXT: ]163; CHECK: entry.split:164; CHECK-NEXT: br label [[FOR_BODY:%.*]]165; CHECK: for.body:166; CHECK-NEXT: call void @foo()167; CHECK-NEXT: br label [[FOR_BODY]]168; CHECK: default.bb:169; CHECK-NEXT: unreachable170;171entry:172 br label %for.body173 174for.body: ; preds = %exit, %entry175 br label %switch.bb176 177switch.bb: ; preds = %for.body178 switch i2 1, label %default.bb [179 i2 1, label %case.bb180 ]181 182case.bb: ; preds = %switch183 br label %exit184 185default.bb: ; preds = %switch186 unreachable187 188exit: ; preds = %case.bb189 call void @foo()190 br label %for.body191}192 193declare void @foo()194