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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; REQUIRES: asserts3; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes='require<domtree>,loop(loop-simplifycfg)' -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s4; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes=loop-simplifycfg -verify-memoryssa -verify-loop-info -verify-dom-info -verify-loop-lcssa 2>&1 < %s | FileCheck %s5 6target triple = "x86_64-unknown-linux-gnu"7 8define void @test() {9; CHECK-LABEL: @test(10; CHECK-NEXT: br label [[BB1:%.*]]11; CHECK: bb1.loopexit:12; CHECK-NEXT: br label [[BB1]]13; CHECK: bb1:14; CHECK-NEXT: br label [[BB2:%.*]]15; CHECK: bb2.loopexit:16; CHECK-NEXT: br label [[BB2]]17; CHECK: bb2:18; CHECK-NEXT: switch i32 0, label [[BB2_SPLIT:%.*]] [19; CHECK-NEXT: i32 1, label [[BB1_LOOPEXIT:%.*]]20; CHECK-NEXT: i32 2, label [[BB2_LOOPEXIT:%.*]]21; CHECK-NEXT: ]22; CHECK: bb2.split:23; CHECK-NEXT: br label [[BB3:%.*]]24; CHECK: bb3:25; CHECK-NEXT: br label [[BB3]]26;27 28 br label %bb129 30bb1: ; preds = %bb4, %031 br label %bb232 33bb2: ; preds = %bb6, %bb134 br label %bb335 36bb3: ; preds = %bb8, %bb3, %bb237 br i1 false, label %bb4, label %bb338 39bb4: ; preds = %bb8, %bb340 br i1 true, label %bb1, label %bb641 42bb6: ; preds = %bb443 br i1 false, label %bb2, label %bb844 45bb8: ; preds = %bb646 br i1 true, label %bb4, label %bb347}48 49define void @test_many_subloops(i1 %c) {50; CHECK-LABEL: @test_many_subloops(51; CHECK-NEXT: br label [[BB1:%.*]]52; CHECK: bb1.loopexit:53; CHECK-NEXT: br label [[BB1]]54; CHECK: bb1:55; CHECK-NEXT: br label [[BB2:%.*]]56; CHECK: bb2.loopexit:57; CHECK-NEXT: br label [[BB2]]58; CHECK: bb2:59; CHECK-NEXT: switch i32 0, label [[BB2_SPLIT:%.*]] [60; CHECK-NEXT: i32 1, label [[BB1_LOOPEXIT:%.*]]61; CHECK-NEXT: i32 2, label [[BB2_LOOPEXIT:%.*]]62; CHECK-NEXT: ]63; CHECK: bb2.split:64; CHECK-NEXT: br label [[BB3:%.*]]65; CHECK: bb3:66; CHECK-NEXT: br label [[BB3]]67;68 69 br label %bb170 71bb1:72 br label %bb273 74bb2:75 br label %bb376 77bb3:78 br i1 false, label %bb4, label %bb379 80bb4:81 br i1 %c, label %bb1, label %subloop182 83subloop1:84 br i1 %c, label %subloop2, label %subloop1185 86subloop11:87 br i1 %c, label %subloop11, label %subloop1288 89subloop12:90 br i1 %c, label %subloop12, label %subloop1391 92subloop13:93 br i1 %c, label %subloop13, label %subloop1_latch94 95subloop1_latch:96 br label %subloop197 98subloop2:99 br i1 %c, label %bb6, label %subloop21100 101subloop21:102 br i1 %c, label %subloop21, label %subloop22103 104subloop22:105 br i1 %c, label %subloop22, label %subloop23106 107subloop23:108 br i1 %c, label %subloop23, label %subloop2_latch109 110subloop2_latch:111 br label %subloop2112 113bb6:114 br i1 %c, label %bb2, label %bb8115 116bb8:117 br i1 true, label %bb4, label %bb3118}119