brintos

brintos / llvm-project-archived public Read only

0
0
Text · 4.3 KiB · 7195d4c Raw
141 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -loop-reduce -S < %s | FileCheck %s3;4; Test LSR's use of SplitCriticalEdge during phi rewriting.5 6target triple = "x86_64-apple-darwin"7 8; Provide legal integer types.9target datalayout = "n8:16:32:64"10 11; Verify that identical edges are merged. rdar://problem/645389312 13define ptr @test1() {14;15; CHECK-LABEL: @test1(16; CHECK-NEXT:  entry:17; CHECK-NEXT:    br label [[LOOP:%.*]]18; CHECK:       loop:19; CHECK-NEXT:    [[LSR_IV:%.*]] = phi ptr [ [[SCEVGEP:%.*]], [[LOOP]] ], [ null, [[ENTRY:%.*]] ]20; CHECK-NEXT:    [[SCEVGEP]] = getelementptr i8, ptr [[LSR_IV]], i64 121; CHECK-NEXT:    br i1 false, label [[LOOP]], label [[LOOPEXIT:%.*]]22; CHECK:       loopexit:23; CHECK-NEXT:    [[SCEVGEP_LCSSA:%.*]] = phi ptr [ [[SCEVGEP]], [[LOOP]] ]24; CHECK-NEXT:    br i1 false, label [[BBA:%.*]], label [[BBB:%.*]]25; CHECK:       bbA:26; CHECK-NEXT:    switch i32 0, label [[BBA_BB89_CRIT_EDGE:%.*]] [27; CHECK-NEXT:      i32 47, label [[BBA_BB89_CRIT_EDGE]]28; CHECK-NEXT:      i32 58, label [[BBA_BB89_CRIT_EDGE]]29; CHECK-NEXT:    ]30; CHECK:       bbA.bb89_crit_edge:31; CHECK-NEXT:    br label [[BB89:%.*]]32; CHECK:       bbB:33; CHECK-NEXT:    switch i8 0, label [[BBB_BB89_CRIT_EDGE:%.*]] [34; CHECK-NEXT:      i8 47, label [[BBB_BB89_CRIT_EDGE]]35; CHECK-NEXT:      i8 58, label [[BBB_BB89_CRIT_EDGE]]36; CHECK-NEXT:    ]37; CHECK:       bbB.bb89_crit_edge:38; CHECK-NEXT:    br label [[BB89]]39; CHECK:       bb89:40; CHECK-NEXT:    [[TMP75PHI:%.*]] = phi ptr [ [[SCEVGEP_LCSSA]], [[BBA_BB89_CRIT_EDGE]] ], [ [[SCEVGEP_LCSSA]], [[BBB_BB89_CRIT_EDGE]] ]41; CHECK-NEXT:    br label [[EXIT:%.*]]42; CHECK:       exit:43; CHECK-NEXT:    ret ptr [[TMP75PHI]]44;45entry:46  br label %loop47 48loop:49  %rec = phi i32 [ %next, %loop ], [ 0, %entry ]50  %next = add i32 %rec, 151  %tmp75 = getelementptr i8, ptr null, i32 %next52  br i1 false, label %loop, label %loopexit53 54loopexit:55  br i1 false, label %bbA, label %bbB56 57bbA:58  switch i32 0, label %bb89 [59  i32 47, label %bb8960  i32 58, label %bb8961  ]62 63bbB:64  switch i8 0, label %bb89 [65  i8 47, label %bb8966  i8 58, label %bb8967  ]68 69bb89:70  %tmp75phi = phi ptr [ %tmp75, %bbA ], [ %tmp75, %bbA ], [ %tmp75, %bbA ], [ %tmp75, %bbB ], [ %tmp75, %bbB ], [ %tmp75, %bbB ]71  br label %exit72 73exit:74  ret ptr %tmp75phi75}76 77; Handle single-predecessor phis: PR1375678define ptr @test2() {79;80; CHECK-LABEL: @test2(81; CHECK-NEXT:  entry:82; CHECK-NEXT:    br label [[LOOP:%.*]]83; CHECK:       loop:84; CHECK-NEXT:    [[LSR_IV:%.*]] = phi ptr [ [[SCEVGEP:%.*]], [[LOOP]] ], [ null, [[ENTRY:%.*]] ]85; CHECK-NEXT:    [[SCEVGEP]] = getelementptr i8, ptr [[LSR_IV]], i64 186; CHECK-NEXT:    br i1 false, label [[LOOP]], label [[LOOPEXIT:%.*]]87; CHECK:       loopexit:88; CHECK-NEXT:    [[SCEVGEP_LCSSA:%.*]] = phi ptr [ [[SCEVGEP]], [[LOOP]] ]89; CHECK-NEXT:    br i1 false, label [[BBA:%.*]], label [[BBB:%.*]]90; CHECK:       bbA:91; CHECK-NEXT:    switch i32 0, label [[BB89:%.*]] [92; CHECK-NEXT:      i32 47, label [[BB89]]93; CHECK-NEXT:      i32 58, label [[BB89]]94; CHECK-NEXT:    ]95; CHECK:       bbB:96; CHECK-NEXT:    switch i8 0, label [[BBB_EXIT_CRIT_EDGE:%.*]] [97; CHECK-NEXT:      i8 47, label [[BBB_EXIT_CRIT_EDGE]]98; CHECK-NEXT:      i8 58, label [[BBB_EXIT_CRIT_EDGE]]99; CHECK-NEXT:    ]100; CHECK:       bbB.exit_crit_edge:101; CHECK-NEXT:    br label [[EXIT:%.*]]102; CHECK:       bb89:103; CHECK-NEXT:    [[TMP75PHI:%.*]] = phi ptr [ [[SCEVGEP_LCSSA]], [[BBA]] ], [ [[SCEVGEP_LCSSA]], [[BBA]] ], [ [[SCEVGEP_LCSSA]], [[BBA]] ]104; CHECK-NEXT:    br label [[EXIT]]105; CHECK:       exit:106; CHECK-NEXT:    [[RESULT:%.*]] = phi ptr [ [[TMP75PHI]], [[BB89]] ], [ [[SCEVGEP_LCSSA]], [[BBB_EXIT_CRIT_EDGE]] ]107; CHECK-NEXT:    ret ptr [[RESULT]]108;109entry:110  br label %loop111 112loop:113  %rec = phi i32 [ %next, %loop ], [ 0, %entry ]114  %next = add i32 %rec, 1115  %tmp75 = getelementptr i8, ptr null, i32 %next116  br i1 false, label %loop, label %loopexit117 118loopexit:119  br i1 false, label %bbA, label %bbB120 121bbA:122  switch i32 0, label %bb89 [123  i32 47, label %bb89124  i32 58, label %bb89125  ]126 127bbB:128  switch i8 0, label %exit [129  i8 47, label %exit130  i8 58, label %exit131  ]132 133bb89:134  %tmp75phi = phi ptr [ %tmp75, %bbA ], [ %tmp75, %bbA ], [ %tmp75, %bbA ]135  br label %exit136 137exit:138  %result = phi ptr [ %tmp75phi, %bb89 ], [ %tmp75, %bbB ], [ %tmp75, %bbB ], [ %tmp75, %bbB ]139  ret ptr %result140}141