90 lines · plain
1; RUN: opt -S -mtriple=amdgcn-- -mcpu=bonaire -loop-reduce < %s | FileCheck -check-prefix=OPT %s2 3; Make sure the pointer / address space of AtomicRMW is considered4 5; OPT-LABEL: @test_local_atomicrmw_addressing_loop_uniform_index_max_offset_i32(6 7; OPT: .lr.ph.preheader:8; OPT: %scevgep2 = getelementptr i8, ptr addrspace(3) %arg1, i32 655329; OPT: br label %.lr.ph10; OPT: .lr.ph:11; OPT: %lsr.iv3 = phi ptr addrspace(3) [ %scevgep4, %.lr.ph ], [ %scevgep2, %.lr.ph.preheader ]12; OPT: %lsr.iv1 = phi ptr addrspace(3) [ %scevgep, %.lr.ph ], [ %arg0, %.lr.ph.preheader ]13; OPT: %lsr.iv = phi i32 [ %lsr.iv.next, %.lr.ph ], [ %n, %.lr.ph.preheader ]14; OPT: %tmp4 = atomicrmw add ptr addrspace(3) %lsr.iv3, i32 undef seq_cst, align 415; OPT: %tmp7 = atomicrmw add ptr addrspace(3) %lsr.iv1, i32 undef seq_cst, align 416; OPT: %0 = atomicrmw add ptr addrspace(3) %lsr.iv1, i32 %tmp8 seq_cst, align 417; OPT: %scevgep4 = getelementptr i8, ptr addrspace(3) %lsr.iv3, i32 418; OPT: br i1 %exitcond19define amdgpu_kernel void @test_local_atomicrmw_addressing_loop_uniform_index_max_offset_i32(ptr addrspace(3) noalias nocapture %arg0, ptr addrspace(3) noalias nocapture readonly %arg1, i32 %n) #0 {20bb:21 %tmp = icmp sgt i32 %n, 022 br i1 %tmp, label %.lr.ph.preheader, label %._crit_edge23 24.lr.ph.preheader: ; preds = %bb25 br label %.lr.ph26 27._crit_edge.loopexit: ; preds = %.lr.ph28 br label %._crit_edge29 30._crit_edge: ; preds = %._crit_edge.loopexit, %bb31 ret void32 33.lr.ph: ; preds = %.lr.ph, %.lr.ph.preheader34 %indvars.iv = phi i32 [ %indvars.iv.next, %.lr.ph ], [ 0, %.lr.ph.preheader ]35 %tmp1 = add nuw nsw i32 %indvars.iv, 1638336 %tmp3 = getelementptr inbounds i32, ptr addrspace(3) %arg1, i32 %tmp137 %tmp4 = atomicrmw add ptr addrspace(3) %tmp3, i32 undef seq_cst38 %tmp6 = getelementptr inbounds i32, ptr addrspace(3) %arg0, i32 %indvars.iv39 %tmp7 = atomicrmw add ptr addrspace(3) %tmp6, i32 undef seq_cst40 %tmp8 = add nsw i32 %tmp7, %tmp441 atomicrmw add ptr addrspace(3) %tmp6, i32 %tmp8 seq_cst42 %indvars.iv.next = add nuw nsw i32 %indvars.iv, 143 %exitcond = icmp eq i32 %indvars.iv.next, %n44 br i1 %exitcond, label %._crit_edge.loopexit, label %.lr.ph45}46 47; OPT-LABEL: test_local_cmpxchg_addressing_loop_uniform_index_max_offset_i32(48 49; OPT: .lr.ph.preheader:50; OPT: %scevgep2 = getelementptr i8, ptr addrspace(3) %arg1, i32 6553251; OPT: br label %.lr.ph52; OPT: .lr.ph:53; OPT: %lsr.iv3 = phi ptr addrspace(3) [ %scevgep4, %.lr.ph ], [ %scevgep2, %.lr.ph.preheader ]54; OPT: %lsr.iv1 = phi ptr addrspace(3) [ %scevgep, %.lr.ph ], [ %arg0, %.lr.ph.preheader ]55; OPT: %lsr.iv = phi i32 [ %lsr.iv.next, %.lr.ph ], [ %n, %.lr.ph.preheader ]56; OPT: %tmp4 = cmpxchg ptr addrspace(3) %lsr.iv3, i32 undef, i32 undef seq_cst monotonic, align 457; OPT: %scevgep4 = getelementptr i8, ptr addrspace(3) %lsr.iv3, i32 458define amdgpu_kernel void @test_local_cmpxchg_addressing_loop_uniform_index_max_offset_i32(ptr addrspace(3) noalias nocapture %arg0, ptr addrspace(3) noalias nocapture readonly %arg1, i32 %n) #0 {59bb:60 %tmp = icmp sgt i32 %n, 061 br i1 %tmp, label %.lr.ph.preheader, label %._crit_edge62 63.lr.ph.preheader: ; preds = %bb64 br label %.lr.ph65 66._crit_edge.loopexit: ; preds = %.lr.ph67 br label %._crit_edge68 69._crit_edge: ; preds = %._crit_edge.loopexit, %bb70 ret void71 72.lr.ph: ; preds = %.lr.ph, %.lr.ph.preheader73 %indvars.iv = phi i32 [ %indvars.iv.next, %.lr.ph ], [ 0, %.lr.ph.preheader ]74 %tmp1 = add nuw nsw i32 %indvars.iv, 1638375 %tmp3 = getelementptr inbounds i32, ptr addrspace(3) %arg1, i32 %tmp176 %tmp4 = cmpxchg ptr addrspace(3) %tmp3, i32 undef, i32 undef seq_cst monotonic77 %tmp4.0 = extractvalue { i32, i1 } %tmp4, 078 %tmp6 = getelementptr inbounds i32, ptr addrspace(3) %arg0, i32 %indvars.iv79 %tmp7 = cmpxchg ptr addrspace(3) %tmp6, i32 undef, i32 undef seq_cst monotonic80 %tmp7.0 = extractvalue { i32, i1 } %tmp7, 081 %tmp8 = add nsw i32 %tmp7.0, %tmp4.082 atomicrmw add ptr addrspace(3) %tmp6, i32 %tmp8 seq_cst83 %indvars.iv.next = add nuw nsw i32 %indvars.iv, 184 %exitcond = icmp eq i32 %indvars.iv.next, %n85 br i1 %exitcond, label %._crit_edge.loopexit, label %.lr.ph86}87 88attributes #0 = { nounwind }89attributes #1 = { nounwind argmemonly }90