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1; RUN: opt < %s -loop-reduce -S | FileCheck %s2 3target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"4target triple = "nvptx64-nvidia-cuda"5 6; This confirms that NVPTXTTI considers a 64-to-32 integer trunc free. If such7; truncs were not considered free, LSR would promote (int)i as a separate8; induction variable in the following example.9;10; for (long i = begin; i != end; i += stride)11; use((int)i);12;13; That would be worthless, because "i" is simulated by two 32-bit registers and14; truncating it to 32-bit is as simple as directly using the register that15; contains the low bits.16define ptx_kernel void @trunc_is_free(i64 %begin, i64 %stride, i64 %end) {17; CHECK-LABEL: @trunc_is_free(18entry:19 %cmp.4 = icmp eq i64 %begin, %end20 br i1 %cmp.4, label %for.cond.cleanup, label %for.body.preheader21 22for.body.preheader: ; preds = %entry23 br label %for.body24 25for.cond.cleanup.loopexit: ; preds = %for.body26 br label %for.cond.cleanup27 28for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry29 ret void30 31for.body: ; preds = %for.body.preheader, %for.body32; CHECK: for.body:33 %i.05 = phi i64 [ %add, %for.body ], [ %begin, %for.body.preheader ]34 %conv = trunc i64 %i.05 to i3235; CHECK: trunc i64 %{{[^ ]+}} to i3236 tail call void @_Z3usei(i32 %conv) #237 %add = add nsw i64 %i.05, %stride38 %cmp = icmp eq i64 %add, %end39 br i1 %cmp, label %for.cond.cleanup.loopexit, label %for.body40}41 42declare void @_Z3usei(i32)43 44