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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: opt < %s -loop-reduce -mtriple=x86_64 -S | FileCheck %s -check-prefix=INSN3; RUN: opt < %s -loop-reduce -mtriple=x86_64 -lsr-insns-cost=false -S | FileCheck %s -check-prefix=REGS4; RUN: llc < %s -O2 -mtriple=x86_64-unknown-unknown -lsr-insns-cost | FileCheck %s5 6; OPT test checks that LSR optimize compare for static counter to compare with 0.7 8; LLC test checks that LSR optimize compare for static counter.9; That means that instead of creating the following:10; movl %ecx, (%rdx,%rax,4)11; incq %rax12; cmpq $1024, %rax13; LSR should optimize out cmp:14; movl %ecx, 4096(%rdx,%rax)15; addq $4, %rax16; or17; movl %ecx, 4096(%rdx,%rax,4)18; incq %rax19 20target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"21 22define void @foo(ptr nocapture readonly %x, ptr nocapture readonly %y, ptr nocapture %q) {23; INSN-LABEL: @foo(24; INSN-NEXT: entry:25; INSN-NEXT: br label [[FOR_BODY:%.*]]26; INSN: for.cond.cleanup:27; INSN-NEXT: ret void28; INSN: for.body:29; INSN-NEXT: [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV_NEXT:%.*]], [[FOR_BODY]] ], [ -4096, [[ENTRY:%.*]] ]30; INSN-NEXT: [[SCEVGEP4:%.*]] = getelementptr i8, ptr [[X:%.*]], i64 [[LSR_IV]]31; INSN-NEXT: [[SCEVGEP5:%.*]] = getelementptr i8, ptr [[SCEVGEP4]], i64 409632; INSN-NEXT: [[TMP:%.*]] = load i32, ptr [[SCEVGEP5]], align 433; INSN-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[Y:%.*]], i64 [[LSR_IV]]34; INSN-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[SCEVGEP2]], i64 409635; INSN-NEXT: [[TMP1:%.*]] = load i32, ptr [[SCEVGEP3]], align 436; INSN-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP]]37; INSN-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[Q:%.*]], i64 [[LSR_IV]]38; INSN-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[SCEVGEP]], i64 409639; INSN-NEXT: store i32 [[ADD]], ptr [[SCEVGEP1]], align 440; INSN-NEXT: [[LSR_IV_NEXT]] = add nsw i64 [[LSR_IV]], 441; INSN-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[LSR_IV_NEXT]], 042; INSN-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY]]43;44; REGS-LABEL: @foo(45; REGS-NEXT: entry:46; REGS-NEXT: br label [[FOR_BODY:%.*]]47; REGS: for.cond.cleanup:48; REGS-NEXT: ret void49; REGS: for.body:50; REGS-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]51; REGS-NEXT: [[TMP0:%.*]] = shl nuw nsw i64 [[INDVARS_IV]], 252; REGS-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[X:%.*]], i64 [[TMP0]]53; REGS-NEXT: [[TMP:%.*]] = load i32, ptr [[SCEVGEP2]], align 454; REGS-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[INDVARS_IV]], 255; REGS-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[Y:%.*]], i64 [[TMP1]]56; REGS-NEXT: [[TMP1:%.*]] = load i32, ptr [[SCEVGEP1]], align 457; REGS-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP]]58; REGS-NEXT: [[TMP2:%.*]] = shl nuw nsw i64 [[INDVARS_IV]], 259; REGS-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[Q:%.*]], i64 [[TMP2]]60; REGS-NEXT: store i32 [[ADD]], ptr [[SCEVGEP]], align 461; REGS-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 162; REGS-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 102463; REGS-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY]]64;65; CHECK-LABEL: foo:66; CHECK: # %bb.0: # %entry67; CHECK-NEXT: movq $-4096, %rax # imm = 0xF00068; CHECK-NEXT: .p2align 469; CHECK-NEXT: .LBB0_1: # %for.body70; CHECK-NEXT: # =>This Inner Loop Header: Depth=171; CHECK-NEXT: movl 4096(%rsi,%rax), %ecx72; CHECK-NEXT: addl 4096(%rdi,%rax), %ecx73; CHECK-NEXT: movl %ecx, 4096(%rdx,%rax)74; CHECK-NEXT: addq $4, %rax75; CHECK-NEXT: jne .LBB0_176; CHECK-NEXT: # %bb.2: # %for.cond.cleanup77; CHECK-NEXT: retq78entry:79 br label %for.body80 81for.cond.cleanup: ; preds = %for.body82 ret void83 84for.body: ; preds = %for.body, %entry85 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]86 %arrayidx = getelementptr inbounds i32, ptr %x, i64 %indvars.iv87 %tmp = load i32, ptr %arrayidx, align 488 %arrayidx2 = getelementptr inbounds i32, ptr %y, i64 %indvars.iv89 %tmp1 = load i32, ptr %arrayidx2, align 490 %add = add nsw i32 %tmp1, %tmp91 %arrayidx4 = getelementptr inbounds i32, ptr %q, i64 %indvars.iv92 store i32 %add, ptr %arrayidx4, align 493 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 194 %exitcond = icmp eq i64 %indvars.iv.next, 102495 br i1 %exitcond, label %for.cond.cleanup, label %for.body96}97 98