167 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -loop-reduce -S < %s | FileCheck %s3; We find it is very bad to allow LSR formula containing SCEVAddRecExpr Reg4; from siblings of current loop. When one loop is LSR optimized, it can5; insert lsr.iv for other sibling loops, which sometimes leads to many extra6; lsr.iv inserted for loops.7 8target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"9 10@cond = common local_unnamed_addr global i64 0, align 811 12; Check there is no extra lsr.iv generated in foo.13define void @foo(i64 %N) local_unnamed_addr {14; CHECK-LABEL: @foo(15; CHECK-NEXT: entry:16; CHECK-NEXT: br label [[DO_BODY:%.*]]17; CHECK: do.body:18; CHECK-NEXT: [[I_0:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[DO_BODY]] ]19; CHECK-NEXT: tail call void @goo(i64 [[I_0]], i64 [[I_0]])20; CHECK-NEXT: [[INC]] = add nuw i64 [[I_0]], 121; CHECK-NEXT: [[T0:%.*]] = load i64, ptr @cond, align 822; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[T0]], 023; CHECK-NEXT: br i1 [[TOBOOL]], label [[DO_BODY2_PREHEADER:%.*]], label [[DO_BODY]]24; CHECK: do.body2.preheader:25; CHECK-NEXT: br label [[DO_BODY2:%.*]]26; CHECK: do.body2:27; CHECK-NEXT: [[I_1:%.*]] = phi i64 [ [[INC3:%.*]], [[DO_BODY2]] ], [ 0, [[DO_BODY2_PREHEADER]] ]28; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INC]], [[I_1]]29; CHECK-NEXT: tail call void @goo(i64 [[I_1]], i64 [[TMP0]])30; CHECK-NEXT: [[INC3]] = add nuw i64 [[I_1]], 131; CHECK-NEXT: [[T1:%.*]] = load i64, ptr @cond, align 832; CHECK-NEXT: [[TOBOOL6:%.*]] = icmp eq i64 [[T1]], 033; CHECK-NEXT: br i1 [[TOBOOL6]], label [[DO_BODY8_PREHEADER:%.*]], label [[DO_BODY2]]34; CHECK: do.body8.preheader:35; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[INC]], [[INC3]]36; CHECK-NEXT: br label [[DO_BODY8:%.*]]37; CHECK: do.body8:38; CHECK-NEXT: [[I_2:%.*]] = phi i64 [ [[INC9:%.*]], [[DO_BODY8]] ], [ 0, [[DO_BODY8_PREHEADER]] ]39; CHECK-NEXT: [[J_2:%.*]] = phi i64 [ [[INC10:%.*]], [[DO_BODY8]] ], [ [[TMP1]], [[DO_BODY8_PREHEADER]] ]40; CHECK-NEXT: tail call void @goo(i64 [[I_2]], i64 [[J_2]])41; CHECK-NEXT: [[INC9]] = add nuw nsw i64 [[I_2]], 142; CHECK-NEXT: [[INC10]] = add i64 [[J_2]], 143; CHECK-NEXT: [[T2:%.*]] = load i64, ptr @cond, align 844; CHECK-NEXT: [[TOBOOL12:%.*]] = icmp eq i64 [[T2]], 045; CHECK-NEXT: br i1 [[TOBOOL12]], label [[DO_BODY14_PREHEADER:%.*]], label [[DO_BODY8]]46; CHECK: do.body14.preheader:47; CHECK-NEXT: [[INC10_LCSSA:%.*]] = phi i64 [ [[INC10]], [[DO_BODY8]] ]48; CHECK-NEXT: br label [[DO_BODY14:%.*]]49; CHECK: do.body14:50; CHECK-NEXT: [[I_3:%.*]] = phi i64 [ [[INC15:%.*]], [[DO_BODY14]] ], [ 0, [[DO_BODY14_PREHEADER]] ]51; CHECK-NEXT: [[J_3:%.*]] = phi i64 [ [[INC16:%.*]], [[DO_BODY14]] ], [ [[INC10_LCSSA]], [[DO_BODY14_PREHEADER]] ]52; CHECK-NEXT: tail call void @goo(i64 [[I_3]], i64 [[J_3]])53; CHECK-NEXT: [[INC15]] = add nuw nsw i64 [[I_3]], 154; CHECK-NEXT: [[INC16]] = add i64 [[J_3]], 155; CHECK-NEXT: [[T3:%.*]] = load i64, ptr @cond, align 856; CHECK-NEXT: [[TOBOOL18:%.*]] = icmp eq i64 [[T3]], 057; CHECK-NEXT: br i1 [[TOBOOL18]], label [[DO_BODY20_PREHEADER:%.*]], label [[DO_BODY14]]58; CHECK: do.body20.preheader:59; CHECK-NEXT: [[INC16_LCSSA:%.*]] = phi i64 [ [[INC16]], [[DO_BODY14]] ]60; CHECK-NEXT: br label [[DO_BODY20:%.*]]61; CHECK: do.body20:62; CHECK-NEXT: [[I_4:%.*]] = phi i64 [ [[INC21:%.*]], [[DO_BODY20]] ], [ 0, [[DO_BODY20_PREHEADER]] ]63; CHECK-NEXT: [[J_4:%.*]] = phi i64 [ [[INC22:%.*]], [[DO_BODY20]] ], [ [[INC16_LCSSA]], [[DO_BODY20_PREHEADER]] ]64; CHECK-NEXT: tail call void @goo(i64 [[I_4]], i64 [[J_4]])65; CHECK-NEXT: [[INC21]] = add nuw nsw i64 [[I_4]], 166; CHECK-NEXT: [[INC22]] = add i64 [[J_4]], 167; CHECK-NEXT: [[T4:%.*]] = load i64, ptr @cond, align 868; CHECK-NEXT: [[TOBOOL24:%.*]] = icmp eq i64 [[T4]], 069; CHECK-NEXT: br i1 [[TOBOOL24]], label [[DO_BODY26_PREHEADER:%.*]], label [[DO_BODY20]]70; CHECK: do.body26.preheader:71; CHECK-NEXT: [[INC22_LCSSA:%.*]] = phi i64 [ [[INC22]], [[DO_BODY20]] ]72; CHECK-NEXT: br label [[DO_BODY26:%.*]]73; CHECK: do.body26:74; CHECK-NEXT: [[I_5:%.*]] = phi i64 [ [[INC27:%.*]], [[DO_BODY26]] ], [ 0, [[DO_BODY26_PREHEADER]] ]75; CHECK-NEXT: [[J_5:%.*]] = phi i64 [ [[INC28:%.*]], [[DO_BODY26]] ], [ [[INC22_LCSSA]], [[DO_BODY26_PREHEADER]] ]76; CHECK-NEXT: tail call void @goo(i64 [[I_5]], i64 [[J_5]])77; CHECK-NEXT: [[INC27]] = add nuw nsw i64 [[I_5]], 178; CHECK-NEXT: [[INC28]] = add nsw i64 [[J_5]], 179; CHECK-NEXT: [[T5:%.*]] = load i64, ptr @cond, align 880; CHECK-NEXT: [[TOBOOL30:%.*]] = icmp eq i64 [[T5]], 081; CHECK-NEXT: br i1 [[TOBOOL30]], label [[DO_END31:%.*]], label [[DO_BODY26]]82; CHECK: do.end31:83; CHECK-NEXT: ret void84;85entry:86 br label %do.body87 88do.body: ; preds = %do.body, %entry89 %i.0 = phi i64 [ 0, %entry ], [ %inc, %do.body ]90 tail call void @goo(i64 %i.0, i64 %i.0)91 %inc = add nuw nsw i64 %i.0, 192 %t0 = load i64, ptr @cond, align 893 %tobool = icmp eq i64 %t0, 094 br i1 %tobool, label %do.body2.preheader, label %do.body95 96do.body2.preheader: ; preds = %do.body97 br label %do.body298 99do.body2: ; preds = %do.body2.preheader, %do.body2100 %i.1 = phi i64 [ %inc3, %do.body2 ], [ 0, %do.body2.preheader ]101 %j.1 = phi i64 [ %inc4, %do.body2 ], [ %inc, %do.body2.preheader ]102 tail call void @goo(i64 %i.1, i64 %j.1)103 %inc3 = add nuw nsw i64 %i.1, 1104 %inc4 = add nsw i64 %j.1, 1105 %t1 = load i64, ptr @cond, align 8106 %tobool6 = icmp eq i64 %t1, 0107 br i1 %tobool6, label %do.body8.preheader, label %do.body2108 109do.body8.preheader: ; preds = %do.body2110 br label %do.body8111 112do.body8: ; preds = %do.body8.preheader, %do.body8113 %i.2 = phi i64 [ %inc9, %do.body8 ], [ 0, %do.body8.preheader ]114 %j.2 = phi i64 [ %inc10, %do.body8 ], [ %inc4, %do.body8.preheader ]115 tail call void @goo(i64 %i.2, i64 %j.2)116 %inc9 = add nuw nsw i64 %i.2, 1117 %inc10 = add nsw i64 %j.2, 1118 %t2 = load i64, ptr @cond, align 8119 %tobool12 = icmp eq i64 %t2, 0120 br i1 %tobool12, label %do.body14.preheader, label %do.body8121 122do.body14.preheader: ; preds = %do.body8123 br label %do.body14124 125do.body14: ; preds = %do.body14.preheader, %do.body14126 %i.3 = phi i64 [ %inc15, %do.body14 ], [ 0, %do.body14.preheader ]127 %j.3 = phi i64 [ %inc16, %do.body14 ], [ %inc10, %do.body14.preheader ]128 tail call void @goo(i64 %i.3, i64 %j.3)129 %inc15 = add nuw nsw i64 %i.3, 1130 %inc16 = add nsw i64 %j.3, 1131 %t3 = load i64, ptr @cond, align 8132 %tobool18 = icmp eq i64 %t3, 0133 br i1 %tobool18, label %do.body20.preheader, label %do.body14134 135do.body20.preheader: ; preds = %do.body14136 br label %do.body20137 138do.body20: ; preds = %do.body20.preheader, %do.body20139 %i.4 = phi i64 [ %inc21, %do.body20 ], [ 0, %do.body20.preheader ]140 %j.4 = phi i64 [ %inc22, %do.body20 ], [ %inc16, %do.body20.preheader ]141 tail call void @goo(i64 %i.4, i64 %j.4)142 %inc21 = add nuw nsw i64 %i.4, 1143 %inc22 = add nsw i64 %j.4, 1144 %t4 = load i64, ptr @cond, align 8145 %tobool24 = icmp eq i64 %t4, 0146 br i1 %tobool24, label %do.body26.preheader, label %do.body20147 148do.body26.preheader: ; preds = %do.body20149 br label %do.body26150 151do.body26: ; preds = %do.body26.preheader, %do.body26152 %i.5 = phi i64 [ %inc27, %do.body26 ], [ 0, %do.body26.preheader ]153 %j.5 = phi i64 [ %inc28, %do.body26 ], [ %inc22, %do.body26.preheader ]154 tail call void @goo(i64 %i.5, i64 %j.5)155 %inc27 = add nuw nsw i64 %i.5, 1156 %inc28 = add nsw i64 %j.5, 1157 %t5 = load i64, ptr @cond, align 8158 %tobool30 = icmp eq i64 %t5, 0159 br i1 %tobool30, label %do.end31, label %do.body26160 161do.end31: ; preds = %do.body26162 ret void163}164 165declare void @goo(i64, i64) local_unnamed_addr166 167