189 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -loop-reduce -S %s | FileCheck %s3 4; Make sure SCEVExpander does not crash and introduce unnecessary LCSSA PHI nodes.5 6define void @schedule_block(i1 %arg) {7; CHECK-LABEL: @schedule_block(8; CHECK-NEXT: entry:9; CHECK-NEXT: switch i16 0, label [[IF_END156_I:%.*]] [10; CHECK-NEXT: i16 27, label [[IF_THEN_I:%.*]]11; CHECK-NEXT: i16 28, label [[IF_THEN_I]]12; CHECK-NEXT: i16 29, label [[IF_THEN13_I:%.*]]13; CHECK-NEXT: i16 32, label [[LAND_LHS_TRUE136_I:%.*]]14; CHECK-NEXT: ]15; CHECK: if.then.i:16; CHECK-NEXT: unreachable17; CHECK: if.then13.i:18; CHECK-NEXT: unreachable19; CHECK: land.lhs.true136.i:20; CHECK-NEXT: unreachable21; CHECK: if.end156.i:22; CHECK-NEXT: switch i16 32, label [[WHILE_END256:%.*]] [23; CHECK-NEXT: i16 29, label [[IF_THEN210:%.*]]24; CHECK-NEXT: i16 28, label [[IF_THEN210]]25; CHECK-NEXT: i16 27, label [[LAND_LHS_TRUE191:%.*]]26; CHECK-NEXT: i16 32, label [[IF_END248:%.*]]27; CHECK-NEXT: ]28; CHECK: land.lhs.true191:29; CHECK-NEXT: unreachable30; CHECK: if.then210:31; CHECK-NEXT: unreachable32; CHECK: if.end248:33; CHECK-NEXT: br label [[FOR_END:%.*]]34; CHECK: while.end256:35; CHECK-NEXT: unreachable36; CHECK: for.end:37; CHECK-NEXT: br label [[WHILE_BODY1013:%.*]]38; CHECK: while.body1013:39; CHECK-NEXT: br label [[FOR_COND_I2472:%.*]]40; CHECK: for.cond.i2472:41; CHECK-NEXT: [[I_0_I:%.*]] = phi i32 [ 0, [[WHILE_BODY1013]] ], [ [[TMP2:%.*]], [[FOR_END34_I:%.*]] ]42; CHECK-NEXT: br i1 false, label [[FOR_COND3_PREHEADER_I:%.*]], label [[IF_END107_I_LOOPEXIT:%.*]]43; CHECK: for.cond3.preheader.i:44; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[I_0_I]] to i6445; CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[TMP0]], 146; CHECK-NEXT: br label [[FOR_COND3_I:%.*]]47; CHECK: for.cond3.i:48; CHECK-NEXT: [[INDVARS_IV301_I2691:%.*]] = phi i64 [ [[INDVARS_IV_NEXT302_I:%.*]], [[FOR_BODY5_I:%.*]] ], [ [[TMP1]], [[FOR_COND3_PREHEADER_I]] ]49; CHECK-NEXT: [[INDVARS_IV_NEXT302_I]] = add nsw i64 [[INDVARS_IV301_I2691]], 150; CHECK-NEXT: br label [[FOR_BODY5_I]]51; CHECK: for.body5.i:52; CHECK-NEXT: br i1 false, label [[FOR_COND3_I]], label [[FOR_BODY5_I_FOR_END_I2475_LOOPEXIT_CRIT_EDGE:%.*]]53; CHECK: for.body5.i.for.end.i2475.loopexit_crit_edge:54; CHECK-NEXT: [[TMP2]] = trunc i64 [[INDVARS_IV_NEXT302_I]] to i3255; CHECK-NEXT: br label [[FOR_END34_I]]56; CHECK: for.end34.i:57; CHECK-NEXT: br i1 false, label [[FOR_COND_I2472]], label [[IF_ELSE_I2488:%.*]]58; CHECK: if.else.i2488:59; CHECK-NEXT: br i1 [[ARG:%.*]], label [[IF_END107_I:%.*]], label [[FOR_BODY45_PREHEADER_I:%.*]]60; CHECK: for.body45.preheader.i:61; CHECK-NEXT: [[TMP3:%.*]] = sext i32 [[I_0_I]] to i6462; CHECK-NEXT: unreachable63; CHECK: if.end107.i.loopexit:64; CHECK-NEXT: br label [[IF_END107_I]]65; CHECK: if.end107.i:66; CHECK-NEXT: unreachable67;68entry:69 switch i16 0, label %if.end156.i [70 i16 27, label %if.then.i71 i16 28, label %if.then.i72 i16 29, label %if.then13.i73 i16 32, label %land.lhs.true136.i74 ]75 76if.then.i: ; preds = %entry, %entry77 unreachable78 79if.then13.i: ; preds = %entry80 unreachable81 82land.lhs.true136.i: ; preds = %entry83 unreachable84 85if.end156.i: ; preds = %entry86 switch i16 32, label %while.end256 [87 i16 29, label %if.then21088 i16 28, label %if.then21089 i16 27, label %land.lhs.true19190 i16 32, label %if.end24891 ]92 93land.lhs.true191: ; preds = %if.end156.i94 unreachable95 96if.then210: ; preds = %if.end156.i, %if.end156.i97 unreachable98 99if.end248: ; preds = %if.end156.i100 br label %for.end101 102while.end256: ; preds = %if.end156.i103 unreachable104 105for.end: ; preds = %if.end248106 br label %while.body1013107 108while.body1013: ; preds = %for.end109 br label %for.cond.i2472110 111for.cond.i2472: ; preds = %for.end34.i, %while.body1013112 %i.0.i = phi i32 [ 0, %while.body1013 ], [ %2, %for.end34.i ]113 br i1 false, label %for.cond3.preheader.i, label %if.end107.i114 115for.cond3.preheader.i: ; preds = %for.cond.i2472116 %0 = sext i32 %i.0.i to i64117 %1 = add nsw i64 %0, 1118 br label %for.cond3.i119 120for.cond3.i: ; preds = %for.body5.i, %for.cond3.preheader.i121 %indvars.iv301.i2691 = phi i64 [ %indvars.iv.next302.i, %for.body5.i ], [ %1, %for.cond3.preheader.i ]122 %indvars.iv.next302.i = add nsw i64 %indvars.iv301.i2691, 1123 br label %for.body5.i124 125for.body5.i: ; preds = %for.cond3.i126 br i1 false, label %for.cond3.i, label %for.body5.i.for.end.i2475.loopexit_crit_edge127 128for.body5.i.for.end.i2475.loopexit_crit_edge: ; preds = %for.body5.i129 %2 = trunc i64 %indvars.iv.next302.i to i32130 br label %for.end34.i131 132for.end34.i: ; preds = %for.body5.i.for.end.i2475.loopexit_crit_edge133 br i1 false, label %for.cond.i2472, label %if.else.i2488134 135if.else.i2488: ; preds = %for.end34.i136 br i1 %arg, label %if.end107.i, label %for.body45.preheader.i137 138for.body45.preheader.i: ; preds = %if.else.i2488139 %3 = sext i32 %i.0.i to i64140 unreachable141 142if.end107.i: ; preds = %if.else.i2488, %for.cond.i2472143 unreachable144}145 146define void @test_pr58007(ptr %A) {147; CHECK-LABEL: @test_pr58007(148; CHECK-NEXT: entry:149; CHECK-NEXT: br label [[LOOP_1:%.*]]150; CHECK: loop.1:151; CHECK-NEXT: [[L:%.*]] = load i16, ptr [[A:%.*]], align 2152; CHECK-NEXT: br i1 false, label [[LOOP_1]], label [[LOOP_2_HEADER_PREHEADER:%.*]]153; CHECK: loop.2.header.preheader:154; CHECK-NEXT: [[L_LCSSA:%.*]] = phi i16 [ [[L]], [[LOOP_1]] ]155; CHECK-NEXT: br label [[LOOP_2_HEADER:%.*]]156; CHECK: loop.2.header:157; CHECK-NEXT: [[P:%.*]] = phi i16 [ 1, [[LOOP_2_LATCH:%.*]] ], [ 0, [[LOOP_2_HEADER_PREHEADER]] ]158; CHECK-NEXT: [[CMP3_I:%.*]] = icmp eq i16 [[P]], 0159; CHECK-NEXT: br i1 [[CMP3_I]], label [[LOOP_2_LATCH]], label [[EXIT:%.*]]160; CHECK: loop.2.latch:161; CHECK-NEXT: br label [[LOOP_2_HEADER]]162; CHECK: exit:163; CHECK-NEXT: store i16 [[L_LCSSA]], ptr [[A]], align 2164; CHECK-NEXT: ret void165;166entry:167 br label %loop.1168 169loop.1: ; preds = %loop.1, %entry170 %l = load i16, ptr %A, align 2171 %l.dec = add nsw i16 %l, -1172 br i1 false, label %loop.1, label %loop.2.header173 174loop.2.header: ; preds = %loop.2.latch, %loop.1175 %iv = phi i16 [ %l.dec, %loop.1 ], [ %iv.next, %loop.2.latch ]176 %p = phi i16 [ 0, %loop.1 ], [ 1, %loop.2.latch ]177 %cmp3.i = icmp eq i16 %p, 0178 br i1 %cmp3.i, label %loop.2.latch, label %exit179 180loop.2.latch: ; preds = %loop.2.header181 %iv.next = add nsw i16 %iv, 1182 br label %loop.2.header183 184exit: ; preds = %loop.2.header185 %iv.lcssa = phi i16 [ %iv, %loop.2.header ]186 store i16 %iv.lcssa, ptr %A, align 2187 ret void188}189