398 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=loop-unroll -unroll-allow-partial -unroll-optsize-threshold=18 -mtriple=thumbv8 -S %s -o - | FileCheck %s --check-prefix=CHECK-V83 4define void @test_i32_add_optsize(ptr %a, ptr %b, ptr %c) #0 {5; CHECK-V8-LABEL: @test_i32_add_optsize(6; CHECK-V8-NEXT: entry:7; CHECK-V8-NEXT: br label [[LOOP:%.*]]8; CHECK-V8: loop:9; CHECK-V8-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[COUNT_1:%.*]], [[LOOP]] ]10; CHECK-V8-NEXT: [[ADDR_A:%.*]] = getelementptr i32, ptr [[A:%.*]], i32 [[IV]]11; CHECK-V8-NEXT: [[ADDR_B:%.*]] = getelementptr i32, ptr [[B:%.*]], i32 [[IV]]12; CHECK-V8-NEXT: [[DATA_A:%.*]] = load i32, ptr [[ADDR_A]], align 413; CHECK-V8-NEXT: [[DATA_B:%.*]] = load i32, ptr [[ADDR_B]], align 414; CHECK-V8-NEXT: [[RES:%.*]] = add i32 [[DATA_A]], [[DATA_B]]15; CHECK-V8-NEXT: [[ADDR_C:%.*]] = getelementptr i32, ptr [[C:%.*]], i32 [[IV]]16; CHECK-V8-NEXT: store i32 [[RES]], ptr [[ADDR_C]], align 417; CHECK-V8-NEXT: [[COUNT:%.*]] = add nuw nsw i32 [[IV]], 118; CHECK-V8-NEXT: [[ADDR_A_1:%.*]] = getelementptr i32, ptr [[A]], i32 [[COUNT]]19; CHECK-V8-NEXT: [[ADDR_B_1:%.*]] = getelementptr i32, ptr [[B]], i32 [[COUNT]]20; CHECK-V8-NEXT: [[DATA_A_1:%.*]] = load i32, ptr [[ADDR_A_1]], align 421; CHECK-V8-NEXT: [[DATA_B_1:%.*]] = load i32, ptr [[ADDR_B_1]], align 422; CHECK-V8-NEXT: [[RES_1:%.*]] = add i32 [[DATA_A_1]], [[DATA_B_1]]23; CHECK-V8-NEXT: [[ADDR_C_1:%.*]] = getelementptr i32, ptr [[C]], i32 [[COUNT]]24; CHECK-V8-NEXT: store i32 [[RES_1]], ptr [[ADDR_C_1]], align 425; CHECK-V8-NEXT: [[COUNT_1]] = add nuw nsw i32 [[IV]], 226; CHECK-V8-NEXT: [[END_1:%.*]] = icmp ne i32 [[COUNT_1]], 10027; CHECK-V8-NEXT: br i1 [[END_1]], label [[LOOP]], label [[EXIT:%.*]]28; CHECK-V8: exit:29; CHECK-V8-NEXT: ret void30;31entry:32 br label %loop33 34loop:35 %iv = phi i32 [ 0, %entry ], [ %count, %loop ]36 %addr.a = getelementptr i32, ptr %a, i32 %iv37 %addr.b = getelementptr i32, ptr %b, i32 %iv38 %data.a = load i32, ptr %addr.a39 %data.b = load i32, ptr %addr.b40 %res = add i32 %data.a, %data.b41 %addr.c = getelementptr i32, ptr %c, i32 %iv42 store i32 %res, ptr %addr.c43 %count = add nuw i32 %iv, 144 %end = icmp ne i32 %count, 10045 br i1 %end, label %loop, label %exit46 47exit:48 ret void49}50 51define void @test_i32_add_minsize(ptr %a, ptr %b, ptr %c) #1 {52; CHECK-V8-LABEL: @test_i32_add_minsize(53; CHECK-V8-NEXT: entry:54; CHECK-V8-NEXT: br label [[LOOP:%.*]]55; CHECK-V8: loop:56; CHECK-V8-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[COUNT_1:%.*]], [[LOOP]] ]57; CHECK-V8-NEXT: [[ADDR_A:%.*]] = getelementptr i32, ptr [[A:%.*]], i32 [[IV]]58; CHECK-V8-NEXT: [[ADDR_B:%.*]] = getelementptr i32, ptr [[B:%.*]], i32 [[IV]]59; CHECK-V8-NEXT: [[DATA_A:%.*]] = load i32, ptr [[ADDR_A]], align 460; CHECK-V8-NEXT: [[DATA_B:%.*]] = load i32, ptr [[ADDR_B]], align 461; CHECK-V8-NEXT: [[RES:%.*]] = add i32 [[DATA_A]], [[DATA_B]]62; CHECK-V8-NEXT: [[ADDR_C:%.*]] = getelementptr i32, ptr [[C:%.*]], i32 [[IV]]63; CHECK-V8-NEXT: store i32 [[RES]], ptr [[ADDR_C]], align 464; CHECK-V8-NEXT: [[COUNT:%.*]] = add nuw nsw i32 [[IV]], 165; CHECK-V8-NEXT: [[ADDR_A_1:%.*]] = getelementptr i32, ptr [[A]], i32 [[COUNT]]66; CHECK-V8-NEXT: [[ADDR_B_1:%.*]] = getelementptr i32, ptr [[B]], i32 [[COUNT]]67; CHECK-V8-NEXT: [[DATA_A_1:%.*]] = load i32, ptr [[ADDR_A_1]], align 468; CHECK-V8-NEXT: [[DATA_B_1:%.*]] = load i32, ptr [[ADDR_B_1]], align 469; CHECK-V8-NEXT: [[RES_1:%.*]] = add i32 [[DATA_A_1]], [[DATA_B_1]]70; CHECK-V8-NEXT: [[ADDR_C_1:%.*]] = getelementptr i32, ptr [[C]], i32 [[COUNT]]71; CHECK-V8-NEXT: store i32 [[RES_1]], ptr [[ADDR_C_1]], align 472; CHECK-V8-NEXT: [[COUNT_1]] = add nuw nsw i32 [[IV]], 273; CHECK-V8-NEXT: [[END_1:%.*]] = icmp ne i32 [[COUNT_1]], 10074; CHECK-V8-NEXT: br i1 [[END_1]], label [[LOOP]], label [[EXIT:%.*]]75; CHECK-V8: exit:76; CHECK-V8-NEXT: ret void77;78entry:79 br label %loop80 81loop:82 %iv = phi i32 [ 0, %entry ], [ %count, %loop ]83 %addr.a = getelementptr i32, ptr %a, i32 %iv84 %addr.b = getelementptr i32, ptr %b, i32 %iv85 %data.a = load i32, ptr %addr.a86 %data.b = load i32, ptr %addr.b87 %res = add i32 %data.a, %data.b88 %addr.c = getelementptr i32, ptr %c, i32 %iv89 store i32 %res, ptr %addr.c90 %count = add nuw i32 %iv, 191 %end = icmp ne i32 %count, 10092 br i1 %end, label %loop, label %exit93 94exit:95 ret void96}97 98define void @test_i64_add_optsize(ptr %a, ptr %b, ptr %c) #0 {99; CHECK-V8-LABEL: @test_i64_add_optsize(100; CHECK-V8-NEXT: entry:101; CHECK-V8-NEXT: br label [[LOOP:%.*]]102; CHECK-V8: loop:103; CHECK-V8-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[COUNT_1:%.*]], [[LOOP]] ]104; CHECK-V8-NEXT: [[ADDR_A:%.*]] = getelementptr i64, ptr [[A:%.*]], i32 [[IV]]105; CHECK-V8-NEXT: [[ADDR_B:%.*]] = getelementptr i64, ptr [[B:%.*]], i32 [[IV]]106; CHECK-V8-NEXT: [[DATA_A:%.*]] = load i64, ptr [[ADDR_A]], align 8107; CHECK-V8-NEXT: [[DATA_B:%.*]] = load i64, ptr [[ADDR_B]], align 8108; CHECK-V8-NEXT: [[RES:%.*]] = add i64 [[DATA_A]], [[DATA_B]]109; CHECK-V8-NEXT: [[ADDR_C:%.*]] = getelementptr i64, ptr [[C:%.*]], i32 [[IV]]110; CHECK-V8-NEXT: store i64 [[RES]], ptr [[ADDR_C]], align 8111; CHECK-V8-NEXT: [[COUNT:%.*]] = add nuw nsw i32 [[IV]], 1112; CHECK-V8-NEXT: [[ADDR_A_1:%.*]] = getelementptr i64, ptr [[A]], i32 [[COUNT]]113; CHECK-V8-NEXT: [[ADDR_B_1:%.*]] = getelementptr i64, ptr [[B]], i32 [[COUNT]]114; CHECK-V8-NEXT: [[DATA_A_1:%.*]] = load i64, ptr [[ADDR_A_1]], align 8115; CHECK-V8-NEXT: [[DATA_B_1:%.*]] = load i64, ptr [[ADDR_B_1]], align 8116; CHECK-V8-NEXT: [[RES_1:%.*]] = add i64 [[DATA_A_1]], [[DATA_B_1]]117; CHECK-V8-NEXT: [[ADDR_C_1:%.*]] = getelementptr i64, ptr [[C]], i32 [[COUNT]]118; CHECK-V8-NEXT: store i64 [[RES_1]], ptr [[ADDR_C_1]], align 8119; CHECK-V8-NEXT: [[COUNT_1]] = add nuw nsw i32 [[IV]], 2120; CHECK-V8-NEXT: [[END_1:%.*]] = icmp ne i32 [[COUNT_1]], 100121; CHECK-V8-NEXT: br i1 [[END_1]], label [[LOOP]], label [[EXIT:%.*]]122; CHECK-V8: exit:123; CHECK-V8-NEXT: ret void124;125entry:126 br label %loop127 128loop:129 %iv = phi i32 [ 0, %entry ], [ %count, %loop ]130 %addr.a = getelementptr i64, ptr %a, i32 %iv131 %addr.b = getelementptr i64, ptr %b, i32 %iv132 %data.a = load i64, ptr %addr.a133 %data.b = load i64, ptr %addr.b134 %res = add i64 %data.a, %data.b135 %addr.c = getelementptr i64, ptr %c, i32 %iv136 store i64 %res, ptr %addr.c137 %count = add nuw i32 %iv, 1138 %end = icmp ne i32 %count, 100139 br i1 %end, label %loop, label %exit140 141exit:142 ret void143}144 145define void @test_i64_add_minsize(ptr %a, ptr %b, ptr %c) #1 {146; CHECK-V8-LABEL: @test_i64_add_minsize(147; CHECK-V8-NEXT: entry:148; CHECK-V8-NEXT: br label [[LOOP:%.*]]149; CHECK-V8: loop:150; CHECK-V8-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[COUNT_1:%.*]], [[LOOP]] ]151; CHECK-V8-NEXT: [[ADDR_A:%.*]] = getelementptr i64, ptr [[A:%.*]], i32 [[IV]]152; CHECK-V8-NEXT: [[ADDR_B:%.*]] = getelementptr i64, ptr [[B:%.*]], i32 [[IV]]153; CHECK-V8-NEXT: [[DATA_A:%.*]] = load i64, ptr [[ADDR_A]], align 8154; CHECK-V8-NEXT: [[DATA_B:%.*]] = load i64, ptr [[ADDR_B]], align 8155; CHECK-V8-NEXT: [[RES:%.*]] = add i64 [[DATA_A]], [[DATA_B]]156; CHECK-V8-NEXT: [[ADDR_C:%.*]] = getelementptr i64, ptr [[C:%.*]], i32 [[IV]]157; CHECK-V8-NEXT: store i64 [[RES]], ptr [[ADDR_C]], align 8158; CHECK-V8-NEXT: [[COUNT:%.*]] = add nuw nsw i32 [[IV]], 1159; CHECK-V8-NEXT: [[ADDR_A_1:%.*]] = getelementptr i64, ptr [[A]], i32 [[COUNT]]160; CHECK-V8-NEXT: [[ADDR_B_1:%.*]] = getelementptr i64, ptr [[B]], i32 [[COUNT]]161; CHECK-V8-NEXT: [[DATA_A_1:%.*]] = load i64, ptr [[ADDR_A_1]], align 8162; CHECK-V8-NEXT: [[DATA_B_1:%.*]] = load i64, ptr [[ADDR_B_1]], align 8163; CHECK-V8-NEXT: [[RES_1:%.*]] = add i64 [[DATA_A_1]], [[DATA_B_1]]164; CHECK-V8-NEXT: [[ADDR_C_1:%.*]] = getelementptr i64, ptr [[C]], i32 [[COUNT]]165; CHECK-V8-NEXT: store i64 [[RES_1]], ptr [[ADDR_C_1]], align 8166; CHECK-V8-NEXT: [[COUNT_1]] = add nuw nsw i32 [[IV]], 2167; CHECK-V8-NEXT: [[END_1:%.*]] = icmp ne i32 [[COUNT_1]], 100168; CHECK-V8-NEXT: br i1 [[END_1]], label [[LOOP]], label [[EXIT:%.*]]169; CHECK-V8: exit:170; CHECK-V8-NEXT: ret void171;172entry:173 br label %loop174 175loop:176 %iv = phi i32 [ 0, %entry ], [ %count, %loop ]177 %addr.a = getelementptr i64, ptr %a, i32 %iv178 %addr.b = getelementptr i64, ptr %b, i32 %iv179 %data.a = load i64, ptr %addr.a180 %data.b = load i64, ptr %addr.b181 %res = add i64 %data.a, %data.b182 %addr.c = getelementptr i64, ptr %c, i32 %iv183 store i64 %res, ptr %addr.c184 %count = add nuw i32 %iv, 1185 %end = icmp ne i32 %count, 100186 br i1 %end, label %loop, label %exit187 188exit:189 ret void190}191 192define i32 @test_i32_select_optsize(ptr %a, ptr %b, ptr %c) #0 {193; CHECK-V8-LABEL: @test_i32_select_optsize(194; CHECK-V8-NEXT: entry:195; CHECK-V8-NEXT: br label [[LOOP:%.*]]196; CHECK-V8: loop:197; CHECK-V8-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[COUNT_1:%.*]], [[LOOP]] ]198; CHECK-V8-NEXT: [[ACC:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[ACC_NEXT_1:%.*]], [[LOOP]] ]199; CHECK-V8-NEXT: [[ADDR_A:%.*]] = getelementptr i32, ptr [[A:%.*]], i32 [[IV]]200; CHECK-V8-NEXT: [[ADDR_B:%.*]] = getelementptr i32, ptr [[B:%.*]], i32 [[IV]]201; CHECK-V8-NEXT: [[DATA_A:%.*]] = load i32, ptr [[ADDR_A]], align 4202; CHECK-V8-NEXT: [[DATA_B:%.*]] = load i32, ptr [[ADDR_B]], align 4203; CHECK-V8-NEXT: [[UGT:%.*]] = icmp ugt i32 [[DATA_A]], [[DATA_B]]204; CHECK-V8-NEXT: [[UMAX:%.*]] = select i1 [[UGT]], i32 [[DATA_A]], i32 [[DATA_B]]205; CHECK-V8-NEXT: [[ACC_NEXT:%.*]] = add i32 [[UMAX]], [[ACC]]206; CHECK-V8-NEXT: [[ADDR_C:%.*]] = getelementptr i32, ptr [[C:%.*]], i32 [[IV]]207; CHECK-V8-NEXT: store i32 [[UMAX]], ptr [[ADDR_C]], align 4208; CHECK-V8-NEXT: [[COUNT:%.*]] = add nuw nsw i32 [[IV]], 1209; CHECK-V8-NEXT: [[ADDR_A_1:%.*]] = getelementptr i32, ptr [[A]], i32 [[COUNT]]210; CHECK-V8-NEXT: [[ADDR_B_1:%.*]] = getelementptr i32, ptr [[B]], i32 [[COUNT]]211; CHECK-V8-NEXT: [[DATA_A_1:%.*]] = load i32, ptr [[ADDR_A_1]], align 4212; CHECK-V8-NEXT: [[DATA_B_1:%.*]] = load i32, ptr [[ADDR_B_1]], align 4213; CHECK-V8-NEXT: [[UGT_1:%.*]] = icmp ugt i32 [[DATA_A_1]], [[DATA_B_1]]214; CHECK-V8-NEXT: [[UMAX_1:%.*]] = select i1 [[UGT_1]], i32 [[DATA_A_1]], i32 [[DATA_B_1]]215; CHECK-V8-NEXT: [[ACC_NEXT_1]] = add i32 [[UMAX_1]], [[ACC_NEXT]]216; CHECK-V8-NEXT: [[ADDR_C_1:%.*]] = getelementptr i32, ptr [[C]], i32 [[COUNT]]217; CHECK-V8-NEXT: store i32 [[UMAX_1]], ptr [[ADDR_C_1]], align 4218; CHECK-V8-NEXT: [[COUNT_1]] = add nuw nsw i32 [[IV]], 2219; CHECK-V8-NEXT: [[END_1:%.*]] = icmp ne i32 [[COUNT_1]], 100220; CHECK-V8-NEXT: br i1 [[END_1]], label [[LOOP]], label [[EXIT:%.*]]221; CHECK-V8: exit:222; CHECK-V8-NEXT: [[ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[ACC_NEXT_1]], [[LOOP]] ]223; CHECK-V8-NEXT: ret i32 [[ACC_NEXT_LCSSA]]224;225entry:226 br label %loop227 228loop:229 %iv = phi i32 [ 0, %entry ], [ %count, %loop ]230 %acc = phi i32 [ 0, %entry], [ %acc.next, %loop ]231 %addr.a = getelementptr i32, ptr %a, i32 %iv232 %addr.b = getelementptr i32, ptr %b, i32 %iv233 %data.a = load i32, ptr %addr.a234 %data.b = load i32, ptr %addr.b235 %ugt = icmp ugt i32 %data.a, %data.b236 %umax = select i1 %ugt, i32 %data.a, i32 %data.b237 %acc.next = add i32 %umax, %acc238 %addr.c = getelementptr i32, ptr %c, i32 %iv239 store i32 %umax, ptr %addr.c240 %count = add nuw i32 %iv, 1241 %end = icmp ne i32 %count, 100242 br i1 %end, label %loop, label %exit243 244exit:245 ret i32 %acc.next246}247 248define i32 @test_i32_select_minsize(ptr %a, ptr %b, ptr %c) #1 {249; CHECK-V8-LABEL: @test_i32_select_minsize(250; CHECK-V8-NEXT: entry:251; CHECK-V8-NEXT: br label [[LOOP:%.*]]252; CHECK-V8: loop:253; CHECK-V8-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[COUNT_1:%.*]], [[LOOP]] ]254; CHECK-V8-NEXT: [[ACC:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[ACC_NEXT_1:%.*]], [[LOOP]] ]255; CHECK-V8-NEXT: [[ADDR_A:%.*]] = getelementptr i32, ptr [[A:%.*]], i32 [[IV]]256; CHECK-V8-NEXT: [[ADDR_B:%.*]] = getelementptr i32, ptr [[B:%.*]], i32 [[IV]]257; CHECK-V8-NEXT: [[DATA_A:%.*]] = load i32, ptr [[ADDR_A]], align 4258; CHECK-V8-NEXT: [[DATA_B:%.*]] = load i32, ptr [[ADDR_B]], align 4259; CHECK-V8-NEXT: [[UGT:%.*]] = icmp ugt i32 [[DATA_A]], [[DATA_B]]260; CHECK-V8-NEXT: [[UMAX:%.*]] = select i1 [[UGT]], i32 [[DATA_A]], i32 [[DATA_B]]261; CHECK-V8-NEXT: [[ACC_NEXT:%.*]] = add i32 [[UMAX]], [[ACC]]262; CHECK-V8-NEXT: [[ADDR_C:%.*]] = getelementptr i32, ptr [[C:%.*]], i32 [[IV]]263; CHECK-V8-NEXT: store i32 [[UMAX]], ptr [[ADDR_C]], align 4264; CHECK-V8-NEXT: [[COUNT:%.*]] = add nuw nsw i32 [[IV]], 1265; CHECK-V8-NEXT: [[ADDR_A_1:%.*]] = getelementptr i32, ptr [[A]], i32 [[COUNT]]266; CHECK-V8-NEXT: [[ADDR_B_1:%.*]] = getelementptr i32, ptr [[B]], i32 [[COUNT]]267; CHECK-V8-NEXT: [[DATA_A_1:%.*]] = load i32, ptr [[ADDR_A_1]], align 4268; CHECK-V8-NEXT: [[DATA_B_1:%.*]] = load i32, ptr [[ADDR_B_1]], align 4269; CHECK-V8-NEXT: [[UGT_1:%.*]] = icmp ugt i32 [[DATA_A_1]], [[DATA_B_1]]270; CHECK-V8-NEXT: [[UMAX_1:%.*]] = select i1 [[UGT_1]], i32 [[DATA_A_1]], i32 [[DATA_B_1]]271; CHECK-V8-NEXT: [[ACC_NEXT_1]] = add i32 [[UMAX_1]], [[ACC_NEXT]]272; CHECK-V8-NEXT: [[ADDR_C_1:%.*]] = getelementptr i32, ptr [[C]], i32 [[COUNT]]273; CHECK-V8-NEXT: store i32 [[UMAX_1]], ptr [[ADDR_C_1]], align 4274; CHECK-V8-NEXT: [[COUNT_1]] = add nuw nsw i32 [[IV]], 2275; CHECK-V8-NEXT: [[END_1:%.*]] = icmp ne i32 [[COUNT_1]], 100276; CHECK-V8-NEXT: br i1 [[END_1]], label [[LOOP]], label [[EXIT:%.*]]277; CHECK-V8: exit:278; CHECK-V8-NEXT: [[ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[ACC_NEXT_1]], [[LOOP]] ]279; CHECK-V8-NEXT: ret i32 [[ACC_NEXT_LCSSA]]280;281entry:282 br label %loop283 284loop:285 %iv = phi i32 [ 0, %entry ], [ %count, %loop ]286 %acc = phi i32 [ 0, %entry], [ %acc.next, %loop ]287 %addr.a = getelementptr i32, ptr %a, i32 %iv288 %addr.b = getelementptr i32, ptr %b, i32 %iv289 %data.a = load i32, ptr %addr.a290 %data.b = load i32, ptr %addr.b291 %ugt = icmp ugt i32 %data.a, %data.b292 %umax = select i1 %ugt, i32 %data.a, i32 %data.b293 %acc.next = add i32 %umax, %acc294 %addr.c = getelementptr i32, ptr %c, i32 %iv295 store i32 %umax, ptr %addr.c296 %count = add nuw i32 %iv, 1297 %end = icmp ne i32 %count, 100298 br i1 %end, label %loop, label %exit299 300exit:301 ret i32 %acc.next302}303 304define i64 @test_i64_select_optsize(ptr %a, ptr %b, ptr %c) #0 {305; CHECK-V8-LABEL: @test_i64_select_optsize(306; CHECK-V8-NEXT: entry:307; CHECK-V8-NEXT: br label [[LOOP:%.*]]308; CHECK-V8: loop:309; CHECK-V8-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[COUNT:%.*]], [[LOOP]] ]310; CHECK-V8-NEXT: [[ACC:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[ACC_NEXT:%.*]], [[LOOP]] ]311; CHECK-V8-NEXT: [[ADDR_A:%.*]] = getelementptr i64, ptr [[A:%.*]], i32 [[IV]]312; CHECK-V8-NEXT: [[ADDR_B:%.*]] = getelementptr i64, ptr [[B:%.*]], i32 [[IV]]313; CHECK-V8-NEXT: [[DATA_A:%.*]] = load i64, ptr [[ADDR_A]], align 8314; CHECK-V8-NEXT: [[DATA_B:%.*]] = load i64, ptr [[ADDR_B]], align 8315; CHECK-V8-NEXT: [[UGT:%.*]] = icmp ugt i64 [[DATA_A]], [[DATA_B]]316; CHECK-V8-NEXT: [[UMAX:%.*]] = select i1 [[UGT]], i64 [[DATA_A]], i64 [[DATA_B]]317; CHECK-V8-NEXT: [[ACC_NEXT]] = add i64 [[UMAX]], [[ACC]]318; CHECK-V8-NEXT: [[ADDR_C:%.*]] = getelementptr i64, ptr [[C:%.*]], i32 [[IV]]319; CHECK-V8-NEXT: store i64 [[UMAX]], ptr [[ADDR_C]], align 8320; CHECK-V8-NEXT: [[COUNT]] = add nuw i32 [[IV]], 1321; CHECK-V8-NEXT: [[END:%.*]] = icmp ne i32 [[COUNT]], 100322; CHECK-V8-NEXT: br i1 [[END]], label [[LOOP]], label [[EXIT:%.*]]323; CHECK-V8: exit:324; CHECK-V8-NEXT: [[ACC_NEXT_LCSSA:%.*]] = phi i64 [ [[ACC_NEXT]], [[LOOP]] ]325; CHECK-V8-NEXT: ret i64 [[ACC_NEXT_LCSSA]]326;327entry:328 br label %loop329 330loop:331 %iv = phi i32 [ 0, %entry ], [ %count, %loop ]332 %acc = phi i64 [ 0, %entry], [ %acc.next, %loop ]333 %addr.a = getelementptr i64, ptr %a, i32 %iv334 %addr.b = getelementptr i64, ptr %b, i32 %iv335 %data.a = load i64, ptr %addr.a336 %data.b = load i64, ptr %addr.b337 %ugt = icmp ugt i64 %data.a, %data.b338 %umax = select i1 %ugt, i64 %data.a, i64 %data.b339 %acc.next = add i64 %umax, %acc340 %addr.c = getelementptr i64, ptr %c, i32 %iv341 store i64 %umax, ptr %addr.c342 %count = add nuw i32 %iv, 1343 %end = icmp ne i32 %count, 100344 br i1 %end, label %loop, label %exit345 346exit:347 ret i64 %acc.next348}349 350define i64 @test_i64_select_minsize(ptr %a, ptr %b, ptr %c) #1 {351; CHECK-V8-LABEL: @test_i64_select_minsize(352; CHECK-V8-NEXT: entry:353; CHECK-V8-NEXT: br label [[LOOP:%.*]]354; CHECK-V8: loop:355; CHECK-V8-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[COUNT:%.*]], [[LOOP]] ]356; CHECK-V8-NEXT: [[ACC:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[ACC_NEXT:%.*]], [[LOOP]] ]357; CHECK-V8-NEXT: [[ADDR_A:%.*]] = getelementptr i64, ptr [[A:%.*]], i32 [[IV]]358; CHECK-V8-NEXT: [[ADDR_B:%.*]] = getelementptr i64, ptr [[B:%.*]], i32 [[IV]]359; CHECK-V8-NEXT: [[DATA_A:%.*]] = load i64, ptr [[ADDR_A]], align 8360; CHECK-V8-NEXT: [[DATA_B:%.*]] = load i64, ptr [[ADDR_B]], align 8361; CHECK-V8-NEXT: [[UGT:%.*]] = icmp ugt i64 [[DATA_A]], [[DATA_B]]362; CHECK-V8-NEXT: [[UMAX:%.*]] = select i1 [[UGT]], i64 [[DATA_A]], i64 [[DATA_B]]363; CHECK-V8-NEXT: [[ACC_NEXT]] = add i64 [[UMAX]], [[ACC]]364; CHECK-V8-NEXT: [[ADDR_C:%.*]] = getelementptr i64, ptr [[C:%.*]], i32 [[IV]]365; CHECK-V8-NEXT: store i64 [[UMAX]], ptr [[ADDR_C]], align 8366; CHECK-V8-NEXT: [[COUNT]] = add nuw i32 [[IV]], 1367; CHECK-V8-NEXT: [[END:%.*]] = icmp ne i32 [[COUNT]], 100368; CHECK-V8-NEXT: br i1 [[END]], label [[LOOP]], label [[EXIT:%.*]]369; CHECK-V8: exit:370; CHECK-V8-NEXT: [[ACC_NEXT_LCSSA:%.*]] = phi i64 [ [[ACC_NEXT]], [[LOOP]] ]371; CHECK-V8-NEXT: ret i64 [[ACC_NEXT_LCSSA]]372;373entry:374 br label %loop375 376loop:377 %iv = phi i32 [ 0, %entry ], [ %count, %loop ]378 %acc = phi i64 [ 0, %entry], [ %acc.next, %loop ]379 %addr.a = getelementptr i64, ptr %a, i32 %iv380 %addr.b = getelementptr i64, ptr %b, i32 %iv381 %data.a = load i64, ptr %addr.a382 %data.b = load i64, ptr %addr.b383 %ugt = icmp ugt i64 %data.a, %data.b384 %umax = select i1 %ugt, i64 %data.a, i64 %data.b385 %acc.next = add i64 %umax, %acc386 %addr.c = getelementptr i64, ptr %c, i32 %iv387 store i64 %umax, ptr %addr.c388 %count = add nuw i32 %iv, 1389 %end = icmp ne i32 %count, 100390 br i1 %end, label %loop, label %exit391 392exit:393 ret i64 %acc.next394}395 396attributes #0 = { optsize }397attributes #1 = { minsize optsize }398