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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -S -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 -passes=loop-unroll | FileCheck %s3; RUN: opt < %s -S -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 -passes=loop-unroll | FileCheck %s4 5target datalayout = "e-m:e-i64:64-n32:64"6target triple = "powerpc64le-unknown-linux-gnu"7 8; Function Attrs: norecurse nounwind9define ptr @f(ptr returned %s, i32 zeroext %x, i32 signext %k) local_unnamed_addr #0 {10; CHECK-LABEL: @f(11; CHECK-NEXT: entry:12; CHECK-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[K:%.*]], 013; CHECK-NEXT: br i1 [[CMP10]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_END:%.*]]14; CHECK: for.body.lr.ph:15; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[K]] to i6416; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[K]], 1617; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[FOR_BODY_PREHEADER:%.*]], label [[VECTOR_PH:%.*]]18; CHECK: vector.ph:19; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[WIDE_TRIP_COUNT]], 429496728020; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <16 x i32> undef, i32 [[X:%.*]], i32 021; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <16 x i32> [[BROADCAST_SPLATINSERT]], <16 x i32> undef, <16 x i32> zeroinitializer22; CHECK-NEXT: [[TMP0:%.*]] = add nsw i64 [[N_VEC]], -1623; CHECK-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 424; CHECK-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 125; CHECK-NEXT: [[XTRAITER:%.*]] = and i64 [[TMP2]], 126; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i64 [[TMP1]], 127; CHECK-NEXT: br i1 [[TMP3]], label [[MIDDLE_BLOCK_UNR_LCSSA:%.*]], label [[VECTOR_PH_NEW:%.*]]28; CHECK: vector.ph.new:29; CHECK-NEXT: [[UNROLL_ITER:%.*]] = sub i64 [[TMP2]], [[XTRAITER]]30; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]31; CHECK: vector.body:32; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH_NEW]] ], [ [[INDEX_NEXT_1:%.*]], [[VECTOR_BODY]] ]33; CHECK-NEXT: [[VEC_IND12:%.*]] = phi <16 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>, [[VECTOR_PH_NEW]] ], [ [[VEC_IND_NEXT13_1:%.*]], [[VECTOR_BODY]] ]34; CHECK-NEXT: [[NITER:%.*]] = phi i64 [ 0, [[VECTOR_PH_NEW]] ], [ [[NITER_NEXT_1:%.*]], [[VECTOR_BODY]] ]35; CHECK-NEXT: [[TMP4:%.*]] = shl <16 x i32> splat (i32 1), [[VEC_IND12]]36; CHECK-NEXT: [[TMP5:%.*]] = and <16 x i32> [[TMP4]], [[BROADCAST_SPLAT]]37; CHECK-NEXT: [[TMP6:%.*]] = icmp eq <16 x i32> [[TMP5]], zeroinitializer38; CHECK-NEXT: [[TMP7:%.*]] = select <16 x i1> [[TMP6]], <16 x i8> splat (i8 48), <16 x i8> splat (i8 49)39; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i8, ptr [[S:%.*]], i64 [[INDEX]]40; CHECK-NEXT: store <16 x i8> [[TMP7]], ptr [[TMP8]], align 141; CHECK-NEXT: [[INDEX_NEXT:%.*]] = add nuw nsw i64 [[INDEX]], 1642; CHECK-NEXT: [[VEC_IND_NEXT13:%.*]] = add <16 x i32> [[VEC_IND12]], splat (i32 16)43; CHECK-NEXT: [[TMP9:%.*]] = shl <16 x i32> splat (i32 1), [[VEC_IND_NEXT13]]44; CHECK-NEXT: [[TMP10:%.*]] = and <16 x i32> [[TMP9]], [[BROADCAST_SPLAT]]45; CHECK-NEXT: [[TMP11:%.*]] = icmp eq <16 x i32> [[TMP10]], zeroinitializer46; CHECK-NEXT: [[TMP12:%.*]] = select <16 x i1> [[TMP11]], <16 x i8> splat (i8 48), <16 x i8> splat (i8 49)47; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds i8, ptr [[S]], i64 [[INDEX_NEXT]]48; CHECK-NEXT: store <16 x i8> [[TMP12]], ptr [[TMP13]], align 149; CHECK-NEXT: [[INDEX_NEXT_1]] = add i64 [[INDEX]], 3250; CHECK-NEXT: [[VEC_IND_NEXT13_1]] = add <16 x i32> [[VEC_IND12]], splat (i32 32)51; CHECK-NEXT: [[NITER_NEXT_1]] = add i64 [[NITER]], 252; CHECK-NEXT: [[NITER_NCMP_1:%.*]] = icmp eq i64 [[NITER_NEXT_1]], [[UNROLL_ITER]]53; CHECK-NEXT: br i1 [[NITER_NCMP_1]], label [[MIDDLE_BLOCK_UNR_LCSSA_LOOPEXIT:%.*]], label [[VECTOR_BODY]]54; CHECK: middle.block.unr-lcssa:55; CHECK-NEXT: [[INDEX_UNR_PH:%.*]] = phi i64 [ [[INDEX_NEXT_1]], [[VECTOR_BODY]] ]56; CHECK-NEXT: [[VEC_IND12_UNR_PH:%.*]] = phi <16 x i32> [ [[VEC_IND_NEXT13_1]], [[VECTOR_BODY]] ]57; CHECK-NEXT: [[LCMP_MOD:%.*]] = icmp ne i64 [[XTRAITER]], 058; CHECK-NEXT: br i1 [[LCMP_MOD]], label [[MIDDLE_BLOCK_UNR_LCSSA]], label [[MIDDLE_BLOCK:%.*]]59; CHECK: vector.body.epil.preheader:60; CHECK-NEXT: [[INDEX_UNR:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_UNR_PH]], [[MIDDLE_BLOCK_UNR_LCSSA_LOOPEXIT]] ]61; CHECK-NEXT: [[VEC_IND12_UNR:%.*]] = phi <16 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>, [[VECTOR_PH]] ], [ [[VEC_IND12_UNR_PH]], [[MIDDLE_BLOCK_UNR_LCSSA_LOOPEXIT]] ]62; CHECK-NEXT: [[LCMP_MOD1:%.*]] = icmp ne i64 [[XTRAITER]], 063; CHECK-NEXT: call void @llvm.assume(i1 [[LCMP_MOD1]])64; CHECK-NEXT: br label [[VECTOR_BODY_EPIL:%.*]]65; CHECK: vector.body.epil:66; CHECK-NEXT: [[TMP14:%.*]] = shl <16 x i32> splat (i32 1), [[VEC_IND12_UNR]]67; CHECK-NEXT: [[TMP15:%.*]] = and <16 x i32> [[TMP14]], [[BROADCAST_SPLAT]]68; CHECK-NEXT: [[TMP16:%.*]] = icmp eq <16 x i32> [[TMP15]], zeroinitializer69; CHECK-NEXT: [[TMP17:%.*]] = select <16 x i1> [[TMP16]], <16 x i8> splat (i8 48), <16 x i8> splat (i8 49)70; CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds i8, ptr [[S]], i64 [[INDEX_UNR]]71; CHECK-NEXT: store <16 x i8> [[TMP17]], ptr [[TMP18]], align 172; CHECK-NEXT: br label [[MIDDLE_BLOCK]]73; CHECK: middle.block:74; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[WIDE_TRIP_COUNT]]75; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END]], label [[FOR_BODY_PREHEADER]]76; CHECK: for.body.preheader:77; CHECK-NEXT: [[INDVARS_IV_PH:%.*]] = phi i64 [ 0, [[FOR_BODY_LR_PH]] ], [ [[N_VEC]], [[MIDDLE_BLOCK]] ]78; CHECK-NEXT: [[TMP19:%.*]] = sub i64 [[WIDE_TRIP_COUNT]], [[INDVARS_IV_PH]]79; CHECK-NEXT: [[TMP20:%.*]] = add i64 [[WIDE_TRIP_COUNT]], -180; CHECK-NEXT: [[TMP21:%.*]] = sub i64 [[TMP20]], [[INDVARS_IV_PH]]81; CHECK-NEXT: [[XTRAITER1:%.*]] = and i64 [[TMP19]], 782; CHECK-NEXT: [[LCMP_MOD2:%.*]] = icmp ne i64 [[XTRAITER1]], 083; CHECK-NEXT: br i1 [[LCMP_MOD2]], label [[FOR_BODY_PROL_PREHEADER:%.*]], label [[FOR_BODY_PROL_LOOPEXIT:%.*]]84; CHECK: for.body.prol.preheader:85; CHECK-NEXT: br label [[FOR_BODY_PROL:%.*]]86; CHECK: for.body.prol:87; CHECK-NEXT: [[INDVARS_IV_PROL:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_PROL:%.*]], [[FOR_BODY_PROL]] ], [ [[INDVARS_IV_PH]], [[FOR_BODY_PROL_PREHEADER]] ]88; CHECK-NEXT: [[PROL_ITER:%.*]] = phi i64 [ 0, [[FOR_BODY_PROL_PREHEADER]] ], [ [[PROL_ITER_NEXT:%.*]], [[FOR_BODY_PROL]] ]89; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[INDVARS_IV_PROL]] to i3290; CHECK-NEXT: [[SHL_PROL:%.*]] = shl i32 1, [[TMP22]]91; CHECK-NEXT: [[AND_PROL:%.*]] = and i32 [[SHL_PROL]], [[X]]92; CHECK-NEXT: [[TOBOOL_PROL:%.*]] = icmp eq i32 [[AND_PROL]], 093; CHECK-NEXT: [[CONV_PROL:%.*]] = select i1 [[TOBOOL_PROL]], i8 48, i8 4994; CHECK-NEXT: [[ARRAYIDX_PROL:%.*]] = getelementptr inbounds i8, ptr [[S]], i64 [[INDVARS_IV_PROL]]95; CHECK-NEXT: store i8 [[CONV_PROL]], ptr [[ARRAYIDX_PROL]], align 196; CHECK-NEXT: [[INDVARS_IV_NEXT_PROL]] = add nuw nsw i64 [[INDVARS_IV_PROL]], 197; CHECK-NEXT: [[EXITCOND_PROL:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT_PROL]], [[WIDE_TRIP_COUNT]]98; CHECK-NEXT: [[PROL_ITER_NEXT]] = add i64 [[PROL_ITER]], 199; CHECK-NEXT: [[PROL_ITER_CMP:%.*]] = icmp ne i64 [[PROL_ITER_NEXT]], [[XTRAITER1]]100; CHECK-NEXT: br i1 [[PROL_ITER_CMP]], label [[FOR_BODY_PROL]], label [[FOR_BODY_PROL_LOOPEXIT_UNR_LCSSA:%.*]], !llvm.loop [[LOOP0:![0-9]+]]101; CHECK: for.body.prol.loopexit.unr-lcssa:102; CHECK-NEXT: [[INDVARS_IV_UNR_PH:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_PROL]], [[FOR_BODY_PROL]] ]103; CHECK-NEXT: br label [[FOR_BODY_PROL_LOOPEXIT]]104; CHECK: for.body.prol.loopexit:105; CHECK-NEXT: [[INDVARS_IV_UNR:%.*]] = phi i64 [ [[INDVARS_IV_PH]], [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_UNR_PH]], [[FOR_BODY_PROL_LOOPEXIT_UNR_LCSSA]] ]106; CHECK-NEXT: [[TMP23:%.*]] = icmp ult i64 [[TMP21]], 7107; CHECK-NEXT: br i1 [[TMP23]], label [[FOR_END_LOOPEXIT:%.*]], label [[FOR_BODY_PREHEADER_NEW:%.*]]108; CHECK: for.body.preheader.new:109; CHECK-NEXT: br label [[FOR_BODY:%.*]]110; CHECK: for.body:111; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_UNR]], [[FOR_BODY_PREHEADER_NEW]] ], [ [[INDVARS_IV_NEXT_7:%.*]], [[FOR_BODY]] ]112; CHECK-NEXT: [[TMP24:%.*]] = trunc i64 [[INDVARS_IV]] to i32113; CHECK-NEXT: [[SHL:%.*]] = shl i32 1, [[TMP24]]114; CHECK-NEXT: [[AND:%.*]] = and i32 [[SHL]], [[X]]115; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 0116; CHECK-NEXT: [[CONV:%.*]] = select i1 [[TOBOOL]], i8 48, i8 49117; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[S]], i64 [[INDVARS_IV]]118; CHECK-NEXT: store i8 [[CONV]], ptr [[ARRAYIDX]], align 1119; CHECK-NEXT: [[INDVARS_IV_NEXT:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 1120; CHECK-NEXT: [[TMP25:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32121; CHECK-NEXT: [[SHL_1:%.*]] = shl i32 1, [[TMP25]]122; CHECK-NEXT: [[AND_1:%.*]] = and i32 [[SHL_1]], [[X]]123; CHECK-NEXT: [[TOBOOL_1:%.*]] = icmp eq i32 [[AND_1]], 0124; CHECK-NEXT: [[CONV_1:%.*]] = select i1 [[TOBOOL_1]], i8 48, i8 49125; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i8, ptr [[S]], i64 [[INDVARS_IV_NEXT]]126; CHECK-NEXT: store i8 [[CONV_1]], ptr [[ARRAYIDX_1]], align 1127; CHECK-NEXT: [[INDVARS_IV_NEXT_1:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 2128; CHECK-NEXT: [[TMP26:%.*]] = trunc i64 [[INDVARS_IV_NEXT_1]] to i32129; CHECK-NEXT: [[SHL_2:%.*]] = shl i32 1, [[TMP26]]130; CHECK-NEXT: [[AND_2:%.*]] = and i32 [[SHL_2]], [[X]]131; CHECK-NEXT: [[TOBOOL_2:%.*]] = icmp eq i32 [[AND_2]], 0132; CHECK-NEXT: [[CONV_2:%.*]] = select i1 [[TOBOOL_2]], i8 48, i8 49133; CHECK-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr inbounds i8, ptr [[S]], i64 [[INDVARS_IV_NEXT_1]]134; CHECK-NEXT: store i8 [[CONV_2]], ptr [[ARRAYIDX_2]], align 1135; CHECK-NEXT: [[INDVARS_IV_NEXT_2:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 3136; CHECK-NEXT: [[TMP27:%.*]] = trunc i64 [[INDVARS_IV_NEXT_2]] to i32137; CHECK-NEXT: [[SHL_3:%.*]] = shl i32 1, [[TMP27]]138; CHECK-NEXT: [[AND_3:%.*]] = and i32 [[SHL_3]], [[X]]139; CHECK-NEXT: [[TOBOOL_3:%.*]] = icmp eq i32 [[AND_3]], 0140; CHECK-NEXT: [[CONV_3:%.*]] = select i1 [[TOBOOL_3]], i8 48, i8 49141; CHECK-NEXT: [[ARRAYIDX_3:%.*]] = getelementptr inbounds i8, ptr [[S]], i64 [[INDVARS_IV_NEXT_2]]142; CHECK-NEXT: store i8 [[CONV_3]], ptr [[ARRAYIDX_3]], align 1143; CHECK-NEXT: [[INDVARS_IV_NEXT_3:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 4144; CHECK-NEXT: [[TMP28:%.*]] = trunc i64 [[INDVARS_IV_NEXT_3]] to i32145; CHECK-NEXT: [[SHL_4:%.*]] = shl i32 1, [[TMP28]]146; CHECK-NEXT: [[AND_4:%.*]] = and i32 [[SHL_4]], [[X]]147; CHECK-NEXT: [[TOBOOL_4:%.*]] = icmp eq i32 [[AND_4]], 0148; CHECK-NEXT: [[CONV_4:%.*]] = select i1 [[TOBOOL_4]], i8 48, i8 49149; CHECK-NEXT: [[ARRAYIDX_4:%.*]] = getelementptr inbounds i8, ptr [[S]], i64 [[INDVARS_IV_NEXT_3]]150; CHECK-NEXT: store i8 [[CONV_4]], ptr [[ARRAYIDX_4]], align 1151; CHECK-NEXT: [[INDVARS_IV_NEXT_4:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 5152; CHECK-NEXT: [[TMP29:%.*]] = trunc i64 [[INDVARS_IV_NEXT_4]] to i32153; CHECK-NEXT: [[SHL_5:%.*]] = shl i32 1, [[TMP29]]154; CHECK-NEXT: [[AND_5:%.*]] = and i32 [[SHL_5]], [[X]]155; CHECK-NEXT: [[TOBOOL_5:%.*]] = icmp eq i32 [[AND_5]], 0156; CHECK-NEXT: [[CONV_5:%.*]] = select i1 [[TOBOOL_5]], i8 48, i8 49157; CHECK-NEXT: [[ARRAYIDX_5:%.*]] = getelementptr inbounds i8, ptr [[S]], i64 [[INDVARS_IV_NEXT_4]]158; CHECK-NEXT: store i8 [[CONV_5]], ptr [[ARRAYIDX_5]], align 1159; CHECK-NEXT: [[INDVARS_IV_NEXT_5:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 6160; CHECK-NEXT: [[TMP30:%.*]] = trunc i64 [[INDVARS_IV_NEXT_5]] to i32161; CHECK-NEXT: [[SHL_6:%.*]] = shl i32 1, [[TMP30]]162; CHECK-NEXT: [[AND_6:%.*]] = and i32 [[SHL_6]], [[X]]163; CHECK-NEXT: [[TOBOOL_6:%.*]] = icmp eq i32 [[AND_6]], 0164; CHECK-NEXT: [[CONV_6:%.*]] = select i1 [[TOBOOL_6]], i8 48, i8 49165; CHECK-NEXT: [[ARRAYIDX_6:%.*]] = getelementptr inbounds i8, ptr [[S]], i64 [[INDVARS_IV_NEXT_5]]166; CHECK-NEXT: store i8 [[CONV_6]], ptr [[ARRAYIDX_6]], align 1167; CHECK-NEXT: [[INDVARS_IV_NEXT_6:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 7168; CHECK-NEXT: [[TMP31:%.*]] = trunc i64 [[INDVARS_IV_NEXT_6]] to i32169; CHECK-NEXT: [[SHL_7:%.*]] = shl i32 1, [[TMP31]]170; CHECK-NEXT: [[AND_7:%.*]] = and i32 [[SHL_7]], [[X]]171; CHECK-NEXT: [[TOBOOL_7:%.*]] = icmp eq i32 [[AND_7]], 0172; CHECK-NEXT: [[CONV_7:%.*]] = select i1 [[TOBOOL_7]], i8 48, i8 49173; CHECK-NEXT: [[ARRAYIDX_7:%.*]] = getelementptr inbounds i8, ptr [[S]], i64 [[INDVARS_IV_NEXT_6]]174; CHECK-NEXT: store i8 [[CONV_7]], ptr [[ARRAYIDX_7]], align 1175; CHECK-NEXT: [[INDVARS_IV_NEXT_7]] = add nuw nsw i64 [[INDVARS_IV]], 8176; CHECK-NEXT: [[EXITCOND_7:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT_7]], [[WIDE_TRIP_COUNT]]177; CHECK-NEXT: br i1 [[EXITCOND_7]], label [[FOR_END_LOOPEXIT_UNR_LCSSA:%.*]], label [[FOR_BODY]]178; CHECK: for.end.loopexit.unr-lcssa:179; CHECK-NEXT: br label [[FOR_END_LOOPEXIT]]180; CHECK: for.end.loopexit:181; CHECK-NEXT: br label [[FOR_END]]182; CHECK: for.end:183; CHECK-NEXT: [[IDXPROM1:%.*]] = sext i32 [[K]] to i64184; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i8, ptr [[S]], i64 [[IDXPROM1]]185; CHECK-NEXT: store i8 0, ptr [[ARRAYIDX2]], align 1186; CHECK-NEXT: ret ptr [[S]]187;188entry:189 %cmp10 = icmp sgt i32 %k, 0190 br i1 %cmp10, label %for.body.lr.ph, label %for.end191 192for.body.lr.ph: ; preds = %entry193 %wide.trip.count = zext i32 %k to i64194 %min.iters.check = icmp ult i32 %k, 16195 br i1 %min.iters.check, label %for.body.preheader, label %vector.ph196 197vector.ph: ; preds = %for.body.lr.ph198 %n.vec = and i64 %wide.trip.count, 4294967280199 %broadcast.splatinsert = insertelement <16 x i32> undef, i32 %x, i32 0200 %broadcast.splat = shufflevector <16 x i32> %broadcast.splatinsert, <16 x i32> undef, <16 x i32> zeroinitializer201 br label %vector.body202 203vector.body: ; preds = %vector.body, %vector.ph204 %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]205 %vec.ind12 = phi <16 x i32> [ <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>, %vector.ph ], [ %vec.ind.next13, %vector.body ]206 %0 = shl <16 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>, %vec.ind12207 %1 = and <16 x i32> %0, %broadcast.splat208 %2 = icmp eq <16 x i32> %1, zeroinitializer209 %3 = select <16 x i1> %2, <16 x i8> <i8 48, i8 48, i8 48, i8 48, i8 48, i8 48, i8 48, i8 48, i8 48, i8 48, i8 48, i8 48, i8 48, i8 48, i8 48, i8 48>, <16 x i8> <i8 49, i8 49, i8 49, i8 49, i8 49, i8 49, i8 49, i8 49, i8 49, i8 49, i8 49, i8 49, i8 49, i8 49, i8 49, i8 49>210 %4 = getelementptr inbounds i8, ptr %s, i64 %index211 store <16 x i8> %3, ptr %4, align 1212 %index.next = add i64 %index, 16213 %vec.ind.next13 = add <16 x i32> %vec.ind12, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>214 %5 = icmp eq i64 %index.next, %n.vec215 br i1 %5, label %middle.block, label %vector.body216 217middle.block: ; preds = %vector.body218 %cmp.n = icmp eq i64 %n.vec, %wide.trip.count219 br i1 %cmp.n, label %for.end, label %for.body.preheader220 221for.body.preheader: ; preds = %middle.block, %for.body.lr.ph222 %indvars.iv.ph = phi i64 [ 0, %for.body.lr.ph ], [ %n.vec, %middle.block ]223 br label %for.body224 225for.body: ; preds = %for.body.preheader, %for.body226 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ %indvars.iv.ph, %for.body.preheader ]227 %6 = trunc i64 %indvars.iv to i32228 %shl = shl i32 1, %6229 %and = and i32 %shl, %x230 %tobool = icmp eq i32 %and, 0231 %conv = select i1 %tobool, i8 48, i8 49232 %arrayidx = getelementptr inbounds i8, ptr %s, i64 %indvars.iv233 store i8 %conv, ptr %arrayidx, align 1234 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1235 %exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count236 br i1 %exitcond, label %for.end, label %for.body237 238for.end: ; preds = %for.body, %middle.block, %entry239 %idxprom1 = sext i32 %k to i64240 %arrayidx2 = getelementptr inbounds i8, ptr %s, i64 %idxprom1241 store i8 0, ptr %arrayidx2, align 1242 ret ptr %s243}244 245