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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=loop-unroll -S %s | FileCheck %s3 4; Loop with multiple exiting blocks, where the header exits but not the latch,5; e.g. because it has not been rotated.6define i16 @full_unroll_multiple_exiting_blocks(ptr %A, i16 %x, i16 %y) {7; CHECK-LABEL: @full_unroll_multiple_exiting_blocks(8; CHECK-NEXT: entry:9; CHECK-NEXT: br label [[HEADER:%.*]]10; CHECK: header:11; CHECK-NEXT: [[LV:%.*]] = load i16, ptr [[A:%.*]], align 212; CHECK-NEXT: [[RES_NEXT:%.*]] = add i16 123, [[LV]]13; CHECK-NEXT: br label [[EXITING_1:%.*]]14; CHECK: exiting.1:15; CHECK-NEXT: [[EC_1:%.*]] = icmp eq i16 [[LV]], [[X:%.*]]16; CHECK-NEXT: br i1 [[EC_1]], label [[EXIT:%.*]], label [[EXITING_2:%.*]]17; CHECK: exiting.2:18; CHECK-NEXT: [[EC_2:%.*]] = icmp eq i16 [[LV]], [[Y:%.*]]19; CHECK-NEXT: br i1 [[EC_2]], label [[EXIT]], label [[LATCH:%.*]]20; CHECK: latch:21; CHECK-NEXT: [[PTR_1:%.*]] = getelementptr inbounds i16, ptr [[A]], i64 122; CHECK-NEXT: [[LV_1:%.*]] = load i16, ptr [[PTR_1]], align 223; CHECK-NEXT: [[RES_NEXT_1:%.*]] = add i16 [[RES_NEXT]], [[LV_1]]24; CHECK-NEXT: br label [[EXITING_1_1:%.*]]25; CHECK: exiting.1.1:26; CHECK-NEXT: [[EC_1_1:%.*]] = icmp eq i16 [[LV_1]], [[X]]27; CHECK-NEXT: br i1 [[EC_1_1]], label [[EXIT]], label [[EXITING_2_1:%.*]]28; CHECK: exiting.2.1:29; CHECK-NEXT: [[EC_2_1:%.*]] = icmp eq i16 [[LV_1]], [[Y]]30; CHECK-NEXT: br i1 [[EC_2_1]], label [[EXIT]], label [[LATCH_1:%.*]]31; CHECK: latch.1:32; CHECK-NEXT: [[PTR_2:%.*]] = getelementptr inbounds i16, ptr [[A]], i64 233; CHECK-NEXT: [[LV_2:%.*]] = load i16, ptr [[PTR_2]], align 234; CHECK-NEXT: [[RES_NEXT_2:%.*]] = add i16 [[RES_NEXT_1]], [[LV_2]]35; CHECK-NEXT: br label [[EXITING_1_2:%.*]]36; CHECK: exiting.1.2:37; CHECK-NEXT: [[EC_1_2:%.*]] = icmp eq i16 [[LV_2]], [[X]]38; CHECK-NEXT: br i1 [[EC_1_2]], label [[EXIT]], label [[EXITING_2_2:%.*]]39; CHECK: exiting.2.2:40; CHECK-NEXT: [[EC_2_2:%.*]] = icmp eq i16 [[LV_2]], [[Y]]41; CHECK-NEXT: br i1 [[EC_2_2]], label [[EXIT]], label [[LATCH_2:%.*]]42; CHECK: latch.2:43; CHECK-NEXT: [[PTR_3:%.*]] = getelementptr inbounds i16, ptr [[A]], i64 344; CHECK-NEXT: [[LV_3:%.*]] = load i16, ptr [[PTR_3]], align 245; CHECK-NEXT: [[RES_NEXT_3:%.*]] = add i16 [[RES_NEXT_2]], [[LV_3]]46; CHECK-NEXT: br i1 false, label [[EXITING_1_3:%.*]], label [[EXIT]]47; CHECK: exiting.1.3:48; CHECK-NEXT: [[EC_1_3:%.*]] = icmp eq i16 [[LV_3]], [[X]]49; CHECK-NEXT: br i1 [[EC_1_3]], label [[EXIT]], label [[EXITING_2_3:%.*]]50; CHECK: exiting.2.3:51; CHECK-NEXT: [[EC_2_3:%.*]] = icmp eq i16 [[LV_3]], [[Y]]52; CHECK-NEXT: br i1 [[EC_2_3]], label [[EXIT]], label [[LATCH_3:%.*]]53; CHECK: latch.3:54; CHECK-NEXT: unreachable55; CHECK: exit:56; CHECK-NEXT: [[RES_LCSSA:%.*]] = phi i16 [ 0, [[EXITING_1]] ], [ 1, [[EXITING_2]] ], [ 0, [[EXITING_1_1]] ], [ 1, [[EXITING_2_1]] ], [ 0, [[EXITING_1_2]] ], [ 1, [[EXITING_2_2]] ], [ [[RES_NEXT_3]], [[LATCH_2]] ], [ 0, [[EXITING_1_3]] ], [ 1, [[EXITING_2_3]] ]57; CHECK-NEXT: ret i16 [[RES_LCSSA]]58;59entry:60 br label %header61 62header:63 %res = phi i16 [ 123, %entry ], [ %res.next, %latch ]64 %i.0 = phi i64 [ 0, %entry ], [ %inc9, %latch ]65 %ptr = getelementptr inbounds i16, ptr %A, i64 %i.066 %lv = load i16, ptr %ptr67 %res.next = add i16 %res, %lv68 %cmp = icmp ult i64 %i.0, 369 br i1 %cmp, label %exiting.1, label %exit70 71exiting.1:72 %ec.1 = icmp eq i16 %lv, %x73 br i1 %ec.1, label %exit, label %exiting.274 75exiting.2:76 %ec.2 = icmp eq i16 %lv, %y77 br i1 %ec.2, label %exit, label %latch78 79latch:80 %inc9 = add i64 %i.0, 181 br label %header82 83exit:84 %res.lcssa = phi i16 [ %res.next, %header ], [ 0, %exiting.1 ], [ 1, %exiting.2 ]85 ret i16 %res.lcssa86}87