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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 62; RUN: opt -passes=loop-unroll-and-jam -allow-unroll-and-jam -unroll-and-jam-count=4 -unroll-remainder < %s -S | FileCheck %s3; RUN: opt -aa-pipeline=tbaa,basic-aa -passes='loop-unroll-and-jam' -allow-unroll-and-jam -unroll-and-jam-count=4 -unroll-remainder < %s -S | FileCheck %s4 5target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"6 7; Tests for(i) { sum = 0; for(j) sum += B[j]; A[i] = sum; }8define void @test1(i32 %I, i32 %E, ptr noalias nocapture %A, ptr noalias nocapture readonly %B) #0 {9; CHECK-LABEL: define void @test1(10; CHECK-SAME: i32 [[I:%.*]], i32 [[E:%.*]], ptr noalias captures(none) [[A:%.*]], ptr noalias readonly captures(none) [[B:%.*]]) {11; CHECK-NEXT: [[ENTRY:.*:]]12; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[E]], 013; CHECK-NEXT: [[CMPJ:%.*]] = icmp ne i32 [[I]], 014; CHECK-NEXT: [[OR_COND:%.*]] = and i1 [[CMP]], [[CMPJ]]15; CHECK-NEXT: br i1 [[OR_COND]], label %[[FOR_OUTER_PREHEADER:.*]], label %[[FOR_END:.*]]16; CHECK: [[FOR_OUTER_PREHEADER]]:17; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[I]], -118; CHECK-NEXT: [[XTRAITER:%.*]] = and i32 [[I]], 319; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[TMP0]], 320; CHECK-NEXT: br i1 [[TMP1]], label %[[FOR_OUTER_EPIL_PREHEADER:.*]], label %[[FOR_OUTER_PREHEADER_NEW:.*]]21; CHECK: [[FOR_OUTER_PREHEADER_NEW]]:22; CHECK-NEXT: [[UNROLL_ITER:%.*]] = sub i32 [[I]], [[XTRAITER]]23; CHECK-NEXT: br label %[[FOR_OUTER:.*]]24; CHECK: [[FOR_OUTER]]:25; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[ADD8_3:%.*]], %[[FOR_LATCH:.*]] ], [ 0, %[[FOR_OUTER_PREHEADER_NEW]] ]26; CHECK-NEXT: [[NITER:%.*]] = phi i32 [ 0, %[[FOR_OUTER_PREHEADER_NEW]] ], [ [[NITER_NEXT_3:%.*]], %[[FOR_LATCH]] ]27; CHECK-NEXT: [[ADD8:%.*]] = add nuw nsw i32 [[I]], 128; CHECK-NEXT: [[ADD8_1:%.*]] = add nuw nsw i32 [[I]], 229; CHECK-NEXT: [[ADD8_2:%.*]] = add nuw nsw i32 [[I]], 330; CHECK-NEXT: [[ADD8_3]] = add nuw i32 [[I]], 431; CHECK-NEXT: [[NITER_NEXT_3]] = add i32 [[NITER]], 432; CHECK-NEXT: br label %[[FOR_INNER:.*]]33; CHECK: [[FOR_INNER]]:34; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[INC:%.*]], %[[FOR_INNER]] ]35; CHECK-NEXT: [[SUM:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD:%.*]], %[[FOR_INNER]] ]36; CHECK-NEXT: [[J_1:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[INC_1:%.*]], %[[FOR_INNER]] ]37; CHECK-NEXT: [[SUM_1:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD_1:%.*]], %[[FOR_INNER]] ]38; CHECK-NEXT: [[J_2:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[INC_2:%.*]], %[[FOR_INNER]] ]39; CHECK-NEXT: [[SUM_2:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD_2:%.*]], %[[FOR_INNER]] ]40; CHECK-NEXT: [[J_3:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[INC_3:%.*]], %[[FOR_INNER]] ]41; CHECK-NEXT: [[SUM_3:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD_3:%.*]], %[[FOR_INNER]] ]42; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J]]43; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !tbaa [[INT_TBAA0:![0-9]+]]44; CHECK-NEXT: [[ADD]] = add i32 [[TMP2]], [[SUM]]45; CHECK-NEXT: [[INC]] = add nuw i32 [[J]], 146; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_1]]47; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[ARRAYIDX_1]], align 4, !tbaa [[INT_TBAA0]]48; CHECK-NEXT: [[ADD_1]] = add i32 [[TMP3]], [[SUM_1]]49; CHECK-NEXT: [[INC_1]] = add nuw i32 [[J_1]], 150; CHECK-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_2]]51; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[ARRAYIDX_2]], align 4, !tbaa [[INT_TBAA0]]52; CHECK-NEXT: [[ADD_2]] = add i32 [[TMP4]], [[SUM_2]]53; CHECK-NEXT: [[INC_2]] = add nuw i32 [[J_2]], 154; CHECK-NEXT: [[ARRAYIDX_3:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_3]]55; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[ARRAYIDX_3]], align 4, !tbaa [[INT_TBAA0]]56; CHECK-NEXT: [[ADD_3]] = add i32 [[TMP5]], [[SUM_3]]57; CHECK-NEXT: [[INC_3]] = add nuw i32 [[J_3]], 158; CHECK-NEXT: [[EXITCOND_3:%.*]] = icmp eq i32 [[INC_3]], [[E]]59; CHECK-NEXT: br i1 [[EXITCOND_3]], label %[[FOR_LATCH]], label %[[FOR_INNER]]60; CHECK: [[FOR_LATCH]]:61; CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD]], %[[FOR_INNER]] ]62; CHECK-NEXT: [[ADD_LCSSA_1:%.*]] = phi i32 [ [[ADD_1]], %[[FOR_INNER]] ]63; CHECK-NEXT: [[ADD_LCSSA_2:%.*]] = phi i32 [ [[ADD_2]], %[[FOR_INNER]] ]64; CHECK-NEXT: [[ADD_LCSSA_3:%.*]] = phi i32 [ [[ADD_3]], %[[FOR_INNER]] ]65; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[I]]66; CHECK-NEXT: store i32 [[ADD_LCSSA]], ptr [[ARRAYIDX6]], align 4, !tbaa [[INT_TBAA0]]67; CHECK-NEXT: [[ARRAYIDX6_1:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD8]]68; CHECK-NEXT: store i32 [[ADD_LCSSA_1]], ptr [[ARRAYIDX6_1]], align 4, !tbaa [[INT_TBAA0]]69; CHECK-NEXT: [[ARRAYIDX6_2:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD8_1]]70; CHECK-NEXT: store i32 [[ADD_LCSSA_2]], ptr [[ARRAYIDX6_2]], align 4, !tbaa [[INT_TBAA0]]71; CHECK-NEXT: [[ARRAYIDX6_3:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD8_2]]72; CHECK-NEXT: store i32 [[ADD_LCSSA_3]], ptr [[ARRAYIDX6_3]], align 4, !tbaa [[INT_TBAA0]]73; CHECK-NEXT: [[NITER_NCMP_3:%.*]] = icmp eq i32 [[NITER_NEXT_3]], [[UNROLL_ITER]]74; CHECK-NEXT: br i1 [[NITER_NCMP_3]], label %[[FOR_END_LOOPEXIT_UNR_LCSSA:.*]], label %[[FOR_OUTER]], !llvm.loop [[LOOP4:![0-9]+]]75; CHECK: [[FOR_END_LOOPEXIT_UNR_LCSSA]]:76; CHECK-NEXT: [[I_UNR1:%.*]] = phi i32 [ [[ADD8_3]], %[[FOR_LATCH]] ]77; CHECK-NEXT: [[LCMP_MOD:%.*]] = icmp ne i32 [[XTRAITER]], 078; CHECK-NEXT: br i1 [[LCMP_MOD]], label %[[FOR_OUTER_EPIL_PREHEADER]], label %[[FOR_END_LOOPEXIT:.*]]79; CHECK: [[FOR_OUTER_EPIL_PREHEADER]]:80; CHECK-NEXT: [[I_UNR:%.*]] = phi i32 [ 0, %[[FOR_OUTER_PREHEADER]] ], [ [[I_UNR1]], %[[FOR_END_LOOPEXIT_UNR_LCSSA]] ]81; CHECK-NEXT: [[LCMP_MOD1:%.*]] = icmp ne i32 [[XTRAITER]], 082; CHECK-NEXT: call void @llvm.assume(i1 [[LCMP_MOD1]])83; CHECK-NEXT: br label %[[FOR_OUTER_EPIL:.*]]84; CHECK: [[FOR_OUTER_EPIL]]:85; CHECK-NEXT: br label %[[FOR_INNER_EPIL:.*]]86; CHECK: [[FOR_INNER_EPIL]]:87; CHECK-NEXT: [[J_EPIL:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL]] ], [ [[INC_EPIL:%.*]], %[[FOR_INNER_EPIL]] ]88; CHECK-NEXT: [[SUM_EPIL:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL]] ], [ [[ADD_EPIL:%.*]], %[[FOR_INNER_EPIL]] ]89; CHECK-NEXT: [[ARRAYIDX_EPIL:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_EPIL]]90; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[ARRAYIDX_EPIL]], align 4, !tbaa [[INT_TBAA0]]91; CHECK-NEXT: [[ADD_EPIL]] = add i32 [[TMP6]], [[SUM_EPIL]]92; CHECK-NEXT: [[INC_EPIL]] = add nuw i32 [[J_EPIL]], 193; CHECK-NEXT: [[EXITCOND_EPIL:%.*]] = icmp eq i32 [[INC_EPIL]], [[E]]94; CHECK-NEXT: br i1 [[EXITCOND_EPIL]], label %[[FOR_LATCH_EPIL:.*]], label %[[FOR_INNER_EPIL]]95; CHECK: [[FOR_LATCH_EPIL]]:96; CHECK-NEXT: [[ADD_LCSSA_EPIL:%.*]] = phi i32 [ [[ADD_EPIL]], %[[FOR_INNER_EPIL]] ]97; CHECK-NEXT: [[ARRAYIDX6_EPIL:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[I_UNR]]98; CHECK-NEXT: store i32 [[ADD_LCSSA_EPIL]], ptr [[ARRAYIDX6_EPIL]], align 4, !tbaa [[INT_TBAA0]]99; CHECK-NEXT: [[ADD8_EPIL:%.*]] = add nuw i32 [[I_UNR]], 1100; CHECK-NEXT: [[EPIL_ITER_CMP:%.*]] = icmp ne i32 1, [[XTRAITER]]101; CHECK-NEXT: br i1 [[EPIL_ITER_CMP]], label %[[FOR_OUTER_EPIL_1:.*]], label %[[FOR_END_LOOPEXIT_EPILOG_LCSSA:.*]]102; CHECK: [[FOR_OUTER_EPIL_1]]:103; CHECK-NEXT: br label %[[FOR_INNER_EPIL_1:.*]]104; CHECK: [[FOR_INNER_EPIL_1]]:105; CHECK-NEXT: [[J_EPIL_1:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL_1]] ], [ [[INC_EPIL_1:%.*]], %[[FOR_INNER_EPIL_1]] ]106; CHECK-NEXT: [[SUM_EPIL_1:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL_1]] ], [ [[ADD_EPIL_1:%.*]], %[[FOR_INNER_EPIL_1]] ]107; CHECK-NEXT: [[ARRAYIDX_EPIL_1:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_EPIL_1]]108; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[ARRAYIDX_EPIL_1]], align 4, !tbaa [[INT_TBAA0]]109; CHECK-NEXT: [[ADD_EPIL_1]] = add i32 [[TMP7]], [[SUM_EPIL_1]]110; CHECK-NEXT: [[INC_EPIL_1]] = add nuw i32 [[J_EPIL_1]], 1111; CHECK-NEXT: [[EXITCOND_EPIL_1:%.*]] = icmp eq i32 [[INC_EPIL_1]], [[E]]112; CHECK-NEXT: br i1 [[EXITCOND_EPIL_1]], label %[[FOR_LATCH_EPIL_1:.*]], label %[[FOR_INNER_EPIL_1]]113; CHECK: [[FOR_LATCH_EPIL_1]]:114; CHECK-NEXT: [[ADD_LCSSA_EPIL_1:%.*]] = phi i32 [ [[ADD_EPIL_1]], %[[FOR_INNER_EPIL_1]] ]115; CHECK-NEXT: [[ARRAYIDX6_EPIL_1:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD8_EPIL]]116; CHECK-NEXT: store i32 [[ADD_LCSSA_EPIL_1]], ptr [[ARRAYIDX6_EPIL_1]], align 4, !tbaa [[INT_TBAA0]]117; CHECK-NEXT: [[ADD8_EPIL_1:%.*]] = add nuw i32 [[I_UNR]], 2118; CHECK-NEXT: [[EPIL_ITER_CMP_1:%.*]] = icmp ne i32 2, [[XTRAITER]]119; CHECK-NEXT: br i1 [[EPIL_ITER_CMP_1]], label %[[FOR_OUTER_EPIL_2:.*]], label %[[FOR_END_LOOPEXIT_EPILOG_LCSSA]]120; CHECK: [[FOR_OUTER_EPIL_2]]:121; CHECK-NEXT: br label %[[FOR_INNER_EPIL_2:.*]]122; CHECK: [[FOR_INNER_EPIL_2]]:123; CHECK-NEXT: [[J_EPIL_2:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL_2]] ], [ [[INC_EPIL_2:%.*]], %[[FOR_INNER_EPIL_2]] ]124; CHECK-NEXT: [[SUM_EPIL_2:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL_2]] ], [ [[ADD_EPIL_2:%.*]], %[[FOR_INNER_EPIL_2]] ]125; CHECK-NEXT: [[ARRAYIDX_EPIL_2:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_EPIL_2]]126; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[ARRAYIDX_EPIL_2]], align 4, !tbaa [[INT_TBAA0]]127; CHECK-NEXT: [[ADD_EPIL_2]] = add i32 [[TMP8]], [[SUM_EPIL_2]]128; CHECK-NEXT: [[INC_EPIL_2]] = add nuw i32 [[J_EPIL_2]], 1129; CHECK-NEXT: [[EXITCOND_EPIL_2:%.*]] = icmp eq i32 [[INC_EPIL_2]], [[E]]130; CHECK-NEXT: br i1 [[EXITCOND_EPIL_2]], label %[[FOR_LATCH_EPIL_2:.*]], label %[[FOR_INNER_EPIL_2]]131; CHECK: [[FOR_LATCH_EPIL_2]]:132; CHECK-NEXT: [[ADD_LCSSA_EPIL_2:%.*]] = phi i32 [ [[ADD_EPIL_2]], %[[FOR_INNER_EPIL_2]] ]133; CHECK-NEXT: [[ARRAYIDX6_EPIL_2:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD8_EPIL_1]]134; CHECK-NEXT: store i32 [[ADD_LCSSA_EPIL_2]], ptr [[ARRAYIDX6_EPIL_2]], align 4, !tbaa [[INT_TBAA0]]135; CHECK-NEXT: br label %[[FOR_END_LOOPEXIT_EPILOG_LCSSA]]136; CHECK: [[FOR_END_LOOPEXIT_EPILOG_LCSSA]]:137; CHECK-NEXT: br label %[[FOR_END_LOOPEXIT]]138; CHECK: [[FOR_END_LOOPEXIT]]:139; CHECK-NEXT: br label %[[FOR_END]]140; CHECK: [[FOR_END]]:141; CHECK-NEXT: ret void142;143entry:144 %cmp = icmp ne i32 %E, 0145 %cmpJ = icmp ne i32 %I, 0146 %or.cond = and i1 %cmp, %cmpJ147 br i1 %or.cond, label %for.outer.preheader, label %for.end148 149for.outer.preheader:150 br label %for.outer151 152for.outer:153 %i = phi i32 [ %add8, %for.latch ], [ 0, %for.outer.preheader ]154 br label %for.inner155 156for.inner:157 %j = phi i32 [ 0, %for.outer ], [ %inc, %for.inner ]158 %sum = phi i32 [ 0, %for.outer ], [ %add, %for.inner ]159 %arrayidx = getelementptr inbounds i32, ptr %B, i32 %j160 %0 = load i32, ptr %arrayidx, align 4, !tbaa !5161 %add = add i32 %0, %sum162 %inc = add nuw i32 %j, 1163 %exitcond = icmp eq i32 %inc, %E164 br i1 %exitcond, label %for.latch, label %for.inner165 166for.latch:167 %add.lcssa = phi i32 [ %add, %for.inner ]168 %arrayidx6 = getelementptr inbounds i32, ptr %A, i32 %i169 store i32 %add.lcssa, ptr %arrayidx6, align 4, !tbaa !5170 %add8 = add nuw i32 %i, 1171 %exitcond25 = icmp eq i32 %add8, %I172 br i1 %exitcond25, label %for.end.loopexit, label %for.outer173 174for.end.loopexit:175 br label %for.end176 177for.end:178 ret void179}180 181 182; Tests for(i) { sum = A[i]; for(j) sum += B[j]; A[i] = sum; }183; A[i] load/store dependency should not block unroll-and-jam184define void @test2(i32 %I, i32 %E, ptr noalias nocapture %A, ptr noalias nocapture readonly %B) #0 {185; CHECK-LABEL: define void @test2(186; CHECK-SAME: i32 [[I:%.*]], i32 [[E:%.*]], ptr noalias captures(none) [[A:%.*]], ptr noalias readonly captures(none) [[B:%.*]]) {187; CHECK-NEXT: [[ENTRY:.*:]]188; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[E]], 0189; CHECK-NEXT: [[CMP125:%.*]] = icmp ne i32 [[I]], 0190; CHECK-NEXT: [[OR_COND:%.*]] = and i1 [[CMP]], [[CMP125]]191; CHECK-NEXT: br i1 [[OR_COND]], label %[[FOR_OUTER_PREHEADER:.*]], label %[[FOR_END10:.*]]192; CHECK: [[FOR_OUTER_PREHEADER]]:193; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[I]], -1194; CHECK-NEXT: [[XTRAITER:%.*]] = and i32 [[I]], 3195; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[TMP0]], 3196; CHECK-NEXT: br i1 [[TMP1]], label %[[FOR_OUTER_EPIL_PREHEADER:.*]], label %[[FOR_OUTER_PREHEADER_NEW:.*]]197; CHECK: [[FOR_OUTER_PREHEADER_NEW]]:198; CHECK-NEXT: [[UNROLL_ITER:%.*]] = sub i32 [[I]], [[XTRAITER]]199; CHECK-NEXT: br label %[[FOR_OUTER:.*]]200; CHECK: [[FOR_OUTER]]:201; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[ADD9_3:%.*]], %[[FOR_LATCH:.*]] ], [ 0, %[[FOR_OUTER_PREHEADER_NEW]] ]202; CHECK-NEXT: [[NITER:%.*]] = phi i32 [ 0, %[[FOR_OUTER_PREHEADER_NEW]] ], [ [[NITER_NEXT_3:%.*]], %[[FOR_LATCH]] ]203; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[I]]204; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !tbaa [[INT_TBAA0]]205; CHECK-NEXT: [[ADD9:%.*]] = add nuw nsw i32 [[I]], 1206; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD9]]207; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[ARRAYIDX_1]], align 4, !tbaa [[INT_TBAA0]]208; CHECK-NEXT: [[ADD9_1:%.*]] = add nuw nsw i32 [[I]], 2209; CHECK-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD9_1]]210; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[ARRAYIDX_2]], align 4, !tbaa [[INT_TBAA0]]211; CHECK-NEXT: [[ADD9_2:%.*]] = add nuw nsw i32 [[I]], 3212; CHECK-NEXT: [[ARRAYIDX_3:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD9_2]]213; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[ARRAYIDX_3]], align 4, !tbaa [[INT_TBAA0]]214; CHECK-NEXT: [[ADD9_3]] = add nuw i32 [[I]], 4215; CHECK-NEXT: [[NITER_NEXT_3]] = add i32 [[NITER]], 4216; CHECK-NEXT: br label %[[FOR_INNER:.*]]217; CHECK: [[FOR_INNER]]:218; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[INC:%.*]], %[[FOR_INNER]] ]219; CHECK-NEXT: [[SUM:%.*]] = phi i32 [ [[TMP2]], %[[FOR_OUTER]] ], [ [[ADD:%.*]], %[[FOR_INNER]] ]220; CHECK-NEXT: [[J_1:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[INC_1:%.*]], %[[FOR_INNER]] ]221; CHECK-NEXT: [[SUM_1:%.*]] = phi i32 [ [[TMP3]], %[[FOR_OUTER]] ], [ [[ADD_1:%.*]], %[[FOR_INNER]] ]222; CHECK-NEXT: [[J_2:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[INC_2:%.*]], %[[FOR_INNER]] ]223; CHECK-NEXT: [[SUM_2:%.*]] = phi i32 [ [[TMP4]], %[[FOR_OUTER]] ], [ [[ADD_2:%.*]], %[[FOR_INNER]] ]224; CHECK-NEXT: [[J_3:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[INC_3:%.*]], %[[FOR_INNER]] ]225; CHECK-NEXT: [[SUM_3:%.*]] = phi i32 [ [[TMP5]], %[[FOR_OUTER]] ], [ [[ADD_3:%.*]], %[[FOR_INNER]] ]226; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J]]227; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[ARRAYIDX6]], align 4, !tbaa [[INT_TBAA0]]228; CHECK-NEXT: [[ADD]] = add i32 [[TMP6]], [[SUM]]229; CHECK-NEXT: [[INC]] = add nuw i32 [[J]], 1230; CHECK-NEXT: [[ARRAYIDX6_1:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_1]]231; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[ARRAYIDX6_1]], align 4, !tbaa [[INT_TBAA0]]232; CHECK-NEXT: [[ADD_1]] = add i32 [[TMP7]], [[SUM_1]]233; CHECK-NEXT: [[INC_1]] = add nuw i32 [[J_1]], 1234; CHECK-NEXT: [[ARRAYIDX6_2:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_2]]235; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[ARRAYIDX6_2]], align 4, !tbaa [[INT_TBAA0]]236; CHECK-NEXT: [[ADD_2]] = add i32 [[TMP8]], [[SUM_2]]237; CHECK-NEXT: [[INC_2]] = add nuw i32 [[J_2]], 1238; CHECK-NEXT: [[ARRAYIDX6_3:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_3]]239; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[ARRAYIDX6_3]], align 4, !tbaa [[INT_TBAA0]]240; CHECK-NEXT: [[ADD_3]] = add i32 [[TMP9]], [[SUM_3]]241; CHECK-NEXT: [[INC_3]] = add nuw i32 [[J_3]], 1242; CHECK-NEXT: [[EXITCOND_3:%.*]] = icmp eq i32 [[INC_3]], [[E]]243; CHECK-NEXT: br i1 [[EXITCOND_3]], label %[[FOR_LATCH]], label %[[FOR_INNER]]244; CHECK: [[FOR_LATCH]]:245; CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD]], %[[FOR_INNER]] ]246; CHECK-NEXT: [[ADD_LCSSA_1:%.*]] = phi i32 [ [[ADD_1]], %[[FOR_INNER]] ]247; CHECK-NEXT: [[ADD_LCSSA_2:%.*]] = phi i32 [ [[ADD_2]], %[[FOR_INNER]] ]248; CHECK-NEXT: [[ADD_LCSSA_3:%.*]] = phi i32 [ [[ADD_3]], %[[FOR_INNER]] ]249; CHECK-NEXT: store i32 [[ADD_LCSSA]], ptr [[ARRAYIDX]], align 4, !tbaa [[INT_TBAA0]]250; CHECK-NEXT: store i32 [[ADD_LCSSA_1]], ptr [[ARRAYIDX_1]], align 4, !tbaa [[INT_TBAA0]]251; CHECK-NEXT: store i32 [[ADD_LCSSA_2]], ptr [[ARRAYIDX_2]], align 4, !tbaa [[INT_TBAA0]]252; CHECK-NEXT: store i32 [[ADD_LCSSA_3]], ptr [[ARRAYIDX_3]], align 4, !tbaa [[INT_TBAA0]]253; CHECK-NEXT: [[NITER_NCMP_3:%.*]] = icmp eq i32 [[NITER_NEXT_3]], [[UNROLL_ITER]]254; CHECK-NEXT: br i1 [[NITER_NCMP_3]], label %[[FOR_END10_LOOPEXIT_UNR_LCSSA:.*]], label %[[FOR_OUTER]], !llvm.loop [[LOOP6:![0-9]+]]255; CHECK: [[FOR_END10_LOOPEXIT_UNR_LCSSA]]:256; CHECK-NEXT: [[I_UNR1:%.*]] = phi i32 [ [[ADD9_3]], %[[FOR_LATCH]] ]257; CHECK-NEXT: [[LCMP_MOD:%.*]] = icmp ne i32 [[XTRAITER]], 0258; CHECK-NEXT: br i1 [[LCMP_MOD]], label %[[FOR_OUTER_EPIL_PREHEADER]], label %[[FOR_END10_LOOPEXIT:.*]]259; CHECK: [[FOR_OUTER_EPIL_PREHEADER]]:260; CHECK-NEXT: [[I_UNR:%.*]] = phi i32 [ 0, %[[FOR_OUTER_PREHEADER]] ], [ [[I_UNR1]], %[[FOR_END10_LOOPEXIT_UNR_LCSSA]] ]261; CHECK-NEXT: [[LCMP_MOD1:%.*]] = icmp ne i32 [[XTRAITER]], 0262; CHECK-NEXT: call void @llvm.assume(i1 [[LCMP_MOD1]])263; CHECK-NEXT: br label %[[FOR_OUTER_EPIL:.*]]264; CHECK: [[FOR_OUTER_EPIL]]:265; CHECK-NEXT: [[ARRAYIDX_EPIL:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[I_UNR]]266; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[ARRAYIDX_EPIL]], align 4, !tbaa [[INT_TBAA0]]267; CHECK-NEXT: br label %[[FOR_INNER_EPIL:.*]]268; CHECK: [[FOR_INNER_EPIL]]:269; CHECK-NEXT: [[J_EPIL:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL]] ], [ [[INC_EPIL:%.*]], %[[FOR_INNER_EPIL]] ]270; CHECK-NEXT: [[SUM_EPIL:%.*]] = phi i32 [ [[TMP10]], %[[FOR_OUTER_EPIL]] ], [ [[ADD_EPIL:%.*]], %[[FOR_INNER_EPIL]] ]271; CHECK-NEXT: [[ARRAYIDX6_EPIL:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_EPIL]]272; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[ARRAYIDX6_EPIL]], align 4, !tbaa [[INT_TBAA0]]273; CHECK-NEXT: [[ADD_EPIL]] = add i32 [[TMP11]], [[SUM_EPIL]]274; CHECK-NEXT: [[INC_EPIL]] = add nuw i32 [[J_EPIL]], 1275; CHECK-NEXT: [[EXITCOND_EPIL:%.*]] = icmp eq i32 [[INC_EPIL]], [[E]]276; CHECK-NEXT: br i1 [[EXITCOND_EPIL]], label %[[FOR_LATCH_EPIL:.*]], label %[[FOR_INNER_EPIL]]277; CHECK: [[FOR_LATCH_EPIL]]:278; CHECK-NEXT: [[ADD_LCSSA_EPIL:%.*]] = phi i32 [ [[ADD_EPIL]], %[[FOR_INNER_EPIL]] ]279; CHECK-NEXT: store i32 [[ADD_LCSSA_EPIL]], ptr [[ARRAYIDX_EPIL]], align 4, !tbaa [[INT_TBAA0]]280; CHECK-NEXT: [[ADD9_EPIL:%.*]] = add nuw i32 [[I_UNR]], 1281; CHECK-NEXT: [[EPIL_ITER_CMP:%.*]] = icmp ne i32 1, [[XTRAITER]]282; CHECK-NEXT: br i1 [[EPIL_ITER_CMP]], label %[[FOR_OUTER_EPIL_1:.*]], label %[[FOR_END10_LOOPEXIT_EPILOG_LCSSA:.*]]283; CHECK: [[FOR_OUTER_EPIL_1]]:284; CHECK-NEXT: [[ARRAYIDX_EPIL_1:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD9_EPIL]]285; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX_EPIL_1]], align 4, !tbaa [[INT_TBAA0]]286; CHECK-NEXT: br label %[[FOR_INNER_EPIL_1:.*]]287; CHECK: [[FOR_INNER_EPIL_1]]:288; CHECK-NEXT: [[J_EPIL_1:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL_1]] ], [ [[INC_EPIL_1:%.*]], %[[FOR_INNER_EPIL_1]] ]289; CHECK-NEXT: [[SUM_EPIL_1:%.*]] = phi i32 [ [[TMP12]], %[[FOR_OUTER_EPIL_1]] ], [ [[ADD_EPIL_1:%.*]], %[[FOR_INNER_EPIL_1]] ]290; CHECK-NEXT: [[ARRAYIDX6_EPIL_1:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_EPIL_1]]291; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[ARRAYIDX6_EPIL_1]], align 4, !tbaa [[INT_TBAA0]]292; CHECK-NEXT: [[ADD_EPIL_1]] = add i32 [[TMP13]], [[SUM_EPIL_1]]293; CHECK-NEXT: [[INC_EPIL_1]] = add nuw i32 [[J_EPIL_1]], 1294; CHECK-NEXT: [[EXITCOND_EPIL_1:%.*]] = icmp eq i32 [[INC_EPIL_1]], [[E]]295; CHECK-NEXT: br i1 [[EXITCOND_EPIL_1]], label %[[FOR_LATCH_EPIL_1:.*]], label %[[FOR_INNER_EPIL_1]]296; CHECK: [[FOR_LATCH_EPIL_1]]:297; CHECK-NEXT: [[ADD_LCSSA_EPIL_1:%.*]] = phi i32 [ [[ADD_EPIL_1]], %[[FOR_INNER_EPIL_1]] ]298; CHECK-NEXT: store i32 [[ADD_LCSSA_EPIL_1]], ptr [[ARRAYIDX_EPIL_1]], align 4, !tbaa [[INT_TBAA0]]299; CHECK-NEXT: [[ADD9_EPIL_1:%.*]] = add nuw i32 [[I_UNR]], 2300; CHECK-NEXT: [[EPIL_ITER_CMP_1:%.*]] = icmp ne i32 2, [[XTRAITER]]301; CHECK-NEXT: br i1 [[EPIL_ITER_CMP_1]], label %[[FOR_OUTER_EPIL_2:.*]], label %[[FOR_END10_LOOPEXIT_EPILOG_LCSSA]]302; CHECK: [[FOR_OUTER_EPIL_2]]:303; CHECK-NEXT: [[ARRAYIDX_EPIL_2:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD9_EPIL_1]]304; CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[ARRAYIDX_EPIL_2]], align 4, !tbaa [[INT_TBAA0]]305; CHECK-NEXT: br label %[[FOR_INNER_EPIL_2:.*]]306; CHECK: [[FOR_INNER_EPIL_2]]:307; CHECK-NEXT: [[J_EPIL_2:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL_2]] ], [ [[INC_EPIL_2:%.*]], %[[FOR_INNER_EPIL_2]] ]308; CHECK-NEXT: [[SUM_EPIL_2:%.*]] = phi i32 [ [[TMP14]], %[[FOR_OUTER_EPIL_2]] ], [ [[ADD_EPIL_2:%.*]], %[[FOR_INNER_EPIL_2]] ]309; CHECK-NEXT: [[ARRAYIDX6_EPIL_2:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_EPIL_2]]310; CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARRAYIDX6_EPIL_2]], align 4, !tbaa [[INT_TBAA0]]311; CHECK-NEXT: [[ADD_EPIL_2]] = add i32 [[TMP15]], [[SUM_EPIL_2]]312; CHECK-NEXT: [[INC_EPIL_2]] = add nuw i32 [[J_EPIL_2]], 1313; CHECK-NEXT: [[EXITCOND_EPIL_2:%.*]] = icmp eq i32 [[INC_EPIL_2]], [[E]]314; CHECK-NEXT: br i1 [[EXITCOND_EPIL_2]], label %[[FOR_LATCH_EPIL_2:.*]], label %[[FOR_INNER_EPIL_2]]315; CHECK: [[FOR_LATCH_EPIL_2]]:316; CHECK-NEXT: [[ADD_LCSSA_EPIL_2:%.*]] = phi i32 [ [[ADD_EPIL_2]], %[[FOR_INNER_EPIL_2]] ]317; CHECK-NEXT: store i32 [[ADD_LCSSA_EPIL_2]], ptr [[ARRAYIDX_EPIL_2]], align 4, !tbaa [[INT_TBAA0]]318; CHECK-NEXT: br label %[[FOR_END10_LOOPEXIT_EPILOG_LCSSA]]319; CHECK: [[FOR_END10_LOOPEXIT_EPILOG_LCSSA]]:320; CHECK-NEXT: br label %[[FOR_END10_LOOPEXIT]]321; CHECK: [[FOR_END10_LOOPEXIT]]:322; CHECK-NEXT: br label %[[FOR_END10]]323; CHECK: [[FOR_END10]]:324; CHECK-NEXT: ret void325;326entry:327 %cmp = icmp ne i32 %E, 0328 %cmp125 = icmp ne i32 %I, 0329 %or.cond = and i1 %cmp, %cmp125330 br i1 %or.cond, label %for.outer.preheader, label %for.end10331 332for.outer.preheader:333 br label %for.outer334 335for.outer:336 %i = phi i32 [ %add9, %for.latch ], [ 0, %for.outer.preheader ]337 %arrayidx = getelementptr inbounds i32, ptr %A, i32 %i338 %0 = load i32, ptr %arrayidx, align 4, !tbaa !5339 br label %for.inner340 341for.inner:342 %j = phi i32 [ 0, %for.outer ], [ %inc, %for.inner ]343 %sum = phi i32 [ %0, %for.outer ], [ %add, %for.inner ]344 %arrayidx6 = getelementptr inbounds i32, ptr %B, i32 %j345 %1 = load i32, ptr %arrayidx6, align 4, !tbaa !5346 %add = add i32 %1, %sum347 %inc = add nuw i32 %j, 1348 %exitcond = icmp eq i32 %inc, %E349 br i1 %exitcond, label %for.latch, label %for.inner350 351for.latch:352 %add.lcssa = phi i32 [ %add, %for.inner ]353 store i32 %add.lcssa, ptr %arrayidx, align 4, !tbaa !5354 %add9 = add nuw i32 %i, 1355 %exitcond28 = icmp eq i32 %add9, %I356 br i1 %exitcond28, label %for.end10.loopexit, label %for.outer357 358for.end10.loopexit:359 br label %for.end10360 361for.end10:362 ret void363}364 365 366; Tests Complete unroll-and-jam of the outer loop367define void @test3(i32 %I, i32 %E, ptr noalias nocapture %A, ptr noalias nocapture readonly %B) #0 {368; CHECK-LABEL: define void @test3(369; CHECK-SAME: i32 [[I:%.*]], i32 [[E:%.*]], ptr noalias captures(none) [[A:%.*]], ptr noalias readonly captures(none) [[B:%.*]]) {370; CHECK-NEXT: [[ENTRY:.*:]]371; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[E]], 0372; CHECK-NEXT: br i1 [[CMP]], label %[[FOR_END:.*]], label %[[FOR_PREHEADER:.*]]373; CHECK: [[FOR_PREHEADER]]:374; CHECK-NEXT: br label %[[FOR_OUTER:.*]]375; CHECK: [[FOR_OUTER]]:376; CHECK-NEXT: br label %[[FOR_INNER:.*]]377; CHECK: [[FOR_INNER]]:378; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[INC:%.*]], %[[FOR_INNER]] ]379; CHECK-NEXT: [[SUM:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD:%.*]], %[[FOR_INNER]] ]380; CHECK-NEXT: [[J_1:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[INC_1:%.*]], %[[FOR_INNER]] ]381; CHECK-NEXT: [[SUM_1:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD_1:%.*]], %[[FOR_INNER]] ]382; CHECK-NEXT: [[J_2:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[INC_2:%.*]], %[[FOR_INNER]] ]383; CHECK-NEXT: [[SUM_2:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD_2:%.*]], %[[FOR_INNER]] ]384; CHECK-NEXT: [[J_3:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[INC_3:%.*]], %[[FOR_INNER]] ]385; CHECK-NEXT: [[SUM_3:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD_3:%.*]], %[[FOR_INNER]] ]386; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J]]387; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !tbaa [[INT_TBAA0]]388; CHECK-NEXT: [[SUB:%.*]] = add i32 [[SUM]], 10389; CHECK-NEXT: [[ADD]] = sub i32 [[SUB]], [[TMP0]]390; CHECK-NEXT: [[INC]] = add nuw i32 [[J]], 1391; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_1]]392; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX_1]], align 4, !tbaa [[INT_TBAA0]]393; CHECK-NEXT: [[SUB_1:%.*]] = add i32 [[SUM_1]], 10394; CHECK-NEXT: [[ADD_1]] = sub i32 [[SUB_1]], [[TMP1]]395; CHECK-NEXT: [[INC_1]] = add nuw i32 [[J_1]], 1396; CHECK-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_2]]397; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX_2]], align 4, !tbaa [[INT_TBAA0]]398; CHECK-NEXT: [[SUB_2:%.*]] = add i32 [[SUM_2]], 10399; CHECK-NEXT: [[ADD_2]] = sub i32 [[SUB_2]], [[TMP2]]400; CHECK-NEXT: [[INC_2]] = add nuw i32 [[J_2]], 1401; CHECK-NEXT: [[ARRAYIDX_3:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_3]]402; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[ARRAYIDX_3]], align 4, !tbaa [[INT_TBAA0]]403; CHECK-NEXT: [[SUB_3:%.*]] = add i32 [[SUM_3]], 10404; CHECK-NEXT: [[ADD_3]] = sub i32 [[SUB_3]], [[TMP3]]405; CHECK-NEXT: [[INC_3]] = add nuw i32 [[J_3]], 1406; CHECK-NEXT: [[EXITCOND_3:%.*]] = icmp eq i32 [[INC_3]], [[E]]407; CHECK-NEXT: br i1 [[EXITCOND_3]], label %[[FOR_LATCH:.*]], label %[[FOR_INNER]]408; CHECK: [[FOR_LATCH]]:409; CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD]], %[[FOR_INNER]] ]410; CHECK-NEXT: [[ADD_LCSSA_1:%.*]] = phi i32 [ [[ADD_1]], %[[FOR_INNER]] ]411; CHECK-NEXT: [[ADD_LCSSA_2:%.*]] = phi i32 [ [[ADD_2]], %[[FOR_INNER]] ]412; CHECK-NEXT: [[ADD_LCSSA_3:%.*]] = phi i32 [ [[ADD_3]], %[[FOR_INNER]] ]413; CHECK-NEXT: store i32 [[ADD_LCSSA]], ptr [[A]], align 4, !tbaa [[INT_TBAA0]]414; CHECK-NEXT: [[ARRAYIDX6_1:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 1415; CHECK-NEXT: store i32 [[ADD_LCSSA_1]], ptr [[ARRAYIDX6_1]], align 4, !tbaa [[INT_TBAA0]]416; CHECK-NEXT: [[ARRAYIDX6_2:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 2417; CHECK-NEXT: store i32 [[ADD_LCSSA_2]], ptr [[ARRAYIDX6_2]], align 4, !tbaa [[INT_TBAA0]]418; CHECK-NEXT: [[ARRAYIDX6_3:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 3419; CHECK-NEXT: store i32 [[ADD_LCSSA_3]], ptr [[ARRAYIDX6_3]], align 4, !tbaa [[INT_TBAA0]]420; CHECK-NEXT: br label %[[FOR_END_LOOPEXIT:.*]]421; CHECK: [[FOR_END_LOOPEXIT]]:422; CHECK-NEXT: br label %[[FOR_END]]423; CHECK: [[FOR_END]]:424; CHECK-NEXT: ret void425;426entry:427 %cmp = icmp eq i32 %E, 0428 br i1 %cmp, label %for.end, label %for.preheader429 430for.preheader:431 br label %for.outer432 433for.outer:434 %i = phi i32 [ %add8, %for.latch ], [ 0, %for.preheader ]435 br label %for.inner436 437for.inner:438 %j = phi i32 [ 0, %for.outer ], [ %inc, %for.inner ]439 %sum = phi i32 [ 0, %for.outer ], [ %add, %for.inner ]440 %arrayidx = getelementptr inbounds i32, ptr %B, i32 %j441 %0 = load i32, ptr %arrayidx, align 4, !tbaa !5442 %sub = add i32 %sum, 10443 %add = sub i32 %sub, %0444 %inc = add nuw i32 %j, 1445 %exitcond = icmp eq i32 %inc, %E446 br i1 %exitcond, label %for.latch, label %for.inner447 448for.latch:449 %arrayidx6 = getelementptr inbounds i32, ptr %A, i32 %i450 store i32 %add, ptr %arrayidx6, align 4, !tbaa !5451 %add8 = add nuw nsw i32 %i, 1452 %exitcond23 = icmp eq i32 %add8, 4453 br i1 %exitcond23, label %for.end, label %for.outer454 455for.end:456 ret void457}458 459 460; Tests Complete unroll-and-jam with a trip count of 1461define void @test4(i32 %I, i32 %E, ptr noalias nocapture %A, ptr noalias nocapture readonly %B) #0 {462; CHECK-LABEL: define void @test4(463; CHECK-SAME: i32 [[I:%.*]], i32 [[E:%.*]], ptr noalias captures(none) [[A:%.*]], ptr noalias readonly captures(none) [[B:%.*]]) {464; CHECK-NEXT: [[ENTRY:.*:]]465; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[E]], 0466; CHECK-NEXT: br i1 [[CMP]], label %[[FOR_END:.*]], label %[[FOR_PREHEADER:.*]]467; CHECK: [[FOR_PREHEADER]]:468; CHECK-NEXT: br label %[[FOR_OUTER:.*]]469; CHECK: [[FOR_OUTER]]:470; CHECK-NEXT: br label %[[FOR_INNER:.*]]471; CHECK: [[FOR_INNER]]:472; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[INC:%.*]], %[[FOR_INNER]] ]473; CHECK-NEXT: [[SUM:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD:%.*]], %[[FOR_INNER]] ]474; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J]]475; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !tbaa [[INT_TBAA0]]476; CHECK-NEXT: [[SUB:%.*]] = add i32 [[SUM]], 10477; CHECK-NEXT: [[ADD]] = sub i32 [[SUB]], [[TMP0]]478; CHECK-NEXT: [[INC]] = add nuw i32 [[J]], 1479; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], [[E]]480; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_LATCH:.*]], label %[[FOR_INNER]]481; CHECK: [[FOR_LATCH]]:482; CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD]], %[[FOR_INNER]] ]483; CHECK-NEXT: store i32 [[ADD_LCSSA]], ptr [[A]], align 4, !tbaa [[INT_TBAA0]]484; CHECK-NEXT: br label %[[FOR_END_LOOPEXIT:.*]]485; CHECK: [[FOR_END_LOOPEXIT]]:486; CHECK-NEXT: br label %[[FOR_END]]487; CHECK: [[FOR_END]]:488; CHECK-NEXT: ret void489;490entry:491 %cmp = icmp eq i32 %E, 0492 br i1 %cmp, label %for.end, label %for.preheader493 494for.preheader:495 br label %for.outer496 497for.outer:498 %i = phi i32 [ %add8, %for.latch ], [ 0, %for.preheader ]499 br label %for.inner500 501for.inner:502 %j = phi i32 [ 0, %for.outer ], [ %inc, %for.inner ]503 %sum = phi i32 [ 0, %for.outer ], [ %add, %for.inner ]504 %arrayidx = getelementptr inbounds i32, ptr %B, i32 %j505 %0 = load i32, ptr %arrayidx, align 4, !tbaa !5506 %sub = add i32 %sum, 10507 %add = sub i32 %sub, %0508 %inc = add nuw i32 %j, 1509 %exitcond = icmp eq i32 %inc, %E510 br i1 %exitcond, label %for.latch, label %for.inner511 512for.latch:513 %arrayidx6 = getelementptr inbounds i32, ptr %A, i32 %i514 store i32 %add, ptr %arrayidx6, align 4, !tbaa !5515 %add8 = add nuw nsw i32 %i, 1516 %exitcond23 = icmp eq i32 %add8, 1517 br i1 %exitcond23, label %for.end, label %for.outer518 519for.end:520 ret void521}522 523 524; Multiple SubLoopBlocks525@a = hidden global [1 x i32] zeroinitializer, align 4526define i32 @test5() #0 {527; CHECK-LABEL: define i32 @test5() {528; CHECK-NEXT: [[ENTRY:.*:]]529; CHECK-NEXT: br label %[[FOR_OUTER:.*]]530; CHECK: [[FOR_OUTER]]:531; CHECK-NEXT: br label %[[FOR_INNER:.*]]532; CHECK: [[FOR_INNER]]:533; CHECK-NEXT: [[INC8_SINK15:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[INC8:%.*]], %[[FOR_INC_1:.*]] ]534; CHECK-NEXT: [[INC8_SINK15_1:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[INC8_1:%.*]], %[[FOR_INC_1]] ]535; CHECK-NEXT: br label %[[FOR_INNER2:.*]]536; CHECK: [[FOR_INNER2]]:537; CHECK-NEXT: [[L1:%.*]] = load i32, ptr @a, align 4538; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[L1]], 0539; CHECK-NEXT: br i1 [[TOBOOL]], label %[[FOR_COND4:.*]], label %[[FOR_INC:.*]]540; CHECK: [[FOR_COND4]]:541; CHECK-NEXT: [[L0:%.*]] = load i32, ptr getelementptr inbounds ([1 x i32], ptr @a, i32 1, i32 0), align 4542; CHECK-NEXT: [[TOBOOL_1:%.*]] = icmp eq i32 [[L0]], 0543; CHECK-NEXT: br i1 [[TOBOOL_1]], label %[[FOR_COND4A:.*]], label %[[FOR_INC]]544; CHECK: [[FOR_COND4A]]:545; CHECK-NEXT: br label %[[FOR_INC]]546; CHECK: [[FOR_INC]]:547; CHECK-NEXT: [[INC8]] = add nuw nsw i32 [[INC8_SINK15]], 1548; CHECK-NEXT: [[L1_1:%.*]] = load i32, ptr @a, align 4549; CHECK-NEXT: [[TOBOOL_11:%.*]] = icmp eq i32 [[L1_1]], 0550; CHECK-NEXT: br i1 [[TOBOOL_11]], label %[[FOR_COND4_1:.*]], label %[[FOR_INC_1]]551; CHECK: [[FOR_LATCH:.*]]:552; CHECK-NEXT: [[DOTLCSSA_1:%.*]] = phi i32 [ [[L2_1:%.*]], %[[FOR_INC_1]] ]553; CHECK-NEXT: br label %[[FOR_END:.*]]554; CHECK: [[FOR_END]]:555; CHECK-NEXT: [[DOTLCSSA_LCSSA:%.*]] = phi i32 [ [[DOTLCSSA_1]], %[[FOR_LATCH]] ]556; CHECK-NEXT: ret i32 0557; CHECK: [[FOR_COND4_1]]:558; CHECK-NEXT: [[L0_1:%.*]] = load i32, ptr getelementptr inbounds ([1 x i32], ptr @a, i32 1, i32 0), align 4559; CHECK-NEXT: [[TOBOOL_1_1:%.*]] = icmp eq i32 [[L0_1]], 0560; CHECK-NEXT: br i1 [[TOBOOL_1_1]], label %[[FOR_COND4A_1:.*]], label %[[FOR_INC_1]]561; CHECK: [[FOR_COND4A_1]]:562; CHECK-NEXT: br label %[[FOR_INC_1]]563; CHECK: [[FOR_INC_1]]:564; CHECK-NEXT: [[L2_1]] = phi i32 [ 0, %[[FOR_INC]] ], [ 1, %[[FOR_COND4_1]] ], [ 2, %[[FOR_COND4A_1]] ]565; CHECK-NEXT: [[INC8_1]] = add nuw nsw i32 [[INC8_SINK15_1]], 1566; CHECK-NEXT: [[EXITCOND_1:%.*]] = icmp eq i32 [[INC8_1]], 3567; CHECK-NEXT: br i1 [[EXITCOND_1]], label %[[FOR_LATCH]], label %[[FOR_INNER]]568;569entry:570 br label %for.outer571 572for.outer:573 %.sink16 = phi i32 [ 0, %entry ], [ %add, %for.latch ]574 br label %for.inner575 576for.inner:577 %inc8.sink15 = phi i32 [ 0, %for.outer ], [ %inc8, %for.inc ]578 br label %for.inner2579 580for.inner2:581 %l1 = load i32, ptr @a, align 4582 %tobool = icmp eq i32 %l1, 0583 br i1 %tobool, label %for.cond4, label %for.inc584 585for.cond4:586 %l0 = load i32, ptr getelementptr inbounds ([1 x i32], ptr @a, i32 1, i32 0), align 4587 %tobool.1 = icmp eq i32 %l0, 0588 br i1 %tobool.1, label %for.cond4a, label %for.inc589 590for.cond4a:591 br label %for.inc592 593for.inc:594 %l2 = phi i32 [ 0, %for.inner2 ], [ 1, %for.cond4 ], [ 2, %for.cond4a ]595 %inc8 = add nuw nsw i32 %inc8.sink15, 1596 %exitcond = icmp eq i32 %inc8, 3597 br i1 %exitcond, label %for.latch, label %for.inner598 599for.latch:600 %.lcssa = phi i32 [ %l2, %for.inc ]601 %conv11 = and i32 %.sink16, 255602 %add = add nuw nsw i32 %conv11, 4603 %cmp = icmp eq i32 %add, 8604 br i1 %cmp, label %for.end, label %for.outer605 606for.end:607 %.lcssa.lcssa = phi i32 [ %.lcssa, %for.latch ]608 ret i32 0609}610 611 612; Test odd uses of phi nodes613@f = hidden global i32 0, align 4614define i32 @test6() #0 {615; CHECK-LABEL: define i32 @test6() {616; CHECK-NEXT: [[ENTRY:.*]]:617; CHECK-NEXT: [[F_PROMOTED10:%.*]] = load i32, ptr @f, align 4, !tbaa [[INT_TBAA0]]618; CHECK-NEXT: br i1 false, label %[[FOR_OUTER_EPIL_PREHEADER:.*]], label %[[ENTRY_NEW:.*]]619; CHECK: [[ENTRY_NEW]]:620; CHECK-NEXT: br label %[[FOR_OUTER:.*]]621; CHECK: [[FOR_OUTER]]:622; CHECK-NEXT: [[INC5_SINK9:%.*]] = phi i32 [ 2, %[[ENTRY_NEW]] ], [ [[INC5_3:%.*]], %[[FOR_LATCH:.*]] ]623; CHECK-NEXT: [[NITER:%.*]] = phi i32 [ 0, %[[ENTRY_NEW]] ], [ [[NITER_NEXT_3:%.*]], %[[FOR_LATCH]] ]624; CHECK-NEXT: [[INC5_3]] = add nuw nsw i32 [[INC5_SINK9]], 4625; CHECK-NEXT: [[NITER_NEXT_3]] = add nuw nsw i32 [[NITER]], 4626; CHECK-NEXT: br label %[[FOR_INNER:.*]]627; CHECK: [[FOR_INNER]]:628; CHECK-NEXT: [[INC_SINK8:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[INC:%.*]], %[[FOR_INNER]] ]629; CHECK-NEXT: [[INC_SINK8_1:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[INC_1:%.*]], %[[FOR_INNER]] ]630; CHECK-NEXT: [[INC_SINK8_2:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[INC_2:%.*]], %[[FOR_INNER]] ]631; CHECK-NEXT: [[INC_SINK8_3:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[INC_3:%.*]], %[[FOR_INNER]] ]632; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[INC_SINK8]], 1633; CHECK-NEXT: [[INC_1]] = add nuw nsw i32 [[INC_SINK8_1]], 1634; CHECK-NEXT: [[INC_2]] = add nuw nsw i32 [[INC_SINK8_2]], 1635; CHECK-NEXT: [[INC_3]] = add nuw nsw i32 [[INC_SINK8_3]], 1636; CHECK-NEXT: [[EXITCOND_3:%.*]] = icmp ne i32 [[INC_3]], 7637; CHECK-NEXT: br i1 [[EXITCOND_3]], label %[[FOR_INNER]], label %[[FOR_LATCH]]638; CHECK: [[FOR_LATCH]]:639; CHECK-NEXT: br i1 false, label %[[FOR_OUTER]], label %[[FOR_END_UNR_LCSSA:.*]], !llvm.loop [[LOOP7:![0-9]+]]640; CHECK: [[FOR_END_UNR_LCSSA]]:641; CHECK-NEXT: [[DOTLCSSA_LCSSA_PH_PH:%.*]] = phi i32 [ 2, %[[FOR_LATCH]] ]642; CHECK-NEXT: [[INC_LCSSA_LCSSA_PH_PH:%.*]] = phi i32 [ 7, %[[FOR_LATCH]] ]643; CHECK-NEXT: [[P0_UNR_PH:%.*]] = phi i32 [ 2, %[[FOR_LATCH]] ]644; CHECK-NEXT: br i1 true, label %[[FOR_OUTER_EPIL_PREHEADER]], label %[[FOR_END:.*]]645; CHECK: [[FOR_OUTER_EPIL_PREHEADER]]:646; CHECK-NEXT: [[P0_UNR:%.*]] = phi i32 [ [[F_PROMOTED10]], %[[ENTRY]] ], [ [[P0_UNR_PH]], %[[FOR_END_UNR_LCSSA]] ]647; CHECK-NEXT: call void @llvm.assume(i1 true)648; CHECK-NEXT: br label %[[FOR_OUTER_EPIL:.*]]649; CHECK: [[FOR_OUTER_EPIL]]:650; CHECK-NEXT: br label %[[FOR_INNER_EPIL:.*]]651; CHECK: [[FOR_INNER_EPIL]]:652; CHECK-NEXT: [[P1_EPIL:%.*]] = phi i32 [ [[P0_UNR]], %[[FOR_OUTER_EPIL]] ], [ 2, %[[FOR_INNER_EPIL]] ]653; CHECK-NEXT: [[INC_SINK8_EPIL:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL]] ], [ [[INC_EPIL:%.*]], %[[FOR_INNER_EPIL]] ]654; CHECK-NEXT: [[INC_EPIL]] = add nuw nsw i32 [[INC_SINK8_EPIL]], 1655; CHECK-NEXT: [[EXITCOND_EPIL:%.*]] = icmp ne i32 [[INC_EPIL]], 7656; CHECK-NEXT: br i1 [[EXITCOND_EPIL]], label %[[FOR_INNER_EPIL]], label %[[FOR_LATCH_EPIL:.*]]657; CHECK: [[FOR_LATCH_EPIL]]:658; CHECK-NEXT: [[DOTLCSSA_EPIL:%.*]] = phi i32 [ [[P1_EPIL]], %[[FOR_INNER_EPIL]] ]659; CHECK-NEXT: br label %[[FOR_END]]660; CHECK: [[FOR_END]]:661; CHECK-NEXT: [[DOTLCSSA_LCSSA:%.*]] = phi i32 [ [[DOTLCSSA_LCSSA_PH_PH]], %[[FOR_END_UNR_LCSSA]] ], [ [[DOTLCSSA_EPIL]], %[[FOR_LATCH_EPIL]] ]662; CHECK-NEXT: [[INC_LCSSA_LCSSA:%.*]] = phi i32 [ [[INC_LCSSA_LCSSA_PH_PH]], %[[FOR_END_UNR_LCSSA]] ], [ 7, %[[FOR_LATCH_EPIL]] ]663; CHECK-NEXT: ret i32 0664;665entry:666 %f.promoted10 = load i32, ptr @f, align 4, !tbaa !5667 br label %for.outer668 669for.outer:670 %p0 = phi i32 [ %f.promoted10, %entry ], [ 2, %for.latch ]671 %inc5.sink9 = phi i32 [ 2, %entry ], [ %inc5, %for.latch ]672 br label %for.inner673 674for.inner:675 %p1 = phi i32 [ %p0, %for.outer ], [ 2, %for.inner ]676 %inc.sink8 = phi i32 [ 0, %for.outer ], [ %inc, %for.inner ]677 %inc = add nuw nsw i32 %inc.sink8, 1678 %exitcond = icmp ne i32 %inc, 7679 br i1 %exitcond, label %for.inner, label %for.latch680 681for.latch:682 %.lcssa = phi i32 [ %p1, %for.inner ]683 %inc5 = add nuw nsw i32 %inc5.sink9, 1684 %exitcond11 = icmp ne i32 %inc5, 7685 br i1 %exitcond11, label %for.outer, label %for.end686 687for.end:688 %.lcssa.lcssa = phi i32 [ %.lcssa, %for.latch ]689 %inc.lcssa.lcssa = phi i32 [ 7, %for.latch ]690 ret i32 0691}692 693 694; Has a positive dependency between two stores. Still valid.695; The negative dependecy is in unroll-and-jam-disabled.ll696define void @test7(i32 %I, i32 %E, ptr noalias nocapture %A, ptr noalias nocapture readonly %B) #0 {697; CHECK-LABEL: define void @test7(698; CHECK-SAME: i32 [[I:%.*]], i32 [[E:%.*]], ptr noalias captures(none) [[A:%.*]], ptr noalias readonly captures(none) [[B:%.*]]) {699; CHECK-NEXT: [[ENTRY:.*:]]700; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[E]], 0701; CHECK-NEXT: [[CMP128:%.*]] = icmp ne i32 [[I]], 0702; CHECK-NEXT: [[OR_COND:%.*]] = and i1 [[CMP128]], [[CMP]]703; CHECK-NEXT: br i1 [[OR_COND]], label %[[FOR_PREHEADER:.*]], label %[[FOR_END:.*]]704; CHECK: [[FOR_PREHEADER]]:705; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[I]], -1706; CHECK-NEXT: [[XTRAITER:%.*]] = and i32 [[I]], 3707; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[TMP0]], 3708; CHECK-NEXT: br i1 [[TMP1]], label %[[FOR_OUTER_EPIL_PREHEADER:.*]], label %[[FOR_PREHEADER_NEW:.*]]709; CHECK: [[FOR_PREHEADER_NEW]]:710; CHECK-NEXT: [[UNROLL_ITER:%.*]] = sub i32 [[I]], [[XTRAITER]]711; CHECK-NEXT: br label %[[FOR_OUTER:.*]]712; CHECK: [[FOR_OUTER]]:713; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[ADD_3:%.*]], %[[FOR_LATCH:.*]] ], [ 0, %[[FOR_PREHEADER_NEW]] ]714; CHECK-NEXT: [[NITER:%.*]] = phi i32 [ 0, %[[FOR_PREHEADER_NEW]] ], [ [[NITER_NEXT_3:%.*]], %[[FOR_LATCH]] ]715; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[I]]716; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !tbaa [[INT_TBAA0]]717; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[I]], 1718; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD]]719; CHECK-NEXT: store i32 2, ptr [[ARRAYIDX2]], align 4, !tbaa [[INT_TBAA0]]720; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD]]721; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX_1]], align 4, !tbaa [[INT_TBAA0]]722; CHECK-NEXT: [[ADD_1:%.*]] = add nuw nsw i32 [[I]], 2723; CHECK-NEXT: [[ARRAYIDX2_1:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD_1]]724; CHECK-NEXT: store i32 2, ptr [[ARRAYIDX2_1]], align 4, !tbaa [[INT_TBAA0]]725; CHECK-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD_1]]726; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX_2]], align 4, !tbaa [[INT_TBAA0]]727; CHECK-NEXT: [[ADD_2:%.*]] = add nuw nsw i32 [[I]], 3728; CHECK-NEXT: [[ARRAYIDX2_2:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD_2]]729; CHECK-NEXT: store i32 2, ptr [[ARRAYIDX2_2]], align 4, !tbaa [[INT_TBAA0]]730; CHECK-NEXT: [[ARRAYIDX_3:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD_2]]731; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX_3]], align 4, !tbaa [[INT_TBAA0]]732; CHECK-NEXT: [[ADD_3]] = add nuw i32 [[I]], 4733; CHECK-NEXT: [[ARRAYIDX2_3:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD_3]]734; CHECK-NEXT: store i32 2, ptr [[ARRAYIDX2_3]], align 4, !tbaa [[INT_TBAA0]]735; CHECK-NEXT: [[NITER_NEXT_3]] = add i32 [[NITER]], 4736; CHECK-NEXT: br label %[[FOR_INNER:.*]]737; CHECK: [[FOR_LATCH]]:738; CHECK-NEXT: [[ADD9_LCSSA:%.*]] = phi i32 [ [[ADD9:%.*]], %[[FOR_INNER]] ]739; CHECK-NEXT: [[ADD9_LCSSA_1:%.*]] = phi i32 [ [[ADD9_1:%.*]], %[[FOR_INNER]] ]740; CHECK-NEXT: [[ADD9_LCSSA_2:%.*]] = phi i32 [ [[ADD9_2:%.*]], %[[FOR_INNER]] ]741; CHECK-NEXT: [[ADD9_LCSSA_3:%.*]] = phi i32 [ [[ADD9_3:%.*]], %[[FOR_INNER]] ]742; CHECK-NEXT: store i32 [[ADD9_LCSSA]], ptr [[ARRAYIDX]], align 4, !tbaa [[INT_TBAA0]]743; CHECK-NEXT: store i32 [[ADD9_LCSSA_1]], ptr [[ARRAYIDX_1]], align 4, !tbaa [[INT_TBAA0]]744; CHECK-NEXT: store i32 [[ADD9_LCSSA_2]], ptr [[ARRAYIDX_2]], align 4, !tbaa [[INT_TBAA0]]745; CHECK-NEXT: store i32 [[ADD9_LCSSA_3]], ptr [[ARRAYIDX_3]], align 4, !tbaa [[INT_TBAA0]]746; CHECK-NEXT: [[NITER_NCMP_3:%.*]] = icmp eq i32 [[NITER_NEXT_3]], [[UNROLL_ITER]]747; CHECK-NEXT: br i1 [[NITER_NCMP_3]], label %[[FOR_END_LOOPEXIT_UNR_LCSSA:.*]], label %[[FOR_OUTER]], !llvm.loop [[LOOP8:![0-9]+]]748; CHECK: [[FOR_INNER]]:749; CHECK-NEXT: [[SUM:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD9]], %[[FOR_INNER]] ]750; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD10:%.*]], %[[FOR_INNER]] ]751; CHECK-NEXT: [[SUM_1:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD9_1]], %[[FOR_INNER]] ]752; CHECK-NEXT: [[J_1:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD10_1:%.*]], %[[FOR_INNER]] ]753; CHECK-NEXT: [[SUM_2:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD9_2]], %[[FOR_INNER]] ]754; CHECK-NEXT: [[J_2:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD10_2:%.*]], %[[FOR_INNER]] ]755; CHECK-NEXT: [[SUM_3:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD9_3]], %[[FOR_INNER]] ]756; CHECK-NEXT: [[J_3:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD10_3:%.*]], %[[FOR_INNER]] ]757; CHECK-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J]]758; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[ARRAYIDX7]], align 4, !tbaa [[INT_TBAA0]]759; CHECK-NEXT: [[ADD9]] = add i32 [[L1]], [[SUM]]760; CHECK-NEXT: [[ADD10]] = add nuw i32 [[J]], 1761; CHECK-NEXT: [[ARRAYIDX7_1:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_1]]762; CHECK-NEXT: [[L1_1:%.*]] = load i32, ptr [[ARRAYIDX7_1]], align 4, !tbaa [[INT_TBAA0]]763; CHECK-NEXT: [[ADD9_1]] = add i32 [[L1_1]], [[SUM_1]]764; CHECK-NEXT: [[ADD10_1]] = add nuw i32 [[J_1]], 1765; CHECK-NEXT: [[ARRAYIDX7_2:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_2]]766; CHECK-NEXT: [[L1_2:%.*]] = load i32, ptr [[ARRAYIDX7_2]], align 4, !tbaa [[INT_TBAA0]]767; CHECK-NEXT: [[ADD9_2]] = add i32 [[L1_2]], [[SUM_2]]768; CHECK-NEXT: [[ADD10_2]] = add nuw i32 [[J_2]], 1769; CHECK-NEXT: [[ARRAYIDX7_3:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_3]]770; CHECK-NEXT: [[L1_3:%.*]] = load i32, ptr [[ARRAYIDX7_3]], align 4, !tbaa [[INT_TBAA0]]771; CHECK-NEXT: [[ADD9_3]] = add i32 [[L1_3]], [[SUM_3]]772; CHECK-NEXT: [[ADD10_3]] = add nuw i32 [[J_3]], 1773; CHECK-NEXT: [[EXITCOND_3:%.*]] = icmp eq i32 [[ADD10_3]], [[E]]774; CHECK-NEXT: br i1 [[EXITCOND_3]], label %[[FOR_LATCH]], label %[[FOR_INNER]]775; CHECK: [[FOR_END_LOOPEXIT_UNR_LCSSA]]:776; CHECK-NEXT: [[I_UNR1:%.*]] = phi i32 [ [[ADD_3]], %[[FOR_LATCH]] ]777; CHECK-NEXT: [[LCMP_MOD:%.*]] = icmp ne i32 [[XTRAITER]], 0778; CHECK-NEXT: br i1 [[LCMP_MOD]], label %[[FOR_OUTER_EPIL_PREHEADER]], label %[[FOR_END_LOOPEXIT:.*]]779; CHECK: [[FOR_OUTER_EPIL_PREHEADER]]:780; CHECK-NEXT: [[I_UNR:%.*]] = phi i32 [ 0, %[[FOR_PREHEADER]] ], [ [[I_UNR1]], %[[FOR_END_LOOPEXIT_UNR_LCSSA]] ]781; CHECK-NEXT: [[LCMP_MOD1:%.*]] = icmp ne i32 [[XTRAITER]], 0782; CHECK-NEXT: call void @llvm.assume(i1 [[LCMP_MOD1]])783; CHECK-NEXT: br label %[[FOR_OUTER_EPIL:.*]]784; CHECK: [[FOR_OUTER_EPIL]]:785; CHECK-NEXT: [[ARRAYIDX_EPIL:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[I_UNR]]786; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX_EPIL]], align 4, !tbaa [[INT_TBAA0]]787; CHECK-NEXT: [[ADD_EPIL:%.*]] = add nuw i32 [[I_UNR]], 1788; CHECK-NEXT: [[ARRAYIDX2_EPIL:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD_EPIL]]789; CHECK-NEXT: store i32 2, ptr [[ARRAYIDX2_EPIL]], align 4, !tbaa [[INT_TBAA0]]790; CHECK-NEXT: br label %[[FOR_INNER_EPIL:.*]]791; CHECK: [[FOR_INNER_EPIL]]:792; CHECK-NEXT: [[SUM_EPIL:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL]] ], [ [[ADD9_EPIL:%.*]], %[[FOR_INNER_EPIL]] ]793; CHECK-NEXT: [[J_EPIL:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL]] ], [ [[ADD10_EPIL:%.*]], %[[FOR_INNER_EPIL]] ]794; CHECK-NEXT: [[ARRAYIDX7_EPIL:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_EPIL]]795; CHECK-NEXT: [[L1_EPIL:%.*]] = load i32, ptr [[ARRAYIDX7_EPIL]], align 4, !tbaa [[INT_TBAA0]]796; CHECK-NEXT: [[ADD9_EPIL]] = add i32 [[L1_EPIL]], [[SUM_EPIL]]797; CHECK-NEXT: [[ADD10_EPIL]] = add nuw i32 [[J_EPIL]], 1798; CHECK-NEXT: [[EXITCOND_EPIL:%.*]] = icmp eq i32 [[ADD10_EPIL]], [[E]]799; CHECK-NEXT: br i1 [[EXITCOND_EPIL]], label %[[FOR_LATCH_EPIL:.*]], label %[[FOR_INNER_EPIL]]800; CHECK: [[FOR_LATCH_EPIL]]:801; CHECK-NEXT: [[ADD9_LCSSA_EPIL:%.*]] = phi i32 [ [[ADD9_EPIL]], %[[FOR_INNER_EPIL]] ]802; CHECK-NEXT: store i32 [[ADD9_LCSSA_EPIL]], ptr [[ARRAYIDX_EPIL]], align 4, !tbaa [[INT_TBAA0]]803; CHECK-NEXT: [[EPIL_ITER_CMP:%.*]] = icmp ne i32 1, [[XTRAITER]]804; CHECK-NEXT: br i1 [[EPIL_ITER_CMP]], label %[[FOR_OUTER_EPIL_1:.*]], label %[[FOR_END_LOOPEXIT_EPILOG_LCSSA:.*]]805; CHECK: [[FOR_OUTER_EPIL_1]]:806; CHECK-NEXT: [[ARRAYIDX_EPIL_1:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD_EPIL]]807; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX_EPIL_1]], align 4, !tbaa [[INT_TBAA0]]808; CHECK-NEXT: [[ADD_EPIL_1:%.*]] = add nuw i32 [[I_UNR]], 2809; CHECK-NEXT: [[ARRAYIDX2_EPIL_1:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD_EPIL_1]]810; CHECK-NEXT: store i32 2, ptr [[ARRAYIDX2_EPIL_1]], align 4, !tbaa [[INT_TBAA0]]811; CHECK-NEXT: br label %[[FOR_INNER_EPIL_1:.*]]812; CHECK: [[FOR_INNER_EPIL_1]]:813; CHECK-NEXT: [[SUM_EPIL_1:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL_1]] ], [ [[ADD9_EPIL_1:%.*]], %[[FOR_INNER_EPIL_1]] ]814; CHECK-NEXT: [[J_EPIL_1:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL_1]] ], [ [[ADD10_EPIL_1:%.*]], %[[FOR_INNER_EPIL_1]] ]815; CHECK-NEXT: [[ARRAYIDX7_EPIL_1:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_EPIL_1]]816; CHECK-NEXT: [[L1_EPIL_1:%.*]] = load i32, ptr [[ARRAYIDX7_EPIL_1]], align 4, !tbaa [[INT_TBAA0]]817; CHECK-NEXT: [[ADD9_EPIL_1]] = add i32 [[L1_EPIL_1]], [[SUM_EPIL_1]]818; CHECK-NEXT: [[ADD10_EPIL_1]] = add nuw i32 [[J_EPIL_1]], 1819; CHECK-NEXT: [[EXITCOND_EPIL_1:%.*]] = icmp eq i32 [[ADD10_EPIL_1]], [[E]]820; CHECK-NEXT: br i1 [[EXITCOND_EPIL_1]], label %[[FOR_LATCH_EPIL_1:.*]], label %[[FOR_INNER_EPIL_1]]821; CHECK: [[FOR_LATCH_EPIL_1]]:822; CHECK-NEXT: [[ADD9_LCSSA_EPIL_1:%.*]] = phi i32 [ [[ADD9_EPIL_1]], %[[FOR_INNER_EPIL_1]] ]823; CHECK-NEXT: store i32 [[ADD9_LCSSA_EPIL_1]], ptr [[ARRAYIDX_EPIL_1]], align 4, !tbaa [[INT_TBAA0]]824; CHECK-NEXT: [[EPIL_ITER_CMP_1:%.*]] = icmp ne i32 2, [[XTRAITER]]825; CHECK-NEXT: br i1 [[EPIL_ITER_CMP_1]], label %[[FOR_OUTER_EPIL_2:.*]], label %[[FOR_END_LOOPEXIT_EPILOG_LCSSA]]826; CHECK: [[FOR_OUTER_EPIL_2]]:827; CHECK-NEXT: [[ARRAYIDX_EPIL_2:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD_EPIL_1]]828; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX_EPIL_2]], align 4, !tbaa [[INT_TBAA0]]829; CHECK-NEXT: [[ADD_EPIL_2:%.*]] = add nuw i32 [[I_UNR]], 3830; CHECK-NEXT: [[ARRAYIDX2_EPIL_2:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD_EPIL_2]]831; CHECK-NEXT: store i32 2, ptr [[ARRAYIDX2_EPIL_2]], align 4, !tbaa [[INT_TBAA0]]832; CHECK-NEXT: br label %[[FOR_INNER_EPIL_2:.*]]833; CHECK: [[FOR_INNER_EPIL_2]]:834; CHECK-NEXT: [[SUM_EPIL_2:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL_2]] ], [ [[ADD9_EPIL_2:%.*]], %[[FOR_INNER_EPIL_2]] ]835; CHECK-NEXT: [[J_EPIL_2:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL_2]] ], [ [[ADD10_EPIL_2:%.*]], %[[FOR_INNER_EPIL_2]] ]836; CHECK-NEXT: [[ARRAYIDX7_EPIL_2:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_EPIL_2]]837; CHECK-NEXT: [[L1_EPIL_2:%.*]] = load i32, ptr [[ARRAYIDX7_EPIL_2]], align 4, !tbaa [[INT_TBAA0]]838; CHECK-NEXT: [[ADD9_EPIL_2]] = add i32 [[L1_EPIL_2]], [[SUM_EPIL_2]]839; CHECK-NEXT: [[ADD10_EPIL_2]] = add nuw i32 [[J_EPIL_2]], 1840; CHECK-NEXT: [[EXITCOND_EPIL_2:%.*]] = icmp eq i32 [[ADD10_EPIL_2]], [[E]]841; CHECK-NEXT: br i1 [[EXITCOND_EPIL_2]], label %[[FOR_LATCH_EPIL_2:.*]], label %[[FOR_INNER_EPIL_2]]842; CHECK: [[FOR_LATCH_EPIL_2]]:843; CHECK-NEXT: [[ADD9_LCSSA_EPIL_2:%.*]] = phi i32 [ [[ADD9_EPIL_2]], %[[FOR_INNER_EPIL_2]] ]844; CHECK-NEXT: store i32 [[ADD9_LCSSA_EPIL_2]], ptr [[ARRAYIDX_EPIL_2]], align 4, !tbaa [[INT_TBAA0]]845; CHECK-NEXT: br label %[[FOR_END_LOOPEXIT_EPILOG_LCSSA]]846; CHECK: [[FOR_END_LOOPEXIT_EPILOG_LCSSA]]:847; CHECK-NEXT: br label %[[FOR_END_LOOPEXIT]]848; CHECK: [[FOR_END_LOOPEXIT]]:849; CHECK-NEXT: br label %[[FOR_END]]850; CHECK: [[FOR_END]]:851; CHECK-NEXT: ret void852;853entry:854 %cmp = icmp ne i32 %E, 0855 %cmp128 = icmp ne i32 %I, 0856 %or.cond = and i1 %cmp128, %cmp857 br i1 %or.cond, label %for.preheader, label %for.end858 859for.preheader:860 br label %for.outer861 862for.outer:863 %i = phi i32 [ %add, %for.latch ], [ 0, %for.preheader ]864 %arrayidx = getelementptr inbounds i32, ptr %A, i32 %i865 store i32 0, ptr %arrayidx, align 4, !tbaa !5866 %add = add nuw i32 %i, 1867 %arrayidx2 = getelementptr inbounds i32, ptr %A, i32 %add868 store i32 2, ptr %arrayidx2, align 4, !tbaa !5869 br label %for.inner870 871for.latch:872 store i32 %add9, ptr %arrayidx, align 4, !tbaa !5873 %exitcond30 = icmp eq i32 %add, %I874 br i1 %exitcond30, label %for.end, label %for.outer875 876for.inner:877 %sum = phi i32 [ 0, %for.outer ], [ %add9, %for.inner ]878 %j = phi i32 [ 0, %for.outer ], [ %add10, %for.inner ]879 %arrayidx7 = getelementptr inbounds i32, ptr %B, i32 %j880 %l1 = load i32, ptr %arrayidx7, align 4, !tbaa !5881 %add9 = add i32 %l1, %sum882 %add10 = add nuw i32 %j, 1883 %exitcond = icmp eq i32 %add10, %E884 br i1 %exitcond, label %for.latch, label %for.inner885 886for.end:887 ret void888}889 890 891; Same as test7 with an extra outer loop nest892define void @test8(i32 %I, i32 %E, ptr noalias nocapture %A, ptr noalias nocapture readonly %B) #0 {893; CHECK-LABEL: define void @test8(894; CHECK-SAME: i32 [[I:%.*]], i32 [[E:%.*]], ptr noalias captures(none) [[A:%.*]], ptr noalias readonly captures(none) [[B:%.*]]) {895; CHECK-NEXT: [[ENTRY:.*:]]896; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[E]], 0897; CHECK-NEXT: [[CMP336:%.*]] = icmp eq i32 [[I]], 0898; CHECK-NEXT: [[OR_COND:%.*]] = or i1 [[CMP]], [[CMP336]]899; CHECK-NEXT: br i1 [[OR_COND]], label %[[FOR_END:.*]], label %[[FOR_PREHEADER:.*]]900; CHECK: [[FOR_PREHEADER]]:901; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[I]], -1902; CHECK-NEXT: br label %[[FOR_OUTEST:.*]]903; CHECK: [[FOR_OUTEST]]:904; CHECK-NEXT: [[X_038:%.*]] = phi i32 [ [[INC:%.*]], %[[FOR_CLEANUP:.*]] ], [ 0, %[[FOR_PREHEADER]] ]905; CHECK-NEXT: [[XTRAITER:%.*]] = and i32 [[I]], 3906; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[TMP0]], 3907; CHECK-NEXT: br i1 [[TMP1]], label %[[FOR_OUTER_EPIL_PREHEADER:.*]], label %[[FOR_OUTEST_NEW:.*]]908; CHECK: [[FOR_OUTEST_NEW]]:909; CHECK-NEXT: [[UNROLL_ITER:%.*]] = sub i32 [[I]], [[XTRAITER]]910; CHECK-NEXT: br label %[[FOR_OUTER:.*]]911; CHECK: [[FOR_OUTER]]:912; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[ADD_3:%.*]], %[[FOR_LATCH:.*]] ], [ 0, %[[FOR_OUTEST_NEW]] ]913; CHECK-NEXT: [[NITER:%.*]] = phi i32 [ 0, %[[FOR_OUTEST_NEW]] ], [ [[NITER_NEXT_3:%.*]], %[[FOR_LATCH]] ]914; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[I]]915; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !tbaa [[INT_TBAA0]]916; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[I]], 1917; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD]]918; CHECK-NEXT: store i32 2, ptr [[ARRAYIDX6]], align 4, !tbaa [[INT_TBAA0]]919; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD]]920; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX_1]], align 4, !tbaa [[INT_TBAA0]]921; CHECK-NEXT: [[ADD_1:%.*]] = add nuw nsw i32 [[I]], 2922; CHECK-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD_1]]923; CHECK-NEXT: store i32 2, ptr [[ARRAYIDX_2]], align 4, !tbaa [[INT_TBAA0]]924; CHECK-NEXT: [[ARRAYIDX_4:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD_1]]925; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX_4]], align 4, !tbaa [[INT_TBAA0]]926; CHECK-NEXT: [[ADD_2:%.*]] = add nuw nsw i32 [[I]], 3927; CHECK-NEXT: [[ARRAYIDX6_2:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD_2]]928; CHECK-NEXT: store i32 2, ptr [[ARRAYIDX6_2]], align 4, !tbaa [[INT_TBAA0]]929; CHECK-NEXT: [[ARRAYIDX_3:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD_2]]930; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX_3]], align 4, !tbaa [[INT_TBAA0]]931; CHECK-NEXT: [[ADD_3]] = add nuw i32 [[I]], 4932; CHECK-NEXT: [[ARRAYIDX6_3:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD_3]]933; CHECK-NEXT: store i32 2, ptr [[ARRAYIDX6_3]], align 4, !tbaa [[INT_TBAA0]]934; CHECK-NEXT: [[NITER_NEXT_3]] = add i32 [[NITER]], 4935; CHECK-NEXT: br label %[[FOR_INNER:.*]]936; CHECK: [[FOR_INNER]]:937; CHECK-NEXT: [[SUM:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD9:%.*]], %[[FOR_INNER]] ]938; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD10:%.*]], %[[FOR_INNER]] ]939; CHECK-NEXT: [[SUM_1:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD9_1:%.*]], %[[FOR_INNER]] ]940; CHECK-NEXT: [[J_1:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD10_1:%.*]], %[[FOR_INNER]] ]941; CHECK-NEXT: [[SUM_2:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD9_2:%.*]], %[[FOR_INNER]] ]942; CHECK-NEXT: [[J_2:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD10_2:%.*]], %[[FOR_INNER]] ]943; CHECK-NEXT: [[SUM_3:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD9_3:%.*]], %[[FOR_INNER]] ]944; CHECK-NEXT: [[J_3:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD10_3:%.*]], %[[FOR_INNER]] ]945; CHECK-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J]]946; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[ARRAYIDX11]], align 4, !tbaa [[INT_TBAA0]]947; CHECK-NEXT: [[ADD9]] = add i32 [[L1]], [[SUM]]948; CHECK-NEXT: [[ADD10]] = add nuw i32 [[J]], 1949; CHECK-NEXT: [[ARRAYIDX11_1:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_1]]950; CHECK-NEXT: [[L1_1:%.*]] = load i32, ptr [[ARRAYIDX11_1]], align 4, !tbaa [[INT_TBAA0]]951; CHECK-NEXT: [[ADD9_1]] = add i32 [[L1_1]], [[SUM_1]]952; CHECK-NEXT: [[ADD10_1]] = add nuw i32 [[J_1]], 1953; CHECK-NEXT: [[ARRAYIDX11_2:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_2]]954; CHECK-NEXT: [[L1_2:%.*]] = load i32, ptr [[ARRAYIDX11_2]], align 4, !tbaa [[INT_TBAA0]]955; CHECK-NEXT: [[ADD9_2]] = add i32 [[L1_2]], [[SUM_2]]956; CHECK-NEXT: [[ADD10_2]] = add nuw i32 [[J_2]], 1957; CHECK-NEXT: [[ARRAYIDX11_3:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_3]]958; CHECK-NEXT: [[L1_3:%.*]] = load i32, ptr [[ARRAYIDX11_3]], align 4, !tbaa [[INT_TBAA0]]959; CHECK-NEXT: [[ADD9_3]] = add i32 [[L1_3]], [[SUM_3]]960; CHECK-NEXT: [[ADD10_3]] = add nuw i32 [[J_3]], 1961; CHECK-NEXT: [[EXITCOND_3:%.*]] = icmp eq i32 [[ADD10_3]], [[E]]962; CHECK-NEXT: br i1 [[EXITCOND_3]], label %[[FOR_LATCH]], label %[[FOR_INNER]]963; CHECK: [[FOR_LATCH]]:964; CHECK-NEXT: [[ADD9_LCSSA:%.*]] = phi i32 [ [[ADD9]], %[[FOR_INNER]] ]965; CHECK-NEXT: [[ADD9_LCSSA_1:%.*]] = phi i32 [ [[ADD9_1]], %[[FOR_INNER]] ]966; CHECK-NEXT: [[ADD9_LCSSA_2:%.*]] = phi i32 [ [[ADD9_2]], %[[FOR_INNER]] ]967; CHECK-NEXT: [[ADD9_LCSSA_3:%.*]] = phi i32 [ [[ADD9_3]], %[[FOR_INNER]] ]968; CHECK-NEXT: store i32 [[ADD9_LCSSA]], ptr [[ARRAYIDX]], align 4, !tbaa [[INT_TBAA0]]969; CHECK-NEXT: store i32 [[ADD9_LCSSA_1]], ptr [[ARRAYIDX_1]], align 4, !tbaa [[INT_TBAA0]]970; CHECK-NEXT: store i32 [[ADD9_LCSSA_2]], ptr [[ARRAYIDX_4]], align 4, !tbaa [[INT_TBAA0]]971; CHECK-NEXT: store i32 [[ADD9_LCSSA_3]], ptr [[ARRAYIDX_3]], align 4, !tbaa [[INT_TBAA0]]972; CHECK-NEXT: [[NITER_NCMP_3:%.*]] = icmp eq i32 [[NITER_NEXT_3]], [[UNROLL_ITER]]973; CHECK-NEXT: br i1 [[NITER_NCMP_3]], label %[[FOR_CLEANUP_UNR_LCSSA:.*]], label %[[FOR_OUTER]], !llvm.loop [[LOOP9:![0-9]+]]974; CHECK: [[FOR_CLEANUP_UNR_LCSSA]]:975; CHECK-NEXT: [[I_UNR1:%.*]] = phi i32 [ [[ADD_3]], %[[FOR_LATCH]] ]976; CHECK-NEXT: [[LCMP_MOD:%.*]] = icmp ne i32 [[XTRAITER]], 0977; CHECK-NEXT: br i1 [[LCMP_MOD]], label %[[FOR_OUTER_EPIL_PREHEADER]], label %[[FOR_CLEANUP]]978; CHECK: [[FOR_OUTER_EPIL_PREHEADER]]:979; CHECK-NEXT: [[I_UNR:%.*]] = phi i32 [ 0, %[[FOR_OUTEST]] ], [ [[I_UNR1]], %[[FOR_CLEANUP_UNR_LCSSA]] ]980; CHECK-NEXT: [[LCMP_MOD1:%.*]] = icmp ne i32 [[XTRAITER]], 0981; CHECK-NEXT: call void @llvm.assume(i1 [[LCMP_MOD1]])982; CHECK-NEXT: br label %[[FOR_OUTER_EPIL:.*]]983; CHECK: [[FOR_OUTER_EPIL]]:984; CHECK-NEXT: [[ARRAYIDX_EPIL:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[I_UNR]]985; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX_EPIL]], align 4, !tbaa [[INT_TBAA0]]986; CHECK-NEXT: [[ADD_EPIL:%.*]] = add nuw i32 [[I_UNR]], 1987; CHECK-NEXT: [[ARRAYIDX6_EPIL:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD_EPIL]]988; CHECK-NEXT: store i32 2, ptr [[ARRAYIDX6_EPIL]], align 4, !tbaa [[INT_TBAA0]]989; CHECK-NEXT: br label %[[FOR_INNER_EPIL:.*]]990; CHECK: [[FOR_INNER_EPIL]]:991; CHECK-NEXT: [[SUM_EPIL:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL]] ], [ [[ADD9_EPIL:%.*]], %[[FOR_INNER_EPIL]] ]992; CHECK-NEXT: [[J_EPIL:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL]] ], [ [[ADD10_EPIL:%.*]], %[[FOR_INNER_EPIL]] ]993; CHECK-NEXT: [[ARRAYIDX11_EPIL:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_EPIL]]994; CHECK-NEXT: [[L1_EPIL:%.*]] = load i32, ptr [[ARRAYIDX11_EPIL]], align 4, !tbaa [[INT_TBAA0]]995; CHECK-NEXT: [[ADD9_EPIL]] = add i32 [[L1_EPIL]], [[SUM_EPIL]]996; CHECK-NEXT: [[ADD10_EPIL]] = add nuw i32 [[J_EPIL]], 1997; CHECK-NEXT: [[EXITCOND_EPIL:%.*]] = icmp eq i32 [[ADD10_EPIL]], [[E]]998; CHECK-NEXT: br i1 [[EXITCOND_EPIL]], label %[[FOR_LATCH_EPIL:.*]], label %[[FOR_INNER_EPIL]]999; CHECK: [[FOR_LATCH_EPIL]]:1000; CHECK-NEXT: [[ADD9_LCSSA_EPIL:%.*]] = phi i32 [ [[ADD9_EPIL]], %[[FOR_INNER_EPIL]] ]1001; CHECK-NEXT: store i32 [[ADD9_LCSSA_EPIL]], ptr [[ARRAYIDX_EPIL]], align 4, !tbaa [[INT_TBAA0]]1002; CHECK-NEXT: [[EPIL_ITER_CMP:%.*]] = icmp ne i32 1, [[XTRAITER]]1003; CHECK-NEXT: br i1 [[EPIL_ITER_CMP]], label %[[FOR_OUTER_EPIL_1:.*]], label %[[FOR_CLEANUP_EPILOG_LCSSA:.*]]1004; CHECK: [[FOR_OUTER_EPIL_1]]:1005; CHECK-NEXT: [[ARRAYIDX_EPIL_1:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD_EPIL]]1006; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX_EPIL_1]], align 4, !tbaa [[INT_TBAA0]]1007; CHECK-NEXT: [[ADD_EPIL_1:%.*]] = add nuw i32 [[I_UNR]], 21008; CHECK-NEXT: [[ARRAYIDX6_EPIL_1:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD_EPIL_1]]1009; CHECK-NEXT: store i32 2, ptr [[ARRAYIDX6_EPIL_1]], align 4, !tbaa [[INT_TBAA0]]1010; CHECK-NEXT: br label %[[FOR_INNER_EPIL_1:.*]]1011; CHECK: [[FOR_INNER_EPIL_1]]:1012; CHECK-NEXT: [[SUM_EPIL_1:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL_1]] ], [ [[ADD9_EPIL_1:%.*]], %[[FOR_INNER_EPIL_1]] ]1013; CHECK-NEXT: [[J_EPIL_1:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL_1]] ], [ [[ADD10_EPIL_1:%.*]], %[[FOR_INNER_EPIL_1]] ]1014; CHECK-NEXT: [[ARRAYIDX11_EPIL_1:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_EPIL_1]]1015; CHECK-NEXT: [[L1_EPIL_1:%.*]] = load i32, ptr [[ARRAYIDX11_EPIL_1]], align 4, !tbaa [[INT_TBAA0]]1016; CHECK-NEXT: [[ADD9_EPIL_1]] = add i32 [[L1_EPIL_1]], [[SUM_EPIL_1]]1017; CHECK-NEXT: [[ADD10_EPIL_1]] = add nuw i32 [[J_EPIL_1]], 11018; CHECK-NEXT: [[EXITCOND_EPIL_1:%.*]] = icmp eq i32 [[ADD10_EPIL_1]], [[E]]1019; CHECK-NEXT: br i1 [[EXITCOND_EPIL_1]], label %[[FOR_LATCH_EPIL_1:.*]], label %[[FOR_INNER_EPIL_1]]1020; CHECK: [[FOR_LATCH_EPIL_1]]:1021; CHECK-NEXT: [[ADD9_LCSSA_EPIL_1:%.*]] = phi i32 [ [[ADD9_EPIL_1]], %[[FOR_INNER_EPIL_1]] ]1022; CHECK-NEXT: store i32 [[ADD9_LCSSA_EPIL_1]], ptr [[ARRAYIDX_EPIL_1]], align 4, !tbaa [[INT_TBAA0]]1023; CHECK-NEXT: [[EPIL_ITER_CMP_1:%.*]] = icmp ne i32 2, [[XTRAITER]]1024; CHECK-NEXT: br i1 [[EPIL_ITER_CMP_1]], label %[[FOR_OUTER_EPIL_2:.*]], label %[[FOR_CLEANUP_EPILOG_LCSSA]]1025; CHECK: [[FOR_OUTER_EPIL_2]]:1026; CHECK-NEXT: [[ARRAYIDX_EPIL_2:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD_EPIL_1]]1027; CHECK-NEXT: store i32 0, ptr [[ARRAYIDX_EPIL_2]], align 4, !tbaa [[INT_TBAA0]]1028; CHECK-NEXT: [[ADD_EPIL_2:%.*]] = add nuw i32 [[I_UNR]], 31029; CHECK-NEXT: [[ARRAYIDX6_EPIL_2:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD_EPIL_2]]1030; CHECK-NEXT: store i32 2, ptr [[ARRAYIDX6_EPIL_2]], align 4, !tbaa [[INT_TBAA0]]1031; CHECK-NEXT: br label %[[FOR_INNER_EPIL_2:.*]]1032; CHECK: [[FOR_INNER_EPIL_2]]:1033; CHECK-NEXT: [[SUM_EPIL_2:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL_2]] ], [ [[ADD9_EPIL_2:%.*]], %[[FOR_INNER_EPIL_2]] ]1034; CHECK-NEXT: [[J_EPIL_2:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL_2]] ], [ [[ADD10_EPIL_2:%.*]], %[[FOR_INNER_EPIL_2]] ]1035; CHECK-NEXT: [[ARRAYIDX11_EPIL_2:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_EPIL_2]]1036; CHECK-NEXT: [[L1_EPIL_2:%.*]] = load i32, ptr [[ARRAYIDX11_EPIL_2]], align 4, !tbaa [[INT_TBAA0]]1037; CHECK-NEXT: [[ADD9_EPIL_2]] = add i32 [[L1_EPIL_2]], [[SUM_EPIL_2]]1038; CHECK-NEXT: [[ADD10_EPIL_2]] = add nuw i32 [[J_EPIL_2]], 11039; CHECK-NEXT: [[EXITCOND_EPIL_2:%.*]] = icmp eq i32 [[ADD10_EPIL_2]], [[E]]1040; CHECK-NEXT: br i1 [[EXITCOND_EPIL_2]], label %[[FOR_LATCH_EPIL_2:.*]], label %[[FOR_INNER_EPIL_2]]1041; CHECK: [[FOR_LATCH_EPIL_2]]:1042; CHECK-NEXT: [[ADD9_LCSSA_EPIL_2:%.*]] = phi i32 [ [[ADD9_EPIL_2]], %[[FOR_INNER_EPIL_2]] ]1043; CHECK-NEXT: store i32 [[ADD9_LCSSA_EPIL_2]], ptr [[ARRAYIDX_EPIL_2]], align 4, !tbaa [[INT_TBAA0]]1044; CHECK-NEXT: br label %[[FOR_CLEANUP_EPILOG_LCSSA]]1045; CHECK: [[FOR_CLEANUP_EPILOG_LCSSA]]:1046; CHECK-NEXT: br label %[[FOR_CLEANUP]]1047; CHECK: [[FOR_CLEANUP]]:1048; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[X_038]], 11049; CHECK-NEXT: [[EXITCOND41:%.*]] = icmp eq i32 [[INC]], 51050; CHECK-NEXT: br i1 [[EXITCOND41]], label %[[FOR_END_LOOPEXIT:.*]], label %[[FOR_OUTEST]]1051; CHECK: [[FOR_END_LOOPEXIT]]:1052; CHECK-NEXT: br label %[[FOR_END]]1053; CHECK: [[FOR_END]]:1054; CHECK-NEXT: ret void1055;1056entry:1057 %cmp = icmp eq i32 %E, 01058 %cmp336 = icmp eq i32 %I, 01059 %or.cond = or i1 %cmp, %cmp3361060 br i1 %or.cond, label %for.end, label %for.preheader1061 1062for.preheader:1063 br label %for.outest1064 1065for.outest:1066 %x.038 = phi i32 [ %inc, %for.cleanup ], [ 0, %for.preheader ]1067 br label %for.outer1068 1069for.outer:1070 %i = phi i32 [ %add, %for.latch ], [ 0, %for.outest ]1071 %arrayidx = getelementptr inbounds i32, ptr %A, i32 %i1072 store i32 0, ptr %arrayidx, align 4, !tbaa !51073 %add = add nuw i32 %i, 11074 %arrayidx6 = getelementptr inbounds i32, ptr %A, i32 %add1075 store i32 2, ptr %arrayidx6, align 4, !tbaa !51076 br label %for.inner1077 1078for.inner:1079 %sum = phi i32 [ 0, %for.outer ], [ %add9, %for.inner ]1080 %j = phi i32 [ 0, %for.outer ], [ %add10, %for.inner ]1081 %arrayidx11 = getelementptr inbounds i32, ptr %B, i32 %j1082 %l1 = load i32, ptr %arrayidx11, align 4, !tbaa !51083 %add9 = add i32 %l1, %sum1084 %add10 = add nuw i32 %j, 11085 %exitcond = icmp eq i32 %add10, %E1086 br i1 %exitcond, label %for.latch, label %for.inner1087 1088for.latch:1089 store i32 %add9, ptr %arrayidx, align 4, !tbaa !51090 %exitcond39 = icmp eq i32 %add, %I1091 br i1 %exitcond39, label %for.cleanup, label %for.outer1092 1093for.cleanup:1094 %inc = add nuw nsw i32 %x.038, 11095 %exitcond41 = icmp eq i32 %inc, 51096 br i1 %exitcond41, label %for.end, label %for.outest1097 1098for.end:1099 ret void1100}1101 1102 1103; Same as test1 with tbaa, not noalias1104define void @test9(i32 %I, i32 %E, ptr nocapture %A, ptr nocapture readonly %B) #0 {1105; CHECK-LABEL: define void @test9(1106; CHECK-SAME: i32 [[I:%.*]], i32 [[E:%.*]], ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]]) {1107; CHECK-NEXT: [[ENTRY:.*:]]1108; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[E]], 01109; CHECK-NEXT: [[CMPJ:%.*]] = icmp ne i32 [[I]], 01110; CHECK-NEXT: [[OR_COND:%.*]] = and i1 [[CMP]], [[CMPJ]]1111; CHECK-NEXT: br i1 [[OR_COND]], label %[[FOR_OUTER_PREHEADER:.*]], label %[[FOR_END:.*]]1112; CHECK: [[FOR_OUTER_PREHEADER]]:1113; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[I]], -11114; CHECK-NEXT: [[XTRAITER:%.*]] = and i32 [[I]], 31115; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[TMP0]], 31116; CHECK-NEXT: br i1 [[TMP1]], label %[[FOR_OUTER_EPIL_PREHEADER:.*]], label %[[FOR_OUTER_PREHEADER_NEW:.*]]1117; CHECK: [[FOR_OUTER_PREHEADER_NEW]]:1118; CHECK-NEXT: [[UNROLL_ITER:%.*]] = sub i32 [[I]], [[XTRAITER]]1119; CHECK-NEXT: br label %[[FOR_OUTER:.*]]1120; CHECK: [[FOR_OUTER]]:1121; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[ADD8_3:%.*]], %[[FOR_LATCH:.*]] ], [ 0, %[[FOR_OUTER_PREHEADER_NEW]] ]1122; CHECK-NEXT: [[NITER:%.*]] = phi i32 [ 0, %[[FOR_OUTER_PREHEADER_NEW]] ], [ [[NITER_NEXT_3:%.*]], %[[FOR_LATCH]] ]1123; CHECK-NEXT: [[ADD8:%.*]] = add nuw nsw i32 [[I]], 11124; CHECK-NEXT: [[ADD8_1:%.*]] = add nuw nsw i32 [[I]], 21125; CHECK-NEXT: [[ADD8_2:%.*]] = add nuw nsw i32 [[I]], 31126; CHECK-NEXT: [[ADD8_3]] = add nuw i32 [[I]], 41127; CHECK-NEXT: [[NITER_NEXT_3]] = add i32 [[NITER]], 41128; CHECK-NEXT: br label %[[FOR_INNER:.*]]1129; CHECK: [[FOR_INNER]]:1130; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[INC:%.*]], %[[FOR_INNER]] ]1131; CHECK-NEXT: [[SUM:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD:%.*]], %[[FOR_INNER]] ]1132; CHECK-NEXT: [[J_1:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[INC_1:%.*]], %[[FOR_INNER]] ]1133; CHECK-NEXT: [[SUM_1:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD_1:%.*]], %[[FOR_INNER]] ]1134; CHECK-NEXT: [[J_2:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[INC_2:%.*]], %[[FOR_INNER]] ]1135; CHECK-NEXT: [[SUM_2:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD_2:%.*]], %[[FOR_INNER]] ]1136; CHECK-NEXT: [[J_3:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[INC_3:%.*]], %[[FOR_INNER]] ]1137; CHECK-NEXT: [[SUM_3:%.*]] = phi i32 [ 0, %[[FOR_OUTER]] ], [ [[ADD_3:%.*]], %[[FOR_INNER]] ]1138; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[B]], i32 [[J]]1139; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr [[ARRAYIDX]], align 4, !tbaa [[SHORT_TBAA10:![0-9]+]]1140; CHECK-NEXT: [[SEXT:%.*]] = sext i16 [[TMP2]] to i321141; CHECK-NEXT: [[ADD]] = add i32 [[SEXT]], [[SUM]]1142; CHECK-NEXT: [[INC]] = add nuw i32 [[J]], 11143; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i16, ptr [[B]], i32 [[J_1]]1144; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr [[ARRAYIDX_1]], align 4, !tbaa [[SHORT_TBAA10]]1145; CHECK-NEXT: [[SEXT_1:%.*]] = sext i16 [[TMP3]] to i321146; CHECK-NEXT: [[ADD_1]] = add i32 [[SEXT_1]], [[SUM_1]]1147; CHECK-NEXT: [[INC_1]] = add nuw i32 [[J_1]], 11148; CHECK-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr inbounds i16, ptr [[B]], i32 [[J_2]]1149; CHECK-NEXT: [[TMP4:%.*]] = load i16, ptr [[ARRAYIDX_2]], align 4, !tbaa [[SHORT_TBAA10]]1150; CHECK-NEXT: [[SEXT_2:%.*]] = sext i16 [[TMP4]] to i321151; CHECK-NEXT: [[ADD_2]] = add i32 [[SEXT_2]], [[SUM_2]]1152; CHECK-NEXT: [[INC_2]] = add nuw i32 [[J_2]], 11153; CHECK-NEXT: [[ARRAYIDX_3:%.*]] = getelementptr inbounds i16, ptr [[B]], i32 [[J_3]]1154; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[ARRAYIDX_3]], align 4, !tbaa [[SHORT_TBAA10]]1155; CHECK-NEXT: [[SEXT_3:%.*]] = sext i16 [[TMP5]] to i321156; CHECK-NEXT: [[ADD_3]] = add i32 [[SEXT_3]], [[SUM_3]]1157; CHECK-NEXT: [[INC_3]] = add nuw i32 [[J_3]], 11158; CHECK-NEXT: [[EXITCOND_3:%.*]] = icmp eq i32 [[INC_3]], [[E]]1159; CHECK-NEXT: br i1 [[EXITCOND_3]], label %[[FOR_LATCH]], label %[[FOR_INNER]]1160; CHECK: [[FOR_LATCH]]:1161; CHECK-NEXT: [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD]], %[[FOR_INNER]] ]1162; CHECK-NEXT: [[ADD_LCSSA_1:%.*]] = phi i32 [ [[ADD_1]], %[[FOR_INNER]] ]1163; CHECK-NEXT: [[ADD_LCSSA_2:%.*]] = phi i32 [ [[ADD_2]], %[[FOR_INNER]] ]1164; CHECK-NEXT: [[ADD_LCSSA_3:%.*]] = phi i32 [ [[ADD_3]], %[[FOR_INNER]] ]1165; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[I]]1166; CHECK-NEXT: store i32 [[ADD_LCSSA]], ptr [[ARRAYIDX6]], align 4, !tbaa [[INT_TBAA0]]1167; CHECK-NEXT: [[ARRAYIDX6_1:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD8]]1168; CHECK-NEXT: store i32 [[ADD_LCSSA_1]], ptr [[ARRAYIDX6_1]], align 4, !tbaa [[INT_TBAA0]]1169; CHECK-NEXT: [[ARRAYIDX6_2:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD8_1]]1170; CHECK-NEXT: store i32 [[ADD_LCSSA_2]], ptr [[ARRAYIDX6_2]], align 4, !tbaa [[INT_TBAA0]]1171; CHECK-NEXT: [[ARRAYIDX6_3:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD8_2]]1172; CHECK-NEXT: store i32 [[ADD_LCSSA_3]], ptr [[ARRAYIDX6_3]], align 4, !tbaa [[INT_TBAA0]]1173; CHECK-NEXT: [[NITER_NCMP_3:%.*]] = icmp eq i32 [[NITER_NEXT_3]], [[UNROLL_ITER]]1174; CHECK-NEXT: br i1 [[NITER_NCMP_3]], label %[[FOR_END_LOOPEXIT_UNR_LCSSA:.*]], label %[[FOR_OUTER]], !llvm.loop [[LOOP12:![0-9]+]]1175; CHECK: [[FOR_END_LOOPEXIT_UNR_LCSSA]]:1176; CHECK-NEXT: [[I_UNR1:%.*]] = phi i32 [ [[ADD8_3]], %[[FOR_LATCH]] ]1177; CHECK-NEXT: [[LCMP_MOD:%.*]] = icmp ne i32 [[XTRAITER]], 01178; CHECK-NEXT: br i1 [[LCMP_MOD]], label %[[FOR_OUTER_EPIL_PREHEADER]], label %[[FOR_END_LOOPEXIT:.*]]1179; CHECK: [[FOR_OUTER_EPIL_PREHEADER]]:1180; CHECK-NEXT: [[I_UNR:%.*]] = phi i32 [ 0, %[[FOR_OUTER_PREHEADER]] ], [ [[I_UNR1]], %[[FOR_END_LOOPEXIT_UNR_LCSSA]] ]1181; CHECK-NEXT: [[LCMP_MOD1:%.*]] = icmp ne i32 [[XTRAITER]], 01182; CHECK-NEXT: call void @llvm.assume(i1 [[LCMP_MOD1]])1183; CHECK-NEXT: br label %[[FOR_OUTER_EPIL:.*]]1184; CHECK: [[FOR_OUTER_EPIL]]:1185; CHECK-NEXT: br label %[[FOR_INNER_EPIL:.*]]1186; CHECK: [[FOR_INNER_EPIL]]:1187; CHECK-NEXT: [[J_EPIL:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL]] ], [ [[INC_EPIL:%.*]], %[[FOR_INNER_EPIL]] ]1188; CHECK-NEXT: [[SUM_EPIL:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL]] ], [ [[ADD_EPIL:%.*]], %[[FOR_INNER_EPIL]] ]1189; CHECK-NEXT: [[ARRAYIDX_EPIL:%.*]] = getelementptr inbounds i16, ptr [[B]], i32 [[J_EPIL]]1190; CHECK-NEXT: [[TMP6:%.*]] = load i16, ptr [[ARRAYIDX_EPIL]], align 4, !tbaa [[SHORT_TBAA10]]1191; CHECK-NEXT: [[SEXT_EPIL:%.*]] = sext i16 [[TMP6]] to i321192; CHECK-NEXT: [[ADD_EPIL]] = add i32 [[SEXT_EPIL]], [[SUM_EPIL]]1193; CHECK-NEXT: [[INC_EPIL]] = add nuw i32 [[J_EPIL]], 11194; CHECK-NEXT: [[EXITCOND_EPIL:%.*]] = icmp eq i32 [[INC_EPIL]], [[E]]1195; CHECK-NEXT: br i1 [[EXITCOND_EPIL]], label %[[FOR_LATCH_EPIL:.*]], label %[[FOR_INNER_EPIL]]1196; CHECK: [[FOR_LATCH_EPIL]]:1197; CHECK-NEXT: [[ADD_LCSSA_EPIL:%.*]] = phi i32 [ [[ADD_EPIL]], %[[FOR_INNER_EPIL]] ]1198; CHECK-NEXT: [[ARRAYIDX6_EPIL:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[I_UNR]]1199; CHECK-NEXT: store i32 [[ADD_LCSSA_EPIL]], ptr [[ARRAYIDX6_EPIL]], align 4, !tbaa [[INT_TBAA0]]1200; CHECK-NEXT: [[ADD8_EPIL:%.*]] = add nuw i32 [[I_UNR]], 11201; CHECK-NEXT: [[EPIL_ITER_CMP:%.*]] = icmp ne i32 1, [[XTRAITER]]1202; CHECK-NEXT: br i1 [[EPIL_ITER_CMP]], label %[[FOR_OUTER_EPIL_1:.*]], label %[[FOR_END_LOOPEXIT_EPILOG_LCSSA:.*]]1203; CHECK: [[FOR_OUTER_EPIL_1]]:1204; CHECK-NEXT: br label %[[FOR_INNER_EPIL_1:.*]]1205; CHECK: [[FOR_INNER_EPIL_1]]:1206; CHECK-NEXT: [[J_EPIL_1:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL_1]] ], [ [[INC_EPIL_1:%.*]], %[[FOR_INNER_EPIL_1]] ]1207; CHECK-NEXT: [[SUM_EPIL_1:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL_1]] ], [ [[ADD_EPIL_1:%.*]], %[[FOR_INNER_EPIL_1]] ]1208; CHECK-NEXT: [[ARRAYIDX_EPIL_1:%.*]] = getelementptr inbounds i16, ptr [[B]], i32 [[J_EPIL_1]]1209; CHECK-NEXT: [[TMP7:%.*]] = load i16, ptr [[ARRAYIDX_EPIL_1]], align 4, !tbaa [[SHORT_TBAA10]]1210; CHECK-NEXT: [[SEXT_EPIL_1:%.*]] = sext i16 [[TMP7]] to i321211; CHECK-NEXT: [[ADD_EPIL_1]] = add i32 [[SEXT_EPIL_1]], [[SUM_EPIL_1]]1212; CHECK-NEXT: [[INC_EPIL_1]] = add nuw i32 [[J_EPIL_1]], 11213; CHECK-NEXT: [[EXITCOND_EPIL_1:%.*]] = icmp eq i32 [[INC_EPIL_1]], [[E]]1214; CHECK-NEXT: br i1 [[EXITCOND_EPIL_1]], label %[[FOR_LATCH_EPIL_1:.*]], label %[[FOR_INNER_EPIL_1]]1215; CHECK: [[FOR_LATCH_EPIL_1]]:1216; CHECK-NEXT: [[ADD_LCSSA_EPIL_1:%.*]] = phi i32 [ [[ADD_EPIL_1]], %[[FOR_INNER_EPIL_1]] ]1217; CHECK-NEXT: [[ARRAYIDX6_EPIL_1:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD8_EPIL]]1218; CHECK-NEXT: store i32 [[ADD_LCSSA_EPIL_1]], ptr [[ARRAYIDX6_EPIL_1]], align 4, !tbaa [[INT_TBAA0]]1219; CHECK-NEXT: [[ADD8_EPIL_1:%.*]] = add nuw i32 [[I_UNR]], 21220; CHECK-NEXT: [[EPIL_ITER_CMP_1:%.*]] = icmp ne i32 2, [[XTRAITER]]1221; CHECK-NEXT: br i1 [[EPIL_ITER_CMP_1]], label %[[FOR_OUTER_EPIL_2:.*]], label %[[FOR_END_LOOPEXIT_EPILOG_LCSSA]]1222; CHECK: [[FOR_OUTER_EPIL_2]]:1223; CHECK-NEXT: br label %[[FOR_INNER_EPIL_2:.*]]1224; CHECK: [[FOR_INNER_EPIL_2]]:1225; CHECK-NEXT: [[J_EPIL_2:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL_2]] ], [ [[INC_EPIL_2:%.*]], %[[FOR_INNER_EPIL_2]] ]1226; CHECK-NEXT: [[SUM_EPIL_2:%.*]] = phi i32 [ 0, %[[FOR_OUTER_EPIL_2]] ], [ [[ADD_EPIL_2:%.*]], %[[FOR_INNER_EPIL_2]] ]1227; CHECK-NEXT: [[ARRAYIDX_EPIL_2:%.*]] = getelementptr inbounds i16, ptr [[B]], i32 [[J_EPIL_2]]1228; CHECK-NEXT: [[TMP8:%.*]] = load i16, ptr [[ARRAYIDX_EPIL_2]], align 4, !tbaa [[SHORT_TBAA10]]1229; CHECK-NEXT: [[SEXT_EPIL_2:%.*]] = sext i16 [[TMP8]] to i321230; CHECK-NEXT: [[ADD_EPIL_2]] = add i32 [[SEXT_EPIL_2]], [[SUM_EPIL_2]]1231; CHECK-NEXT: [[INC_EPIL_2]] = add nuw i32 [[J_EPIL_2]], 11232; CHECK-NEXT: [[EXITCOND_EPIL_2:%.*]] = icmp eq i32 [[INC_EPIL_2]], [[E]]1233; CHECK-NEXT: br i1 [[EXITCOND_EPIL_2]], label %[[FOR_LATCH_EPIL_2:.*]], label %[[FOR_INNER_EPIL_2]]1234; CHECK: [[FOR_LATCH_EPIL_2]]:1235; CHECK-NEXT: [[ADD_LCSSA_EPIL_2:%.*]] = phi i32 [ [[ADD_EPIL_2]], %[[FOR_INNER_EPIL_2]] ]1236; CHECK-NEXT: [[ARRAYIDX6_EPIL_2:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[ADD8_EPIL_1]]1237; CHECK-NEXT: store i32 [[ADD_LCSSA_EPIL_2]], ptr [[ARRAYIDX6_EPIL_2]], align 4, !tbaa [[INT_TBAA0]]1238; CHECK-NEXT: br label %[[FOR_END_LOOPEXIT_EPILOG_LCSSA]]1239; CHECK: [[FOR_END_LOOPEXIT_EPILOG_LCSSA]]:1240; CHECK-NEXT: br label %[[FOR_END_LOOPEXIT]]1241; CHECK: [[FOR_END_LOOPEXIT]]:1242; CHECK-NEXT: br label %[[FOR_END]]1243; CHECK: [[FOR_END]]:1244; CHECK-NEXT: ret void1245;1246entry:1247 %cmp = icmp ne i32 %E, 01248 %cmpJ = icmp ne i32 %I, 01249 %or.cond = and i1 %cmp, %cmpJ1250 br i1 %or.cond, label %for.outer.preheader, label %for.end1251 1252for.outer.preheader:1253 br label %for.outer1254 1255for.outer:1256 %i = phi i32 [ %add8, %for.latch ], [ 0, %for.outer.preheader ]1257 br label %for.inner1258 1259for.inner:1260 %j = phi i32 [ 0, %for.outer ], [ %inc, %for.inner ]1261 %sum = phi i32 [ 0, %for.outer ], [ %add, %for.inner ]1262 %arrayidx = getelementptr inbounds i16, ptr %B, i32 %j1263 %0 = load i16, ptr %arrayidx, align 4, !tbaa !91264 %sext = sext i16 %0 to i321265 %add = add i32 %sext, %sum1266 %inc = add nuw i32 %j, 11267 %exitcond = icmp eq i32 %inc, %E1268 br i1 %exitcond, label %for.latch, label %for.inner1269 1270for.latch:1271 %add.lcssa = phi i32 [ %add, %for.inner ]1272 %arrayidx6 = getelementptr inbounds i32, ptr %A, i32 %i1273 store i32 %add.lcssa, ptr %arrayidx6, align 4, !tbaa !51274 %add8 = add nuw i32 %i, 11275 %exitcond25 = icmp eq i32 %add8, %I1276 br i1 %exitcond25, label %for.end.loopexit, label %for.outer1277 1278for.end.loopexit:1279 br label %for.end1280 1281for.end:1282 ret void1283}1284 1285 1286; Be careful not to incorrectly update the exit phi nodes1287%struct.a = type { i64 }1288@g = common global %struct.a zeroinitializer, align 81289@c = common global [1 x i8] zeroinitializer, align 11290define signext i16 @test10(i32 %k) #0 {1291; CHECK-LABEL: define signext i16 @test10(1292; CHECK-SAME: i32 [[K:%.*]]) {1293; CHECK-NEXT: [[ENTRY:.*:]]1294; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr @c, align 11295; CHECK-NEXT: [[TOBOOL9:%.*]] = icmp eq i8 [[TMP0]], 01296; CHECK-NEXT: [[TOBOOL13:%.*]] = icmp ne i32 [[K]], 01297; CHECK-NEXT: br i1 false, label %[[FOR_BODY_EPIL_PREHEADER:.*]], label %[[ENTRY_NEW:.*]]1298; CHECK: [[ENTRY_NEW]]:1299; CHECK-NEXT: br label %[[FOR_BODY:.*]]1300; CHECK: [[FOR_BODY]]:1301; CHECK-NEXT: [[STOREMERGE82:%.*]] = phi i64 [ 0, %[[ENTRY_NEW]] ], [ [[INC25_3:%.*]], %[[FOR_INC24:.*]] ]1302; CHECK-NEXT: [[NITER:%.*]] = phi i64 [ 0, %[[ENTRY_NEW]] ], [ [[NITER_NEXT_3:%.*]], %[[FOR_INC24]] ]1303; CHECK-NEXT: [[INC25_3]] = add nuw nsw i64 [[STOREMERGE82]], 41304; CHECK-NEXT: [[NITER_NEXT_3]] = add nuw nsw i64 [[NITER]], 41305; CHECK-NEXT: br label %[[FOR_BODY2:.*]]1306; CHECK: [[FOR_BODY2]]:1307; CHECK-NEXT: [[STOREMERGE:%.*]] = phi i64 [ 4, %[[FOR_BODY]] ], [ [[DEC:%.*]], %[[FOR_INC21_3:.*]] ]1308; CHECK-NEXT: [[STOREMERGE_14:%.*]] = phi i64 [ 4, %[[FOR_BODY]] ], [ [[DEC_1:%.*]], %[[FOR_INC21_3]] ]1309; CHECK-NEXT: [[STOREMERGE_25:%.*]] = phi i64 [ 4, %[[FOR_BODY]] ], [ [[DEC_2:%.*]], %[[FOR_INC21_3]] ]1310; CHECK-NEXT: [[STOREMERGE_36:%.*]] = phi i64 [ 4, %[[FOR_BODY]] ], [ [[DEC_3:%.*]], %[[FOR_INC21_3]] ]1311; CHECK-NEXT: br i1 [[TOBOOL9]], label %[[FOR_BODY2_SPLIT:.*]], label %[[FOR_BODY2_SPLIT2:.*]]1312; CHECK: [[FOR_BODY2_SPLIT2]]:1313; CHECK-NEXT: br i1 [[TOBOOL13]], label %[[FOR_INC21:.*]], label %[[FOR_INC21_IF:.*]]1314; CHECK: [[FOR_BODY2_SPLIT]]:1315; CHECK-NEXT: br i1 [[TOBOOL13]], label %[[FOR_INC21]], label %[[FOR_INC21_THEN:.*]]1316; CHECK: [[FOR_INC21_IF]]:1317; CHECK-NEXT: br label %[[FOR_INC21]]1318; CHECK: [[FOR_INC21_THEN]]:1319; CHECK-NEXT: br label %[[FOR_INC21]]1320; CHECK: [[FOR_INC21]]:1321; CHECK-NEXT: [[DEC]] = add nsw i64 [[STOREMERGE]], -11322; CHECK-NEXT: br i1 [[TOBOOL9]], label %[[FOR_BODY2_SPLIT_1:.*]], label %[[FOR_BODY2_SPLIT2_1:.*]]1323; CHECK: [[FOR_INC24]]:1324; CHECK-NEXT: [[STOREMERGE_4_LCSSA_3:%.*]] = phi i64 [ [[STOREMERGE_4_3:%.*]], %[[FOR_INC21_3]] ]1325; CHECK-NEXT: br i1 false, label %[[FOR_BODY]], label %[[FOR_END26_UNR_LCSSA:.*]], !llvm.loop [[LOOP13:![0-9]+]]1326; CHECK: [[FOR_END26_UNR_LCSSA]]:1327; CHECK-NEXT: [[DEC_LCSSA_LCSSA_PH_PH:%.*]] = phi i64 [ 0, %[[FOR_INC24]] ]1328; CHECK-NEXT: [[STOREMERGE_4_LCSSA_LCSSA_PH_PH:%.*]] = phi i64 [ [[STOREMERGE_4_LCSSA_3]], %[[FOR_INC24]] ]1329; CHECK-NEXT: [[STOREMERGE_5_LCSSA_LCSSA_PH_PH:%.*]] = phi i32 [ 0, %[[FOR_INC24]] ]1330; CHECK-NEXT: br i1 true, label %[[FOR_BODY_EPIL_PREHEADER]], label %[[FOR_END26:.*]]1331; CHECK: [[FOR_BODY_EPIL_PREHEADER]]:1332; CHECK-NEXT: call void @llvm.assume(i1 true)1333; CHECK-NEXT: br label %[[FOR_BODY_EPIL:.*]]1334; CHECK: [[FOR_BODY_EPIL]]:1335; CHECK-NEXT: br label %[[FOR_BODY2_EPIL:.*]]1336; CHECK: [[FOR_BODY2_EPIL]]:1337; CHECK-NEXT: [[STOREMERGE_EPIL:%.*]] = phi i64 [ 4, %[[FOR_BODY_EPIL]] ], [ [[DEC_EPIL:%.*]], %[[FOR_INC21_EPIL:.*]] ]1338; CHECK-NEXT: br i1 [[TOBOOL9]], label %[[FOR_BODY2_SPLIT_EPIL:.*]], label %[[FOR_BODY2_SPLIT2_EPIL:.*]]1339; CHECK: [[FOR_BODY2_SPLIT2_EPIL]]:1340; CHECK-NEXT: br i1 [[TOBOOL13]], label %[[FOR_INC21_EPIL]], label %[[FOR_INC21_IF_EPIL:.*]]1341; CHECK: [[FOR_INC21_IF_EPIL]]:1342; CHECK-NEXT: br label %[[FOR_INC21_EPIL]]1343; CHECK: [[FOR_BODY2_SPLIT_EPIL]]:1344; CHECK-NEXT: br i1 [[TOBOOL13]], label %[[FOR_INC21_EPIL]], label %[[FOR_INC21_THEN_EPIL:.*]]1345; CHECK: [[FOR_INC21_THEN_EPIL]]:1346; CHECK-NEXT: br label %[[FOR_INC21_EPIL]]1347; CHECK: [[FOR_INC21_EPIL]]:1348; CHECK-NEXT: [[STOREMERGE_4_EPIL:%.*]] = phi i64 [ 0, %[[FOR_INC21_IF_EPIL]] ], [ 0, %[[FOR_INC21_THEN_EPIL]] ], [ 4, %[[FOR_BODY2_SPLIT2_EPIL]] ], [ 4, %[[FOR_BODY2_SPLIT_EPIL]] ]1349; CHECK-NEXT: [[DEC_EPIL]] = add nsw i64 [[STOREMERGE_EPIL]], -11350; CHECK-NEXT: [[TOBOOL_EPIL:%.*]] = icmp eq i64 [[DEC_EPIL]], 01351; CHECK-NEXT: br i1 [[TOBOOL_EPIL]], label %[[FOR_INC24_EPIL:.*]], label %[[FOR_BODY2_EPIL]]1352; CHECK: [[FOR_INC24_EPIL]]:1353; CHECK-NEXT: [[STOREMERGE_4_LCSSA_EPIL:%.*]] = phi i64 [ [[STOREMERGE_4_EPIL]], %[[FOR_INC21_EPIL]] ]1354; CHECK-NEXT: br label %[[FOR_END26]]1355; CHECK: [[FOR_END26]]:1356; CHECK-NEXT: [[DEC_LCSSA_LCSSA:%.*]] = phi i64 [ [[DEC_LCSSA_LCSSA_PH_PH]], %[[FOR_END26_UNR_LCSSA]] ], [ 0, %[[FOR_INC24_EPIL]] ]1357; CHECK-NEXT: [[STOREMERGE_4_LCSSA_LCSSA:%.*]] = phi i64 [ [[STOREMERGE_4_LCSSA_LCSSA_PH_PH]], %[[FOR_END26_UNR_LCSSA]] ], [ [[STOREMERGE_4_LCSSA_EPIL]], %[[FOR_INC24_EPIL]] ]1358; CHECK-NEXT: [[STOREMERGE_5_LCSSA_LCSSA:%.*]] = phi i32 [ [[STOREMERGE_5_LCSSA_LCSSA_PH_PH]], %[[FOR_END26_UNR_LCSSA]] ], [ 0, %[[FOR_INC24_EPIL]] ]1359; CHECK-NEXT: store i64 [[DEC_LCSSA_LCSSA]], ptr @g, align 81360; CHECK-NEXT: ret i16 01361; CHECK: [[FOR_BODY2_SPLIT2_1]]:1362; CHECK-NEXT: br i1 [[TOBOOL13]], label %[[FOR_INC21_1:.*]], label %[[FOR_INC21_IF_1:.*]]1363; CHECK: [[FOR_INC21_IF_1]]:1364; CHECK-NEXT: br label %[[FOR_INC21_1]]1365; CHECK: [[FOR_BODY2_SPLIT_1]]:1366; CHECK-NEXT: br i1 [[TOBOOL13]], label %[[FOR_INC21_1]], label %[[FOR_INC21_THEN_1:.*]]1367; CHECK: [[FOR_INC21_THEN_1]]:1368; CHECK-NEXT: br label %[[FOR_INC21_1]]1369; CHECK: [[FOR_INC21_1]]:1370; CHECK-NEXT: [[DEC_1]] = add nsw i64 [[STOREMERGE_14]], -11371; CHECK-NEXT: br i1 [[TOBOOL9]], label %[[FOR_BODY2_SPLIT_2:.*]], label %[[FOR_BODY2_SPLIT2_2:.*]]1372; CHECK: [[FOR_BODY2_SPLIT2_2]]:1373; CHECK-NEXT: br i1 [[TOBOOL13]], label %[[FOR_INC21_2:.*]], label %[[FOR_INC21_IF_2:.*]]1374; CHECK: [[FOR_INC21_IF_2]]:1375; CHECK-NEXT: br label %[[FOR_INC21_2]]1376; CHECK: [[FOR_BODY2_SPLIT_2]]:1377; CHECK-NEXT: br i1 [[TOBOOL13]], label %[[FOR_INC21_2]], label %[[FOR_INC21_THEN_2:.*]]1378; CHECK: [[FOR_INC21_THEN_2]]:1379; CHECK-NEXT: br label %[[FOR_INC21_2]]1380; CHECK: [[FOR_INC21_2]]:1381; CHECK-NEXT: [[DEC_2]] = add nsw i64 [[STOREMERGE_25]], -11382; CHECK-NEXT: br i1 [[TOBOOL9]], label %[[FOR_BODY2_SPLIT_3:.*]], label %[[FOR_BODY2_SPLIT2_3:.*]]1383; CHECK: [[FOR_BODY2_SPLIT2_3]]:1384; CHECK-NEXT: br i1 [[TOBOOL13]], label %[[FOR_INC21_3]], label %[[FOR_INC21_IF_3:.*]]1385; CHECK: [[FOR_INC21_IF_3]]:1386; CHECK-NEXT: br label %[[FOR_INC21_3]]1387; CHECK: [[FOR_BODY2_SPLIT_3]]:1388; CHECK-NEXT: br i1 [[TOBOOL13]], label %[[FOR_INC21_3]], label %[[FOR_INC21_THEN_3:.*]]1389; CHECK: [[FOR_INC21_THEN_3]]:1390; CHECK-NEXT: br label %[[FOR_INC21_3]]1391; CHECK: [[FOR_INC21_3]]:1392; CHECK-NEXT: [[STOREMERGE_4_3]] = phi i64 [ 0, %[[FOR_INC21_IF_3]] ], [ 0, %[[FOR_INC21_THEN_3]] ], [ 4, %[[FOR_BODY2_SPLIT2_3]] ], [ 4, %[[FOR_BODY2_SPLIT_3]] ]1393; CHECK-NEXT: [[DEC_3]] = add nsw i64 [[STOREMERGE_36]], -11394; CHECK-NEXT: [[TOBOOL_3:%.*]] = icmp eq i64 [[DEC_3]], 01395; CHECK-NEXT: br i1 [[TOBOOL_3]], label %[[FOR_INC24]], label %[[FOR_BODY2]]1396;1397entry:1398 %0 = load i8, ptr @c, align 11399 %tobool9 = icmp eq i8 %0, 01400 %tobool13 = icmp ne i32 %k, 01401 br label %for.body1402 1403for.body:1404 %storemerge82 = phi i64 [ 0, %entry ], [ %inc25, %for.inc24 ]1405 br label %for.body21406 1407for.body2:1408 %storemerge = phi i64 [ 4, %for.body ], [ %dec, %for.inc21 ]1409 br i1 %tobool9, label %for.body2.split, label %for.body2.split21410 1411for.body2.split2:1412 br i1 %tobool13, label %for.inc21, label %for.inc21.if1413 1414for.body2.split:1415 br i1 %tobool13, label %for.inc21, label %for.inc21.then1416 1417for.inc21.if:1418 %storemerge.1 = phi i64 [ 0, %for.body2.split2 ]1419 br label %for.inc211420 1421for.inc21.then:1422 %storemerge.2 = phi i64 [ 0, %for.body2.split ]1423 %storemerge.3 = phi i32 [ 0, %for.body2.split ]1424 br label %for.inc211425 1426for.inc21:1427 %storemerge.4 = phi i64 [ %storemerge.1, %for.inc21.if ], [ %storemerge.2, %for.inc21.then ], [ 4, %for.body2.split2 ], [ 4, %for.body2.split ]1428 %storemerge.5 = phi i32 [ 0, %for.inc21.if ], [ %storemerge.3, %for.inc21.then ], [ 0, %for.body2.split2 ], [ 0, %for.body2.split ]1429 %dec = add nsw i64 %storemerge, -11430 %tobool = icmp eq i64 %dec, 01431 br i1 %tobool, label %for.inc24, label %for.body21432 1433for.inc24:1434 %storemerge.4.lcssa = phi i64 [ %storemerge.4, %for.inc21 ]1435 %storemerge.5.lcssa = phi i32 [ %storemerge.5, %for.inc21 ]1436 %inc25 = add nuw nsw i64 %storemerge82, 11437 %exitcond = icmp ne i64 %inc25, 51438 br i1 %exitcond, label %for.body, label %for.end261439 1440for.end26:1441 %dec.lcssa.lcssa = phi i64 [ 0, %for.inc24 ]1442 %storemerge.4.lcssa.lcssa = phi i64 [ %storemerge.4.lcssa, %for.inc24 ]1443 %storemerge.5.lcssa.lcssa = phi i32 [ %storemerge.5.lcssa, %for.inc24 ]1444 store i64 %dec.lcssa.lcssa, ptr @g, align 81445 ret i16 01446}1447 1448 1449!5 = !{!6, !6, i64 0}1450!6 = !{!"int", !7, i64 0}1451!7 = !{!"omnipotent char", !8, i64 0}1452!8 = !{!"Simple C/C++ TBAA"}1453!9 = !{!10, !10, i64 0}1454!10 = !{!"short", !7, i64 0}1455;.1456; CHECK: [[INT_TBAA0]] = !{[[META1:![0-9]+]], [[META1]], i64 0}1457; CHECK: [[META1]] = !{!"int", [[META2:![0-9]+]], i64 0}1458; CHECK: [[META2]] = !{!"omnipotent char", [[META3:![0-9]+]], i64 0}1459; CHECK: [[META3]] = !{!"Simple C/C++ TBAA"}1460; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META5:![0-9]+]]}1461; CHECK: [[META5]] = !{!"llvm.loop.unroll.disable"}1462; CHECK: [[LOOP6]] = distinct !{[[LOOP6]], [[META5]]}1463; CHECK: [[LOOP7]] = distinct !{[[LOOP7]], [[META5]]}1464; CHECK: [[LOOP8]] = distinct !{[[LOOP8]], [[META5]]}1465; CHECK: [[LOOP9]] = distinct !{[[LOOP9]], [[META5]]}1466; CHECK: [[SHORT_TBAA10]] = !{[[META11:![0-9]+]], [[META11]], i64 0}1467; CHECK: [[META11]] = !{!"short", [[META2]], i64 0}1468; CHECK: [[LOOP12]] = distinct !{[[LOOP12]], [[META5]]}1469; CHECK: [[LOOP13]] = distinct !{[[LOOP13]], [[META5]]}1470;.1471