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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 22; RUN: opt -passes=loop-vectorize -force-target-instruction-cost=1 -prefer-predicate-over-epilogue=predicate-dont-vectorize -S < %s 2>&1 | FileCheck %s3 4target triple = "aarch64"5target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"6 7 8define void @f1(ptr %A) #0 {9; CHECK-LABEL: define void @f110; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] {11; CHECK-NEXT: entry:12; CHECK-NEXT: br label [[VECTOR_PH:%.*]]13; CHECK: vector.ph:14; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()15; CHECK-NEXT: [[TMP1:%.*]] = mul nuw i64 [[TMP0]], 416; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 1024, [[TMP1]]17; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 1024, [[N_MOD_VF]]18; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]19; CHECK: vector.body:20; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]21; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDEX]]22; CHECK-NEXT: store <vscale x 4 x i32> splat (i32 1), ptr [[TMP2]], align 423; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP1]]24; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]25; CHECK-NEXT: br i1 [[TMP3]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]26; CHECK: middle.block:27; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 1024, [[N_VEC]]28; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH:%.*]]29; CHECK: scalar.ph:30; CHECK-NEXT: br label [[FOR_BODY:%.*]]31; CHECK: for.body:32; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[N_VEC]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY]] ]33; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[IV]]34; CHECK-NEXT: store i32 1, ptr [[ARRAYIDX]], align 435; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 136; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[IV_NEXT]], 102437; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[EXIT]], !llvm.loop [[LOOP3:![0-9]+]]38; CHECK: exit:39; CHECK-NEXT: ret void40;41entry:42 br label %for.body43 44for.body:45 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]46 %arrayidx = getelementptr inbounds i32, ptr %A, i64 %iv47 store i32 1, ptr %arrayidx, align 448 %iv.next = add nuw nsw i64 %iv, 149 %exitcond = icmp ne i64 %iv.next, 102450 br i1 %exitcond, label %for.body, label %exit51 52exit:53 ret void54}55 56attributes #0 = { "target-features"="+sve" vscale_range(1,16) }57