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1; RUN: opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -mtriple aarch64-unknown-linux-gnu -mattr=+sve -S < %s | FileCheck %s --check-prefix=CHECK-VF4UF12; RUN: opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=2 -mtriple aarch64-unknown-linux-gnu -mattr=+sve -S < %s | FileCheck %s --check-prefix=CHECK-VF4UF23 4; We vectorize this first order recurrence, with a set of insertelements for5; each unrolled part. Make sure these insertelements are generated in-order,6; because the shuffle of the first order recurrence will be added after the7; insertelement of the last part UF - 1, assuming the latter appears after the8; insertelements of all other parts.9;10; int PR33613(double *b, double j, int d) {11; int a = 0;12; for(int i = 0; i < 10240; i++, b+=25) {13; double f = b[d]; // Scalarize to form insertelements14; if (j * f)15; a++;16; j = f;17; }18; return a;19; }20;21define i32 @PR33613(ptr %b, double %j, i32 %d) #0 {22; CHECK-VF4UF2-LABEL: @PR3361323; CHECK-VF4UF2: vector.body24; CHECK-VF4UF2: %[[VEC_RECUR:.*]] = phi <vscale x 4 x double> [ {{.*}}, %vector.ph ], [ {{.*}}, %vector.body ]25; CHECK-VF4UF2: %[[SPLICE1:.*]] = call <vscale x 4 x double> @llvm.vector.splice.nxv4f64(<vscale x 4 x double> %[[VEC_RECUR]], <vscale x 4 x double> {{.*}}, i32 -1)26; CHECK-VF4UF2-NEXT: %[[SPLICE2:.*]] = call <vscale x 4 x double> @llvm.vector.splice.nxv4f64(<vscale x 4 x double> %{{.*}}, <vscale x 4 x double> %{{.*}}, i32 -1)27; CHECK-VF4UF2-NOT: insertelement <vscale x 4 x double>28; CHECK-VF4UF2: middle.block29entry:30 %idxprom = sext i32 %d to i6431 br label %for.body32 33for.cond.cleanup:34 %a.1.lcssa = phi i32 [ %a.1, %for.body ]35 ret i32 %a.1.lcssa36 37for.body:38 %b.addr.012 = phi ptr [ %b, %entry ], [ %add.ptr, %for.body ]39 %i.011 = phi i32 [ 0, %entry ], [ %inc1, %for.body ]40 %a.010 = phi i32 [ 0, %entry ], [ %a.1, %for.body ]41 %j.addr.09 = phi double [ %j, %entry ], [ %0, %for.body ]42 %arrayidx = getelementptr inbounds double, ptr %b.addr.012, i64 %idxprom43 %0 = load double, ptr %arrayidx, align 844 %mul = fmul double %j.addr.09, %045 %tobool = fcmp une double %mul, 0.000000e+0046 %inc = zext i1 %tobool to i3247 %a.1 = add nsw i32 %a.010, %inc48 %inc1 = add nuw nsw i32 %i.011, 149 %add.ptr = getelementptr inbounds double, ptr %b.addr.012, i64 2550 %exitcond = icmp eq i32 %inc1, 1024051 br i1 %exitcond, label %for.cond.cleanup, label %for.body, !llvm.loop !052}53 54; PR34711: given three consecutive instructions such that the first will be55; widened, the second is a cast that will be widened and needs to sink after the56; third, and the third is a first-order-recurring load that will be replicated57; instead of widened. Although the cast and the first instruction will both be58; widened, and are originally adjacent to each other, make sure the replicated59; load ends up appearing between them.60;61; void PR34711(short[2] *a, int *b, int *c, int n) {62; for(int i = 0; i < n; i++) {63; c[i] = 7;64; b[i] = (a[i][0] * a[i][1]);65; }66; }67;68; Check that the sext sank after the load in the vector loop.69define void @PR34711(ptr %a, ptr %b, ptr %c, i64 %n) #0 {70; CHECK-VF4UF1-LABEL: @PR3471171; CHECK-VF4UF1: vector.body72; CHECK-VF4UF1: %[[VEC_RECUR:.*]] = phi <vscale x 4 x i16> [ %vector.recur.init, %vector.ph ], [ %[[MGATHER:.*]], %vector.body ]73; CHECK-VF4UF1: %[[MGATHER]] = call <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0(<vscale x 4 x ptr> {{.*}}, <vscale x 4 x i1> splat (i1 true), <vscale x 4 x i16> poison)74; CHECK-VF4UF1-NEXT: %[[SPLICE:.*]] = call <vscale x 4 x i16> @llvm.vector.splice.nxv4i16(<vscale x 4 x i16> %[[VEC_RECUR]], <vscale x 4 x i16> %[[MGATHER]], i32 -1)75; CHECK-VF4UF1-NEXT: %[[SXT1:.*]] = sext <vscale x 4 x i16> %[[SPLICE]] to <vscale x 4 x i32>76; CHECK-VF4UF1-NEXT: %[[SXT2:.*]] = sext <vscale x 4 x i16> %[[MGATHER]] to <vscale x 4 x i32>77; CHECK-VF4UF1-NEXT: mul nsw <vscale x 4 x i32> %[[SXT2]], %[[SXT1]]78entry:79 %.pre = load i16, ptr %a80 br label %for.body81 82for.body:83 %0 = phi i16 [ %.pre, %entry ], [ %1, %for.body ]84 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]85 %arraycidx = getelementptr inbounds i32, ptr %c, i64 %indvars.iv86 %cur.index = getelementptr inbounds [2 x i16], ptr %a, i64 %indvars.iv, i64 187 store i32 7, ptr %arraycidx ; 1st instruction, to be widened.88 %conv = sext i16 %0 to i32 ; 2nd, cast to sink after third.89 %1 = load i16, ptr %cur.index ; 3rd, first-order-recurring load not widened.90 %conv3 = sext i16 %1 to i3291 %mul = mul nsw i32 %conv3, %conv92 %arrayidx5 = getelementptr inbounds i32, ptr %b, i64 %indvars.iv93 store i32 %mul, ptr %arrayidx594 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 195 %exitcond = icmp eq i64 %indvars.iv.next, %n96 br i1 %exitcond, label %for.end, label %for.body, !llvm.loop !097 98for.end:99 ret void100}101 102attributes #0 = { vscale_range(1, 16) }103!0 = distinct !{!0, !1}104!1 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}105