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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt -passes=loop-vectorize -mcpu=neoverse-v1 -force-vector-interleave=2 -force-vector-width=1 -S %s | FileCheck %s3 4target triple = "aarch64-unknown-linux-gnu"5 6define i32 @pr70988(ptr %src, i32 %n) {7; CHECK-LABEL: define i32 @pr70988(8; CHECK-SAME: ptr [[SRC:%.*]], i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {9; CHECK-NEXT: entry:10; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[N]], 1511; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umax.i32(i32 [[TMP1]], i32 1)12; CHECK-NEXT: [[UMAX:%.*]] = zext i32 [[TMP2]] to i6413; CHECK-NEXT: br label [[VECTOR_PH:%.*]]14; CHECK: vector.ph:15; CHECK-NEXT: [[ACTIVE_LANE_MASK_ENTRY:%.*]] = icmp ult i64 0, [[UMAX]]16; CHECK-NEXT: [[ACTIVE_LANE_MASK_ENTRY1:%.*]] = icmp ult i64 1, [[UMAX]]17; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]18; CHECK: vector.body:19; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_LOAD_CONTINUE5:%.*]] ]20; CHECK-NEXT: [[ACTIVE_LANE_MASK:%.*]] = phi i1 [ [[ACTIVE_LANE_MASK_ENTRY]], [[VECTOR_PH]] ], [ [[ACTIVE_LANE_MASK_NEXT:%.*]], [[PRED_LOAD_CONTINUE5]] ]21; CHECK-NEXT: [[ACTIVE_LANE_MASK2:%.*]] = phi i1 [ [[ACTIVE_LANE_MASK_ENTRY1]], [[VECTOR_PH]] ], [ [[ACTIVE_LANE_MASK_NEXT7:%.*]], [[PRED_LOAD_CONTINUE5]] ]22; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP17:%.*]], [[PRED_LOAD_CONTINUE5]] ]23; CHECK-NEXT: [[VEC_PHI3:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP18:%.*]], [[PRED_LOAD_CONTINUE5]] ]24; CHECK-NEXT: br i1 [[ACTIVE_LANE_MASK]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]]25; CHECK: pred.load.if:26; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i32, ptr [[SRC]], i64 [[INDEX]]27; CHECK-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 828; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 429; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]]30; CHECK: pred.load.continue:31; CHECK-NEXT: [[TMP8:%.*]] = phi i32 [ poison, [[VECTOR_BODY]] ], [ [[TMP6]], [[PRED_LOAD_IF]] ]32; CHECK-NEXT: br i1 [[ACTIVE_LANE_MASK2]], label [[PRED_LOAD_IF4:%.*]], label [[PRED_LOAD_CONTINUE5]]33; CHECK: pred.load.if4:34; CHECK-NEXT: [[TMP9:%.*]] = add i64 [[INDEX]], 135; CHECK-NEXT: [[TMP10:%.*]] = getelementptr i32, ptr [[SRC]], i64 [[TMP9]]36; CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 837; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 438; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE5]]39; CHECK: pred.load.continue5:40; CHECK-NEXT: [[TMP14:%.*]] = phi i32 [ poison, [[PRED_LOAD_CONTINUE]] ], [ [[TMP12]], [[PRED_LOAD_IF4]] ]41; CHECK-NEXT: [[TMP15:%.*]] = tail call i32 @llvm.smax.i32(i32 [[TMP8]], i32 [[VEC_PHI]])42; CHECK-NEXT: [[TMP16:%.*]] = tail call i32 @llvm.smax.i32(i32 [[TMP14]], i32 [[VEC_PHI3]])43; CHECK-NEXT: [[TMP17]] = select i1 [[ACTIVE_LANE_MASK]], i32 [[TMP15]], i32 [[VEC_PHI]]44; CHECK-NEXT: [[TMP18]] = select i1 [[ACTIVE_LANE_MASK2]], i32 [[TMP16]], i32 [[VEC_PHI3]]45; CHECK-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 246; CHECK-NEXT: [[TMP19:%.*]] = add i64 [[INDEX_NEXT]], 147; CHECK-NEXT: [[ACTIVE_LANE_MASK_NEXT]] = icmp ult i64 [[INDEX_NEXT]], [[UMAX]]48; CHECK-NEXT: [[ACTIVE_LANE_MASK_NEXT7]] = icmp ult i64 [[TMP19]], [[UMAX]]49; CHECK-NEXT: [[TMP20:%.*]] = xor i1 [[ACTIVE_LANE_MASK_NEXT]], true50; CHECK-NEXT: br i1 [[TMP20]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]51; CHECK: middle.block:52; CHECK-NEXT: [[RDX_MINMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP17]], i32 [[TMP18]])53; CHECK-NEXT: br label [[LOOP:%.*]]54; CHECK: exit:55; CHECK-NEXT: ret i32 [[RDX_MINMAX]]56;57entry:58 %1 = and i32 %n, 1559 %2 = call i32 @llvm.umax.i32(i32 %1, i32 1)60 %umax = zext i32 %2 to i6461 br label %loop62 63loop:64 %induc = phi i64 [ 0, %entry ], [ %induc.next, %loop ]65 %max = phi i32 [ 0, %entry ], [ %5, %loop ]66 %gep = getelementptr i32, ptr %src, i64 %induc67 %3 = load ptr, ptr %gep68 %4 = load i32, ptr %369 %5 = tail call i32 @llvm.smax.i32(i32 %4, i32 %max)70 %induc.next = add nuw nsw i64 %induc, 171 %exitcond.not = icmp eq i64 %induc.next, %umax72 br i1 %exitcond.not, label %exit, label %loop73 74exit:75 %res = phi i32 [ %5, %loop ]76 ret i32 %res77}78 79declare i32 @llvm.smax.i32(i32, i32)80declare i32 @llvm.umax.i32(i32, i32)81;.82; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}83; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}84; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}85;.86