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1; RUN: opt < %s -passes=loop-vectorize -prefer-predicate-over-epilogue=scalar-epilogue -pass-remarks=loop-vectorize -pass-remarks-analysis=loop-vectorize \2; RUN: -pass-remarks-missed=loop-vectorize -mtriple aarch64-unknown-linux-gnu -mattr=+sve,+bf16 -S 2>%t | FileCheck %s -check-prefix=CHECK3; RUN: cat %t | FileCheck %s -check-prefix=CHECK-REMARK4 5; Reduction can be vectorized6 7; ADD8 9; CHECK-REMARK: vectorized loop (vectorization width: vscale x 8, interleaved count: 2)10define i32 @add(ptr nocapture %a, ptr nocapture readonly %b, i64 %n) {11; CHECK-LABEL: @add12; CHECK: vector.body:13; CHECK: %[[LOAD1:.*]] = load <vscale x 8 x i32>14; CHECK: %[[LOAD2:.*]] = load <vscale x 8 x i32>15; CHECK: %[[ADD1:.*]] = add <vscale x 8 x i32> %[[LOAD1]]16; CHECK: %[[ADD2:.*]] = add <vscale x 8 x i32> %[[LOAD2]]17; CHECK: middle.block:18; CHECK: %[[ADD:.*]] = add <vscale x 8 x i32> %[[ADD2]], %[[ADD1]]19; CHECK-NEXT: call i32 @llvm.vector.reduce.add.nxv8i32(<vscale x 8 x i32> %[[ADD]])20entry:21 br label %for.body22 23for.body: ; preds = %entry, %for.body24 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]25 %sum.07 = phi i32 [ 2, %entry ], [ %add, %for.body ]26 %arrayidx = getelementptr inbounds i32, ptr %a, i64 %iv27 %0 = load i32, ptr %arrayidx, align 428 %add = add nsw i32 %0, %sum.0729 %iv.next = add nuw nsw i64 %iv, 130 %exitcond.not = icmp eq i64 %iv.next, %n31 br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !032 33for.end: ; preds = %for.body, %entry34 ret i32 %add35}36 37; OR38 39; CHECK-REMARK: vectorized loop (vectorization width: vscale x 8, interleaved count: 2)40define i32 @or(ptr nocapture %a, ptr nocapture readonly %b, i64 %n) {41; CHECK-LABEL: @or42; CHECK: vector.body:43; CHECK: %[[LOAD1:.*]] = load <vscale x 8 x i32>44; CHECK: %[[LOAD2:.*]] = load <vscale x 8 x i32>45; CHECK: %[[OR1:.*]] = or <vscale x 8 x i32> %[[LOAD1]]46; CHECK: %[[OR2:.*]] = or <vscale x 8 x i32> %[[LOAD2]]47; CHECK: middle.block:48; CHECK: %[[OR:.*]] = or <vscale x 8 x i32> %[[OR2]], %[[OR1]]49; CHECK-NEXT: call i32 @llvm.vector.reduce.or.nxv8i32(<vscale x 8 x i32> %[[OR]])50entry:51 br label %for.body52 53for.body: ; preds = %entry, %for.body54 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]55 %sum.07 = phi i32 [ 2, %entry ], [ %or, %for.body ]56 %arrayidx = getelementptr inbounds i32, ptr %a, i64 %iv57 %0 = load i32, ptr %arrayidx, align 458 %or = or i32 %0, %sum.0759 %iv.next = add nuw nsw i64 %iv, 160 %exitcond.not = icmp eq i64 %iv.next, %n61 br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !062 63for.end: ; preds = %for.body, %entry64 ret i32 %or65}66 67; AND68 69; CHECK-REMARK: vectorized loop (vectorization width: vscale x 8, interleaved count: 2)70define i32 @and(ptr nocapture %a, ptr nocapture readonly %b, i64 %n) {71; CHECK-LABEL: @and72; CHECK: vector.body:73; CHECK: %[[LOAD1:.*]] = load <vscale x 8 x i32>74; CHECK: %[[LOAD2:.*]] = load <vscale x 8 x i32>75; CHECK: %[[AND1:.*]] = and <vscale x 8 x i32> %[[LOAD1]]76; CHECK: %[[AND2:.*]] = and <vscale x 8 x i32> %[[LOAD2]]77; CHECK: middle.block:78; CHECK: %[[ABD:.*]] = and <vscale x 8 x i32> %[[ADD2]], %[[AND1]]79; CHECK-NEXT: call i32 @llvm.vector.reduce.and.nxv8i32(<vscale x 8 x i32> %[[ADD]])80entry:81 br label %for.body82 83for.body: ; preds = %entry, %for.body84 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]85 %sum.07 = phi i32 [ 2, %entry ], [ %and, %for.body ]86 %arrayidx = getelementptr inbounds i32, ptr %a, i64 %iv87 %0 = load i32, ptr %arrayidx, align 488 %and = and i32 %0, %sum.0789 %iv.next = add nuw nsw i64 %iv, 190 %exitcond.not = icmp eq i64 %iv.next, %n91 br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !092 93for.end: ; preds = %for.body, %entry94 ret i32 %and95}96 97; XOR98 99; CHECK-REMARK: vectorized loop (vectorization width: vscale x 8, interleaved count: 2)100define i32 @xor(ptr nocapture %a, ptr nocapture readonly %b, i64 %n) {101; CHECK-LABEL: @xor102; CHECK: vector.body:103; CHECK: %[[LOAD1:.*]] = load <vscale x 8 x i32>104; CHECK: %[[LOAD2:.*]] = load <vscale x 8 x i32>105; CHECK: %[[XOR1:.*]] = xor <vscale x 8 x i32> %[[LOAD1]]106; CHECK: %[[XOR2:.*]] = xor <vscale x 8 x i32> %[[LOAD2]]107; CHECK: middle.block:108; CHECK: %[[XOR:.*]] = xor <vscale x 8 x i32> %[[XOR2]], %[[XOR1]]109; CHECK-NEXT: call i32 @llvm.vector.reduce.xor.nxv8i32(<vscale x 8 x i32> %[[XOR]])110entry:111 br label %for.body112 113for.body: ; preds = %entry, %for.body114 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]115 %sum.07 = phi i32 [ 2, %entry ], [ %xor, %for.body ]116 %arrayidx = getelementptr inbounds i32, ptr %a, i64 %iv117 %0 = load i32, ptr %arrayidx, align 4118 %xor = xor i32 %0, %sum.07119 %iv.next = add nuw nsw i64 %iv, 1120 %exitcond.not = icmp eq i64 %iv.next, %n121 br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0122 123for.end: ; preds = %for.body, %entry124 ret i32 %xor125}126 127; CHECK-REMARK: vectorized loop (vectorization width: vscale x 8, interleaved count: 2)128; SMIN129 130define i32 @smin(ptr nocapture %a, ptr nocapture readonly %b, i64 %n) {131; CHECK-LABEL: @smin132; CHECK: vector.body:133; CHECK: %[[LOAD1:.*]] = load <vscale x 8 x i32>134; CHECK: %[[LOAD2:.*]] = load <vscale x 8 x i32>135; CHECK: %[[ICMP1:.*]] = icmp slt <vscale x 8 x i32> %[[LOAD1]]136; CHECK: %[[ICMP2:.*]] = icmp slt <vscale x 8 x i32> %[[LOAD2]]137; CHECK: %[[SEL1:.*]] = select <vscale x 8 x i1> %[[ICMP1]], <vscale x 8 x i32> %[[LOAD1]]138; CHECK: %[[SEL2:.*]] = select <vscale x 8 x i1> %[[ICMP2]], <vscale x 8 x i32> %[[LOAD2]]139; CHECK: middle.block:140; CHECK: %[[RDX:.*]] = call <vscale x 8 x i32> @llvm.smin.nxv8i32(<vscale x 8 x i32> %[[SEL1]], <vscale x 8 x i32> %[[SEL2]])141; CHECK-NEXT: call i32 @llvm.vector.reduce.smin.nxv8i32(<vscale x 8 x i32> %[[RDX]])142entry:143 br label %for.body144 145for.body: ; preds = %entry, %for.body146 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]147 %sum.010 = phi i32 [ 2, %entry ], [ %.sroa.speculated, %for.body ]148 %arrayidx = getelementptr inbounds i32, ptr %a, i64 %iv149 %0 = load i32, ptr %arrayidx, align 4150 %cmp.i = icmp slt i32 %0, %sum.010151 %.sroa.speculated = select i1 %cmp.i, i32 %0, i32 %sum.010152 %iv.next = add nuw nsw i64 %iv, 1153 %exitcond.not = icmp eq i64 %iv.next, %n154 br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0155 156for.end:157 ret i32 %.sroa.speculated158}159 160; CHECK-REMARK: vectorized loop (vectorization width: vscale x 8, interleaved count: 2)161; UMAX162 163define i32 @umax(ptr nocapture %a, ptr nocapture readonly %b, i64 %n) {164; CHECK-LABEL: @umax165; CHECK: vector.body:166; CHECK: %[[LOAD1:.*]] = load <vscale x 8 x i32>167; CHECK: %[[LOAD2:.*]] = load <vscale x 8 x i32>168; CHECK: %[[ICMP1:.*]] = icmp ugt <vscale x 8 x i32> %[[LOAD1]]169; CHECK: %[[ICMP2:.*]] = icmp ugt <vscale x 8 x i32> %[[LOAD2]]170; CHECK: %[[SEL1:.*]] = select <vscale x 8 x i1> %[[ICMP1]], <vscale x 8 x i32> %[[LOAD1]]171; CHECK: %[[SEL2:.*]] = select <vscale x 8 x i1> %[[ICMP2]], <vscale x 8 x i32> %[[LOAD2]]172; CHECK: middle.block:173; CHECK: %[[RDX:.*]] = call <vscale x 8 x i32> @llvm.umax.nxv8i32(<vscale x 8 x i32> %[[SEL1]], <vscale x 8 x i32> %[[SEL2]])174; CHECK-NEXT: call i32 @llvm.vector.reduce.umax.nxv8i32(<vscale x 8 x i32> %[[RDX]])175entry:176 br label %for.body177 178for.body: ; preds = %entry, %for.body179 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]180 %sum.010 = phi i32 [ 2, %entry ], [ %.sroa.speculated, %for.body ]181 %arrayidx = getelementptr inbounds i32, ptr %a, i64 %iv182 %0 = load i32, ptr %arrayidx, align 4183 %cmp.i = icmp ugt i32 %0, %sum.010184 %.sroa.speculated = select i1 %cmp.i, i32 %0, i32 %sum.010185 %iv.next = add nuw nsw i64 %iv, 1186 %exitcond.not = icmp eq i64 %iv.next, %n187 br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0188 189for.end:190 ret i32 %.sroa.speculated191}192 193; CHECK-REMARK: vectorized loop (vectorization width: vscale x 8, interleaved count: 2)194; FADD (FAST)195 196define float @fadd_fast(ptr noalias nocapture readonly %a, i64 %n) {197; CHECK-LABEL: @fadd_fast198; CHECK: vector.body:199; CHECK: %[[LOAD1:.*]] = load <vscale x 8 x float>200; CHECK: %[[LOAD2:.*]] = load <vscale x 8 x float>201; CHECK: %[[ADD1:.*]] = fadd fast <vscale x 8 x float> %[[LOAD1]]202; CHECK: %[[ADD2:.*]] = fadd fast <vscale x 8 x float> %[[LOAD2]]203; CHECK: middle.block:204; CHECK: %[[ADD:.*]] = fadd fast <vscale x 8 x float> %[[ADD2]], %[[ADD1]]205; CHECK-NEXT: call fast float @llvm.vector.reduce.fadd.nxv8f32(float 0.000000e+00, <vscale x 8 x float> %[[ADD]])206entry:207 br label %for.body208 209for.body:210 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]211 %sum.07 = phi float [ 0.000000e+00, %entry ], [ %add, %for.body ]212 %arrayidx = getelementptr inbounds float, ptr %a, i64 %iv213 %0 = load float, ptr %arrayidx, align 4214 %add = fadd fast float %0, %sum.07215 %iv.next = add nuw nsw i64 %iv, 1216 %exitcond.not = icmp eq i64 %iv.next, %n217 br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0218 219for.end:220 ret float %add221}222 223; CHECK-REMARK: Scalable vectorization not supported for the reduction operations found in this loop.224; CHECK-REMARK: vectorized loop (vectorization width: 8, interleaved count: 2)225define bfloat @fadd_fast_bfloat(ptr noalias nocapture readonly %a, i64 %n) {226; CHECK-LABEL: @fadd_fast_bfloat227; CHECK: vector.body:228; CHECK: %[[LOAD1:.*]] = load <8 x bfloat>229; CHECK: %[[LOAD2:.*]] = load <8 x bfloat>230; CHECK: %[[FADD1:.*]] = fadd fast <8 x bfloat> %[[LOAD1]]231; CHECK: %[[FADD2:.*]] = fadd fast <8 x bfloat> %[[LOAD2]]232; CHECK: middle.block:233; CHECK: %[[RDX:.*]] = fadd fast <8 x bfloat> %[[FADD2]], %[[FADD1]]234; CHECK: call fast bfloat @llvm.vector.reduce.fadd.v8bf16(bfloat 0xR0000, <8 x bfloat> %[[RDX]])235entry:236 br label %for.body237 238for.body:239 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]240 %sum.07 = phi bfloat [ 0.000000e+00, %entry ], [ %add, %for.body ]241 %arrayidx = getelementptr inbounds bfloat, ptr %a, i64 %iv242 %0 = load bfloat, ptr %arrayidx, align 4243 %add = fadd fast bfloat %0, %sum.07244 %iv.next = add nuw nsw i64 %iv, 1245 %exitcond.not = icmp eq i64 %iv.next, %n246 br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0247 248for.end:249 ret bfloat %add250}251 252; FMIN (FAST)253 254; CHECK-REMARK: vectorized loop (vectorization width: vscale x 8, interleaved count: 2)255define float @fmin_fast(ptr noalias nocapture readonly %a, i64 %n) #0 {256; CHECK-LABEL: @fmin_fast257; CHECK: vector.body:258; CHECK: %[[LOAD1:.*]] = load <vscale x 8 x float>259; CHECK: %[[LOAD2:.*]] = load <vscale x 8 x float>260; CHECK: %[[FCMP1:.*]] = fcmp fast olt <vscale x 8 x float> %[[LOAD1]]261; CHECK: %[[FCMP2:.*]] = fcmp fast olt <vscale x 8 x float> %[[LOAD2]]262; CHECK: %[[SEL1:.*]] = select <vscale x 8 x i1> %[[FCMP1]], <vscale x 8 x float> %[[LOAD1]]263; CHECK: %[[SEL2:.*]] = select <vscale x 8 x i1> %[[FCMP2]], <vscale x 8 x float> %[[LOAD2]]264; CHECK: middle.block:265; CHECK: %[[FCMP:.*]] = fcmp fast olt <vscale x 8 x float> %[[SEL1]], %[[SEL2]]266; CHECK-NEXT: %[[SEL:.*]] = select fast <vscale x 8 x i1> %[[FCMP]], <vscale x 8 x float> %[[SEL1]], <vscale x 8 x float> %[[SEL2]]267; CHECK-NEXT: call fast float @llvm.vector.reduce.fmin.nxv8f32(<vscale x 8 x float> %[[SEL]])268entry:269 br label %for.body270 271for.body:272 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]273 %sum.07 = phi float [ 0.000000e+00, %entry ], [ %.sroa.speculated, %for.body ]274 %arrayidx = getelementptr inbounds float, ptr %a, i64 %iv275 %0 = load float, ptr %arrayidx, align 4276 %cmp.i = fcmp fast olt float %0, %sum.07277 %.sroa.speculated = select i1 %cmp.i, float %0, float %sum.07278 %iv.next = add nuw nsw i64 %iv, 1279 %exitcond.not = icmp eq i64 %iv.next, %n280 br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0281 282for.end:283 ret float %.sroa.speculated284}285 286; FMAX (FAST)287 288; CHECK-REMARK: vectorized loop (vectorization width: vscale x 8, interleaved count: 2)289define float @fmax_fast(ptr noalias nocapture readonly %a, i64 %n) #0 {290; CHECK-LABEL: @fmax_fast291; CHECK: vector.body:292; CHECK: %[[LOAD1:.*]] = load <vscale x 8 x float>293; CHECK: %[[LOAD2:.*]] = load <vscale x 8 x float>294; CHECK: %[[FCMP1:.*]] = fcmp fast ogt <vscale x 8 x float> %[[LOAD1]]295; CHECK: %[[FCMP2:.*]] = fcmp fast ogt <vscale x 8 x float> %[[LOAD2]]296; CHECK: %[[SEL1:.*]] = select <vscale x 8 x i1> %[[FCMP1]], <vscale x 8 x float> %[[LOAD1]]297; CHECK: %[[SEL2:.*]] = select <vscale x 8 x i1> %[[FCMP2]], <vscale x 8 x float> %[[LOAD2]]298; CHECK: middle.block:299; CHECK: %[[FCMP:.*]] = fcmp fast ogt <vscale x 8 x float> %[[SEL1]], %[[SEL2]]300; CHECK-NEXT: %[[SEL:.*]] = select fast <vscale x 8 x i1> %[[FCMP]], <vscale x 8 x float> %[[SEL1]], <vscale x 8 x float> %[[SEL2]]301; CHECK-NEXT: call fast float @llvm.vector.reduce.fmax.nxv8f32(<vscale x 8 x float> %[[SEL]])302entry:303 br label %for.body304 305for.body:306 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]307 %sum.07 = phi float [ 0.000000e+00, %entry ], [ %.sroa.speculated, %for.body ]308 %arrayidx = getelementptr inbounds float, ptr %a, i64 %iv309 %0 = load float, ptr %arrayidx, align 4310 %cmp.i = fcmp fast ogt float %0, %sum.07311 %.sroa.speculated = select i1 %cmp.i, float %0, float %sum.07312 %iv.next = add nuw nsw i64 %iv, 1313 %exitcond.not = icmp eq i64 %iv.next, %n314 br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0315 316for.end:317 ret float %.sroa.speculated318}319 320; ADD (with reduction stored in invariant address)321 322; CHECK-REMARK: vectorized loop (vectorization width: vscale x 4, interleaved count: 2)323define void @invariant_store(ptr %dst, ptr readonly %src) {324; CHECK-LABEL: @invariant_store325; CHECK: vector.body:326; CHECK: %[[LOAD1:.*]] = load <vscale x 4 x i32>327; CHECK: %[[LOAD2:.*]] = load <vscale x 4 x i32>328; CHECK: %[[ADD1:.*]] = add <vscale x 4 x i32> %{{.*}}, %[[LOAD1]]329; CHECK: %[[ADD2:.*]] = add <vscale x 4 x i32> %{{.*}}, %[[LOAD2]]330; CHECK: middle.block:331; CHECK: %[[ADD:.*]] = add <vscale x 4 x i32> %[[ADD2]], %[[ADD1]]332; CHECK-NEXT: %[[SUM:.*]] = call i32 @llvm.vector.reduce.add.nxv4i32(<vscale x 4 x i32> %[[ADD]])333; CHECK-NEXT: store i32 %[[SUM]], ptr %gep.dst, align 4334entry:335 %gep.dst = getelementptr inbounds i32, ptr %dst, i64 42336 store i32 0, ptr %gep.dst, align 4337 br label %for.body338for.body:339 %sum = phi i32 [ 0, %entry ], [ %add, %for.body ]340 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]341 %gep.src = getelementptr inbounds i32, ptr %src, i64 %indvars.iv342 %0 = load i32, ptr %gep.src, align 4343 %add = add nsw i32 %sum, %0344 store i32 %add, ptr %gep.dst, align 4345 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1346 %exitcond = icmp eq i64 %indvars.iv.next, 1000347 br i1 %exitcond, label %for.cond.cleanup, label %for.body348 349for.cond.cleanup:350 ret void351}352 353 354; ADD (with reduction of i1)355 356; CHECK-REMARK: vectorized loop (vectorization width: vscale x 8, interleaved count: 2)357define i1 @add_trunc_i32_i1(ptr nocapture %src, i64 %N) {358; CHECK-LABEL: @add_trunc_i32_i1359; CHECK: vector.body:360; CHECK: %[[PHI1:.*]] = phi <vscale x 8 x i1> [ zeroinitializer, %{{.*}} ], [ [[XOR1:%.+]], %vector.body ]361; CHECK: %[[PHI2:.*]] = phi <vscale x 8 x i1> [ zeroinitializer, %{{.*}} ], [ [[XOR2:%.+]], %vector.body ]362; CHECK: %[[TRUNC1:.*]] = trunc <vscale x 8 x i32> %{{.*}} to <vscale x 8 x i1>363; CHECK: %[[TRUNC2:.*]] = trunc <vscale x 8 x i32> %{{.*}} to <vscale x 8 x i1>364; CHECK: [[XOR1]] = xor <vscale x 8 x i1> %[[PHI1]], %[[TRUNC1]]365; CHECK: [[XOR2]] = xor <vscale x 8 x i1> %[[PHI2]], %[[TRUNC2]]366entry:367 br label %for.body368 369for.body:370 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]371 %red = phi i1 [ 0, %entry ], [ %red.next, %for.body ]372 %arrayidx = getelementptr inbounds i32, ptr %src, i64 %iv373 %load32 = load i32, ptr %arrayidx, align 4374 %trunc = trunc i32 %load32 to i1375 %red.next = xor i1 %red, %trunc376 %iv.next = add i64 %iv, 1377 %exitcond.not = icmp eq i64 %iv.next, %N378 br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0379 380for.end:381 ret i1 %red.next382}383 384 385; Reduction cannot be vectorized386 387; MUL388 389; CHECK-REMARK: Scalable vectorization not supported for the reduction operations found in this loop.390; CHECK-REMARK: vectorized loop (vectorization width: 4, interleaved count: 2)391define i32 @mul(ptr nocapture %a, ptr nocapture readonly %b, i64 %n) {392; CHECK-LABEL: @mul393; CHECK: vector.body:394; CHECK: %[[LOAD1:.*]] = load <4 x i32>395; CHECK: %[[LOAD2:.*]] = load <4 x i32>396; CHECK: %[[MUL1:.*]] = mul <4 x i32> %[[LOAD1]]397; CHECK: %[[MUL2:.*]] = mul <4 x i32> %[[LOAD2]]398; CHECK: middle.block:399; CHECK: %[[RDX:.*]] = mul <4 x i32> %[[MUL2]], %[[MUL1]]400; CHECK: call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> %[[RDX]])401entry:402 br label %for.body403 404for.body: ; preds = %entry, %for.body405 %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]406 %sum.07 = phi i32 [ 2, %entry ], [ %mul, %for.body ]407 %arrayidx = getelementptr inbounds i32, ptr %a, i64 %iv408 %0 = load i32, ptr %arrayidx, align 4409 %mul = mul nsw i32 %0, %sum.07410 %iv.next = add nuw nsw i64 %iv, 1411 %exitcond.not = icmp eq i64 %iv.next, %n412 br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0413 414for.end: ; preds = %for.body, %entry415 ret i32 %mul416}417 418; Note: This test was added to ensure we always check the legality of reductions (end emit a warning if necessary) before checking for memory dependencies419; CHECK-REMARK: Scalable vectorization not supported for the reduction operations found in this loop.420; CHECK-REMARK: Ignoring user-specified interleave count due to possibly unsafe dependencies in the loop.421; CHECK-REMARK: vectorized loop (vectorization width: 4, interleaved count: 1)422define i32 @memory_dependence(ptr noalias nocapture %a, ptr noalias nocapture readonly %b, i64 %n) {423; CHECK-LABEL: @memory_dependence424; CHECK: vector.body:425; CHECK: %[[LOAD1:.*]] = load <4 x i32>426; CHECK: %[[LOAD2:.*]] = load <4 x i32>427; CHECK: %[[ADD1:.*]] = add nsw <4 x i32> %[[LOAD2]], %[[LOAD1]]428; CHECK: %[[MUL1:.*]] = mul <4 x i32> %[[LOAD2]]429; CHECK: middle.block:430; CHECK: call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> %[[MUL1]])431entry:432 br label %for.body433 434for.body:435 %i = phi i64 [ %inc, %for.body ], [ 0, %entry ]436 %sum = phi i32 [ %mul, %for.body ], [ 2, %entry ]437 %arrayidx = getelementptr inbounds i32, ptr %a, i64 %i438 %0 = load i32, ptr %arrayidx, align 4439 %arrayidx1 = getelementptr inbounds i32, ptr %b, i64 %i440 %1 = load i32, ptr %arrayidx1, align 4441 %add = add nsw i32 %1, %0442 %add2 = add nuw nsw i64 %i, 32443 %arrayidx3 = getelementptr inbounds i32, ptr %a, i64 %add2444 store i32 %add, ptr %arrayidx3, align 4445 %mul = mul nsw i32 %1, %sum446 %inc = add nuw nsw i64 %i, 1447 %exitcond.not = icmp eq i64 %inc, %n448 br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0449 450for.end:451 ret i32 %mul452}453 454attributes #0 = { "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" }455 456!0 = distinct !{!0, !1, !2, !3, !4}457!1 = !{!"llvm.loop.vectorize.width", i32 8}458!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}459!3 = !{!"llvm.loop.interleave.count", i32 2}460!4 = !{!"llvm.loop.vectorize.enable", i1 true}461