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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 42; RUN: opt -p loop-vectorize -S %s | FileCheck --check-prefixes=DEFAULT %s3; RUN: opt -p loop-vectorize -prefer-predicate-over-epilogue=predicate-else-scalar-epilogue -S %s | FileCheck --check-prefixes=PRED %s4 5target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"6target triple = "arm64-apple-macosx14.0.0"7 8define void @cost_store_i8(ptr %dst) #0 {9; DEFAULT-LABEL: define void @cost_store_i8(10; DEFAULT-SAME: ptr [[DST:%.*]]) #[[ATTR0:[0-9]+]] {11; DEFAULT-NEXT: iter.check:12; DEFAULT-NEXT: [[TMP10:%.*]] = call i64 @llvm.vscale.i64()13; DEFAULT-NEXT: [[TMP13:%.*]] = shl nuw i64 [[TMP10]], 214; DEFAULT-NEXT: [[MIN_ITERS_CHECK1:%.*]] = icmp ult i64 101, [[TMP13]]15; DEFAULT-NEXT: br i1 [[MIN_ITERS_CHECK1]], label [[VEC_EPILOG_SCALAR_PH:%.*]], label [[VECTOR_MAIN_LOOP_ITER_CHECK:%.*]]16; DEFAULT: vector.main.loop.iter.check:17; DEFAULT-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()18; DEFAULT-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 519; DEFAULT-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 101, [[TMP1]]20; DEFAULT-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[VEC_EPILOG_PH:%.*]], label [[VECTOR_PH:%.*]]21; DEFAULT: vector.ph:22; DEFAULT-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()23; DEFAULT-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 3224; DEFAULT-NEXT: [[N_MOD_VF:%.*]] = urem i64 101, [[TMP3]]25; DEFAULT-NEXT: [[N_VEC:%.*]] = sub i64 101, [[N_MOD_VF]]26; DEFAULT-NEXT: br label [[VECTOR_BODY:%.*]]27; DEFAULT: vector.body:28; DEFAULT-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]29; DEFAULT-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[DST]], i64 [[INDEX]]30; DEFAULT-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64()31; DEFAULT-NEXT: [[TMP6:%.*]] = shl nuw i64 [[TMP5]], 432; DEFAULT-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP6]]33; DEFAULT-NEXT: store <vscale x 16 x i8> zeroinitializer, ptr [[TMP4]], align 134; DEFAULT-NEXT: store <vscale x 16 x i8> zeroinitializer, ptr [[TMP7]], align 135; DEFAULT-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP3]]36; DEFAULT-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]37; DEFAULT-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]38; DEFAULT: middle.block:39; DEFAULT-NEXT: [[CMP_N:%.*]] = icmp eq i64 101, [[N_VEC]]40; DEFAULT-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[VEC_EPILOG_ITER_CHECK:%.*]]41; DEFAULT: vec.epilog.iter.check:42; DEFAULT-NEXT: [[MIN_EPILOG_ITERS_CHECK:%.*]] = icmp ult i64 [[N_MOD_VF]], [[TMP13]]43; DEFAULT-NEXT: br i1 [[MIN_EPILOG_ITERS_CHECK]], label [[VEC_EPILOG_SCALAR_PH]], label [[VEC_EPILOG_PH]], !prof [[PROF3:![0-9]+]]44; DEFAULT: vec.epilog.ph:45; DEFAULT-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[VEC_EPILOG_ITER_CHECK]] ], [ 0, [[VECTOR_MAIN_LOOP_ITER_CHECK]] ]46; DEFAULT-NEXT: [[TMP11:%.*]] = call i64 @llvm.vscale.i64()47; DEFAULT-NEXT: [[TMP12:%.*]] = mul nuw i64 [[TMP11]], 448; DEFAULT-NEXT: [[N_MOD_VF2:%.*]] = urem i64 101, [[TMP12]]49; DEFAULT-NEXT: [[N_VEC3:%.*]] = sub i64 101, [[N_MOD_VF2]]50; DEFAULT-NEXT: br label [[VEC_EPILOG_VECTOR_BODY:%.*]]51; DEFAULT: vec.epilog.vector.body:52; DEFAULT-NEXT: [[INDEX1:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], [[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT2:%.*]], [[VEC_EPILOG_VECTOR_BODY]] ]53; DEFAULT-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[DST]], i64 [[INDEX1]]54; DEFAULT-NEXT: store <vscale x 4 x i8> zeroinitializer, ptr [[TMP9]], align 155; DEFAULT-NEXT: [[INDEX_NEXT2]] = add nuw i64 [[INDEX1]], [[TMP12]]56; DEFAULT-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT2]], [[N_VEC3]]57; DEFAULT-NEXT: br i1 [[TMP14]], label [[VEC_EPILOG_MIDDLE_BLOCK:%.*]], label [[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]58; DEFAULT: vec.epilog.middle.block:59; DEFAULT-NEXT: [[CMP_N6:%.*]] = icmp eq i64 101, [[N_VEC3]]60; DEFAULT-NEXT: br i1 [[CMP_N6]], label [[EXIT]], label [[VEC_EPILOG_SCALAR_PH]]61; DEFAULT: vec.epilog.scalar.ph:62; DEFAULT-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC3]], [[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[N_VEC]], [[VEC_EPILOG_ITER_CHECK]] ], [ 0, [[ITER_CHECK:%.*]] ]63; DEFAULT-NEXT: br label [[LOOP:%.*]]64; DEFAULT: loop:65; DEFAULT-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[VEC_EPILOG_SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]66; DEFAULT-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[DST]], i64 [[IV]]67; DEFAULT-NEXT: store i8 0, ptr [[GEP]], align 168; DEFAULT-NEXT: [[IV_NEXT]] = add i64 [[IV]], 169; DEFAULT-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 10070; DEFAULT-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP5:![0-9]+]]71; DEFAULT: exit:72; DEFAULT-NEXT: ret void73;74; PRED-LABEL: define void @cost_store_i8(75; PRED-SAME: ptr [[DST:%.*]]) #[[ATTR0:[0-9]+]] {76; PRED-NEXT: entry:77; PRED-NEXT: br label [[VECTOR_PH:%.*]]78; PRED: vector.ph:79; PRED-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()80; PRED-NEXT: [[TMP1:%.*]] = mul nuw i64 [[TMP0]], 1681; PRED-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()82; PRED-NEXT: [[TMP3:%.*]] = shl nuw i64 [[TMP2]], 483; PRED-NEXT: [[TMP4:%.*]] = sub i64 101, [[TMP3]]84; PRED-NEXT: [[TMP5:%.*]] = icmp ugt i64 101, [[TMP3]]85; PRED-NEXT: [[TMP6:%.*]] = select i1 [[TMP5]], i64 [[TMP4]], i64 086; PRED-NEXT: [[ACTIVE_LANE_MASK_ENTRY:%.*]] = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i64(i64 0, i64 101)87; PRED-NEXT: br label [[VECTOR_BODY:%.*]]88; PRED: vector.body:89; PRED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]90; PRED-NEXT: [[ACTIVE_LANE_MASK:%.*]] = phi <vscale x 16 x i1> [ [[ACTIVE_LANE_MASK_ENTRY]], [[VECTOR_PH]] ], [ [[ACTIVE_LANE_MASK_NEXT:%.*]], [[VECTOR_BODY]] ]91; PRED-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[DST]], i64 [[INDEX]]92; PRED-NEXT: call void @llvm.masked.store.nxv16i8.p0(<vscale x 16 x i8> zeroinitializer, ptr align 1 [[TMP7]], <vscale x 16 x i1> [[ACTIVE_LANE_MASK]])93; PRED-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], [[TMP1]]94; PRED-NEXT: [[ACTIVE_LANE_MASK_NEXT]] = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i64(i64 [[INDEX]], i64 [[TMP6]])95; PRED-NEXT: [[TMP8:%.*]] = extractelement <vscale x 16 x i1> [[ACTIVE_LANE_MASK_NEXT]], i32 096; PRED-NEXT: [[TMP9:%.*]] = xor i1 [[TMP8]], true97; PRED-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]98; PRED: middle.block:99; PRED-NEXT: br label [[EXIT:%.*]]100; PRED: exit:101; PRED-NEXT: ret void102;103entry:104 br label %loop105 106loop:107 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]108 %gep = getelementptr i8, ptr %dst, i64 %iv109 store i8 0, ptr %gep, align 1110 %iv.next = add i64 %iv, 1111 %ec = icmp eq i64 %iv, 100112 br i1 %ec, label %exit, label %loop113 114exit:115 ret void116}117 118define void @trunc_store(ptr %dst, ptr %src, i16 %x) #1 {119; DEFAULT-LABEL: define void @trunc_store(120; DEFAULT-SAME: ptr [[DST:%.*]], ptr [[SRC:%.*]], i16 [[X:%.*]]) #[[ATTR1:[0-9]+]] {121; DEFAULT-NEXT: iter.check:122; DEFAULT-NEXT: br i1 false, label [[VEC_EPILOG_SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]123; DEFAULT: vector.memcheck:124; DEFAULT-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[DST]], i64 1000125; DEFAULT-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[SRC]], i64 8126; DEFAULT-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP1]]127; DEFAULT-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[SRC]], [[SCEVGEP]]128; DEFAULT-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]129; DEFAULT-NEXT: br i1 [[FOUND_CONFLICT]], label [[VEC_EPILOG_SCALAR_PH]], label [[VECTOR_MAIN_LOOP_ITER_CHECK:%.*]]130; DEFAULT: vector.main.loop.iter.check:131; DEFAULT-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()132; DEFAULT-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 5133; DEFAULT-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 1000, [[TMP1]]134; DEFAULT-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[VEC_EPILOG_PH:%.*]], label [[VECTOR_PH:%.*]]135; DEFAULT: vector.ph:136; DEFAULT-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()137; DEFAULT-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 32138; DEFAULT-NEXT: [[N_MOD_VF:%.*]] = urem i64 1000, [[TMP3]]139; DEFAULT-NEXT: [[N_VEC:%.*]] = sub i64 1000, [[N_MOD_VF]]140; DEFAULT-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 16 x i16> poison, i16 [[X]], i64 0141; DEFAULT-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 16 x i16> [[BROADCAST_SPLATINSERT]], <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer142; DEFAULT-NEXT: [[TMP5:%.*]] = load i64, ptr [[SRC]], align 8, !alias.scope [[META6:![0-9]+]]143; DEFAULT-NEXT: [[BROADCAST_SPLATINSERT2:%.*]] = insertelement <vscale x 16 x i64> poison, i64 [[TMP5]], i64 0144; DEFAULT-NEXT: [[BROADCAST_SPLAT3:%.*]] = shufflevector <vscale x 16 x i64> [[BROADCAST_SPLATINSERT2]], <vscale x 16 x i64> poison, <vscale x 16 x i32> zeroinitializer145; DEFAULT-NEXT: [[TMP6:%.*]] = trunc <vscale x 16 x i64> [[BROADCAST_SPLAT3]] to <vscale x 16 x i8>146; DEFAULT-NEXT: [[TMP13:%.*]] = trunc <vscale x 16 x i16> [[BROADCAST_SPLAT]] to <vscale x 16 x i8>147; DEFAULT-NEXT: [[TMP14:%.*]] = and <vscale x 16 x i8> [[TMP6]], [[TMP13]]148; DEFAULT-NEXT: br label [[VECTOR_BODY:%.*]]149; DEFAULT: vector.body:150; DEFAULT-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]151; DEFAULT-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[DST]], i64 [[INDEX]]152; DEFAULT-NEXT: [[TMP15:%.*]] = call i64 @llvm.vscale.i64()153; DEFAULT-NEXT: [[TMP16:%.*]] = shl nuw i64 [[TMP15]], 4154; DEFAULT-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP16]]155; DEFAULT-NEXT: store <vscale x 16 x i8> [[TMP14]], ptr [[TMP4]], align 1, !alias.scope [[META9:![0-9]+]], !noalias [[META6]]156; DEFAULT-NEXT: store <vscale x 16 x i8> [[TMP14]], ptr [[TMP17]], align 1, !alias.scope [[META9]], !noalias [[META6]]157; DEFAULT-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP3]]158; DEFAULT-NEXT: [[TMP18:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]159; DEFAULT-NEXT: br i1 [[TMP18]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]160; DEFAULT: middle.block:161; DEFAULT-NEXT: [[CMP_N:%.*]] = icmp eq i64 1000, [[N_VEC]]162; DEFAULT-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[VEC_EPILOG_ITER_CHECK:%.*]]163; DEFAULT: vec.epilog.iter.check:164; DEFAULT-NEXT: [[MIN_EPILOG_ITERS_CHECK:%.*]] = icmp ult i64 [[N_MOD_VF]], 8165; DEFAULT-NEXT: br i1 [[MIN_EPILOG_ITERS_CHECK]], label [[VEC_EPILOG_SCALAR_PH]], label [[VEC_EPILOG_PH]], !prof [[PROF12:![0-9]+]]166; DEFAULT: vec.epilog.ph:167; DEFAULT-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[VEC_EPILOG_ITER_CHECK]] ], [ 0, [[VECTOR_MAIN_LOOP_ITER_CHECK]] ]168; DEFAULT-NEXT: [[BROADCAST_SPLATINSERT4:%.*]] = insertelement <8 x i16> poison, i16 [[X]], i64 0169; DEFAULT-NEXT: [[BROADCAST_SPLAT5:%.*]] = shufflevector <8 x i16> [[BROADCAST_SPLATINSERT4]], <8 x i16> poison, <8 x i32> zeroinitializer170; DEFAULT-NEXT: [[TMP8:%.*]] = load i64, ptr [[SRC]], align 8, !alias.scope [[META13:![0-9]+]]171; DEFAULT-NEXT: [[BROADCAST_SPLATINSERT7:%.*]] = insertelement <8 x i64> poison, i64 [[TMP8]], i64 0172; DEFAULT-NEXT: [[BROADCAST_SPLAT8:%.*]] = shufflevector <8 x i64> [[BROADCAST_SPLATINSERT7]], <8 x i64> poison, <8 x i32> zeroinitializer173; DEFAULT-NEXT: [[TMP9:%.*]] = trunc <8 x i64> [[BROADCAST_SPLAT8]] to <8 x i8>174; DEFAULT-NEXT: [[TMP7:%.*]] = trunc <8 x i16> [[BROADCAST_SPLAT5]] to <8 x i8>175; DEFAULT-NEXT: [[TMP10:%.*]] = and <8 x i8> [[TMP9]], [[TMP7]]176; DEFAULT-NEXT: br label [[VEC_EPILOG_VECTOR_BODY:%.*]]177; DEFAULT: vec.epilog.vector.body:178; DEFAULT-NEXT: [[INDEX6:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], [[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT9:%.*]], [[VEC_EPILOG_VECTOR_BODY]] ]179; DEFAULT-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[DST]], i64 [[INDEX6]]180; DEFAULT-NEXT: store <8 x i8> [[TMP10]], ptr [[TMP11]], align 1, !alias.scope [[META16:![0-9]+]], !noalias [[META13]]181; DEFAULT-NEXT: [[INDEX_NEXT9]] = add nuw i64 [[INDEX6]], 8182; DEFAULT-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT9]], 1000183; DEFAULT-NEXT: br i1 [[TMP12]], label [[VEC_EPILOG_MIDDLE_BLOCK:%.*]], label [[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP18:![0-9]+]]184; DEFAULT: vec.epilog.middle.block:185; DEFAULT-NEXT: br i1 true, label [[EXIT]], label [[VEC_EPILOG_SCALAR_PH]]186; DEFAULT: vec.epilog.scalar.ph:187; DEFAULT-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 1000, [[VEC_EPILOG_MIDDLE_BLOCK]] ], [ [[N_VEC]], [[VEC_EPILOG_ITER_CHECK]] ], [ 0, [[VECTOR_MEMCHECK]] ], [ 0, [[ITER_CHECK:%.*]] ]188; DEFAULT-NEXT: br label [[LOOP:%.*]]189; DEFAULT: loop:190; DEFAULT-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[VEC_EPILOG_SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]191; DEFAULT-NEXT: [[X_EXT:%.*]] = zext i16 [[X]] to i64192; DEFAULT-NEXT: [[L:%.*]] = load i64, ptr [[SRC]], align 8193; DEFAULT-NEXT: [[AND:%.*]] = and i64 [[L]], [[X_EXT]]194; DEFAULT-NEXT: [[TRUNC:%.*]] = trunc i64 [[AND]] to i8195; DEFAULT-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[DST]], i64 [[IV]]196; DEFAULT-NEXT: store i8 [[TRUNC]], ptr [[GEP]], align 1197; DEFAULT-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1198; DEFAULT-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 1000199; DEFAULT-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP19:![0-9]+]]200; DEFAULT: exit:201; DEFAULT-NEXT: ret void202;203; PRED-LABEL: define void @trunc_store(204; PRED-SAME: ptr [[DST:%.*]], ptr [[SRC:%.*]], i16 [[X:%.*]]) #[[ATTR1:[0-9]+]] {205; PRED-NEXT: entry:206; PRED-NEXT: br label [[VECTOR_MEMCHECK:%.*]]207; PRED: vector.memcheck:208; PRED-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[DST]], i64 1000209; PRED-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[SRC]], i64 8210; PRED-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP1]]211; PRED-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[SRC]], [[SCEVGEP]]212; PRED-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]213; PRED-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]214; PRED: vector.ph:215; PRED-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()216; PRED-NEXT: [[TMP1:%.*]] = mul nuw i64 [[TMP0]], 16217; PRED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 16 x i16> poison, i16 [[X]], i64 0218; PRED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 16 x i16> [[BROADCAST_SPLATINSERT]], <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer219; PRED-NEXT: [[ACTIVE_LANE_MASK_ENTRY:%.*]] = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i64(i64 0, i64 1000)220; PRED-NEXT: [[TMP2:%.*]] = trunc <vscale x 16 x i16> [[BROADCAST_SPLAT]] to <vscale x 16 x i8>221; PRED-NEXT: br label [[VECTOR_BODY:%.*]]222; PRED: vector.body:223; PRED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]224; PRED-NEXT: [[ACTIVE_LANE_MASK:%.*]] = phi <vscale x 16 x i1> [ [[ACTIVE_LANE_MASK_ENTRY]], [[VECTOR_PH]] ], [ [[ACTIVE_LANE_MASK_NEXT:%.*]], [[VECTOR_BODY]] ]225; PRED-NEXT: [[TMP3:%.*]] = load i64, ptr [[SRC]], align 8, !alias.scope [[META3:![0-9]+]]226; PRED-NEXT: [[BROADCAST_SPLATINSERT2:%.*]] = insertelement <vscale x 16 x i64> poison, i64 [[TMP3]], i64 0227; PRED-NEXT: [[BROADCAST_SPLAT3:%.*]] = shufflevector <vscale x 16 x i64> [[BROADCAST_SPLATINSERT2]], <vscale x 16 x i64> poison, <vscale x 16 x i32> zeroinitializer228; PRED-NEXT: [[TMP4:%.*]] = trunc <vscale x 16 x i64> [[BROADCAST_SPLAT3]] to <vscale x 16 x i8>229; PRED-NEXT: [[TMP5:%.*]] = and <vscale x 16 x i8> [[TMP4]], [[TMP2]]230; PRED-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[DST]], i64 [[INDEX]]231; PRED-NEXT: call void @llvm.masked.store.nxv16i8.p0(<vscale x 16 x i8> [[TMP5]], ptr align 1 [[TMP6]], <vscale x 16 x i1> [[ACTIVE_LANE_MASK]]), !alias.scope [[META6:![0-9]+]], !noalias [[META3]]232; PRED-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], [[TMP1]]233; PRED-NEXT: [[ACTIVE_LANE_MASK_NEXT]] = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i64(i64 [[INDEX_NEXT]], i64 1000)234; PRED-NEXT: [[TMP7:%.*]] = extractelement <vscale x 16 x i1> [[ACTIVE_LANE_MASK_NEXT]], i32 0235; PRED-NEXT: [[TMP8:%.*]] = xor i1 [[TMP7]], true236; PRED-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]237; PRED: middle.block:238; PRED-NEXT: br label [[EXIT:%.*]]239; PRED: scalar.ph:240; PRED-NEXT: br label [[LOOP:%.*]]241; PRED: loop:242; PRED-NEXT: [[IV:%.*]] = phi i64 [ 0, [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]243; PRED-NEXT: [[X_EXT:%.*]] = zext i16 [[X]] to i64244; PRED-NEXT: [[L:%.*]] = load i64, ptr [[SRC]], align 8245; PRED-NEXT: [[AND:%.*]] = and i64 [[L]], [[X_EXT]]246; PRED-NEXT: [[TRUNC:%.*]] = trunc i64 [[AND]] to i8247; PRED-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[DST]], i64 [[IV]]248; PRED-NEXT: store i8 [[TRUNC]], ptr [[GEP]], align 1249; PRED-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1250; PRED-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 1000251; PRED-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP9:![0-9]+]]252; PRED: exit:253; PRED-NEXT: ret void254;255entry:256 br label %loop257 258loop:259 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]260 %x.ext = zext i16 %x to i64261 %l = load i64, ptr %src, align 8262 %and = and i64 %l, %x.ext263 %trunc = trunc i64 %and to i8264 %gep = getelementptr i8, ptr %dst, i64 %iv265 store i8 %trunc, ptr %gep, align 1266 %iv.next = add i64 %iv, 1267 %ec = icmp eq i64 %iv.next, 1000268 br i1 %ec, label %exit, label %loop269 270exit:271 ret void272}273 274attributes #0 = { "target-features"="+sve" }275attributes #1 = { vscale_range(1,16) "target-features"="+sve" }276 277 278;.279; DEFAULT: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}280; DEFAULT: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}281; DEFAULT: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}282; DEFAULT: [[PROF3]] = !{!"branch_weights", i32 4, i32 28}283; DEFAULT: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}284; DEFAULT: [[LOOP5]] = distinct !{[[LOOP5]], [[META2]], [[META1]]}285; DEFAULT: [[META6]] = !{[[META7:![0-9]+]]}286; DEFAULT: [[META7]] = distinct !{[[META7]], [[META8:![0-9]+]]}287; DEFAULT: [[META8]] = distinct !{[[META8]], !"LVerDomain"}288; DEFAULT: [[META9]] = !{[[META10:![0-9]+]]}289; DEFAULT: [[META10]] = distinct !{[[META10]], [[META8]]}290; DEFAULT: [[LOOP11]] = distinct !{[[LOOP11]], [[META1]], [[META2]]}291; DEFAULT: [[PROF12]] = !{!"branch_weights", i32 8, i32 24}292; DEFAULT: [[META13]] = !{[[META14:![0-9]+]]}293; DEFAULT: [[META14]] = distinct !{[[META14]], [[META15:![0-9]+]]}294; DEFAULT: [[META15]] = distinct !{[[META15]], !"LVerDomain"}295; DEFAULT: [[META16]] = !{[[META17:![0-9]+]]}296; DEFAULT: [[META17]] = distinct !{[[META17]], [[META15]]}297; DEFAULT: [[LOOP18]] = distinct !{[[LOOP18]], [[META1]], [[META2]]}298; DEFAULT: [[LOOP19]] = distinct !{[[LOOP19]], [[META1]]}299;.300; PRED: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}301; PRED: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}302; PRED: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}303; PRED: [[META3]] = !{[[META4:![0-9]+]]}304; PRED: [[META4]] = distinct !{[[META4]], [[META5:![0-9]+]]}305; PRED: [[META5]] = distinct !{[[META5]], !"LVerDomain"}306; PRED: [[META6]] = !{[[META7:![0-9]+]]}307; PRED: [[META7]] = distinct !{[[META7]], [[META5]]}308; PRED: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]}309; PRED: [[LOOP9]] = distinct !{[[LOOP9]], [[META1]]}310;.311