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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --filter-out-after "^scalar.ph:"2; RUN: opt -passes=loop-vectorize,dce,instcombine -force-target-instruction-cost=1 \3; RUN:   -prefer-predicate-over-epilogue=scalar-epilogue < %s -S | FileCheck %s4 5target triple = "aarch64-linux-gnu"6 7; Test a case where the vectorised induction variable is used to8; generate a mask:9;   for (long long i = 0; i < n; i++) {10;     if (i & 0x1)11;       a[i] = b[i];12;   }13 14define void @cond_ind64(ptr noalias nocapture %a, ptr noalias nocapture readonly %b, i64 %n) #0 {15; CHECK-LABEL: @cond_ind64(16; CHECK-NEXT:  entry:17; CHECK-NEXT:    [[TMP0:%.*]] = call i64 @llvm.vscale.i64()18; CHECK-NEXT:    [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 219; CHECK-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], [[TMP1]]20; CHECK-NEXT:    br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]21; CHECK:       vector.ph:22; CHECK-NEXT:    [[TMP2:%.*]] = call i64 @llvm.vscale.i64()23; CHECK-NEXT:    [[TMP3:%.*]] = shl nuw i64 [[TMP2]], 224; CHECK-NEXT:    [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP3]]25; CHECK-NEXT:    [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]26; CHECK-NEXT:    [[TMP6:%.*]] = call <vscale x 4 x i64> @llvm.stepvector.nxv4i64()27; CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i64> poison, i64 [[TMP3]], i64 028; CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i64> [[DOTSPLATINSERT]], <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer29; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]30; CHECK:       vector.body:31; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]32; CHECK-NEXT:    [[VEC_IND:%.*]] = phi <vscale x 4 x i64> [ [[TMP6]], [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]33; CHECK-NEXT:    [[TMP9:%.*]] = trunc <vscale x 4 x i64> [[VEC_IND]] to <vscale x 4 x i1>34; CHECK-NEXT:    [[TMP10:%.*]] = getelementptr i32, ptr [[B:%.*]], i64 [[INDEX]]35; CHECK-NEXT:    [[WIDE_MASKED_LOAD:%.*]] = call <vscale x 4 x i32> @llvm.masked.load.nxv4i32.p0(ptr align 4 [[TMP10]], <vscale x 4 x i1> [[TMP9]], <vscale x 4 x i32> poison)36; CHECK-NEXT:    [[TMP11:%.*]] = getelementptr i32, ptr [[A:%.*]], i64 [[INDEX]]37; CHECK-NEXT:    call void @llvm.masked.store.nxv4i32.p0(<vscale x 4 x i32> [[WIDE_MASKED_LOAD]], ptr align 4 [[TMP11]], <vscale x 4 x i1> [[TMP9]])38; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP3]]39; CHECK-NEXT:    [[VEC_IND_NEXT]] = add nuw nsw <vscale x 4 x i64> [[VEC_IND]], [[DOTSPLAT]]40; CHECK-NEXT:    [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]41; CHECK-NEXT:    br i1 [[TMP12]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]42; CHECK:       middle.block:43; CHECK-NEXT:    [[CMP_N:%.*]] = icmp eq i64 [[N_MOD_VF]], 044; CHECK-NEXT:    br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]45; CHECK:       scalar.ph:46;47entry:48  br label %for.body49 50for.body:                                         ; preds = %entry, %for.inc51  %i.08 = phi i64 [ %inc, %for.inc ], [ 0, %entry ]52  %and = and i64 %i.08, 153  %tobool.not = icmp eq i64 %and, 054  br i1 %tobool.not, label %for.inc, label %if.then55 56if.then:                                          ; preds = %for.body57  %arrayidx = getelementptr inbounds i32, ptr %b, i64 %i.0858  %0 = load i32, ptr %arrayidx, align 459  %arrayidx1 = getelementptr inbounds i32, ptr %a, i64 %i.0860  store i32 %0, ptr %arrayidx1, align 461  br label %for.inc62 63for.inc:                                          ; preds = %for.body, %if.then64  %inc = add nuw nsw i64 %i.08, 165  %exitcond.not = icmp eq i64 %inc, %n66  br i1 %exitcond.not, label %exit, label %for.body, !llvm.loop !067 68exit:                                 ; preds = %for.inc69  ret void70}71 72attributes #0 = { "target-features"="+sve" }73 74!0 = distinct !{!0, !1, !2, !3, !4, !5}75!1 = !{!"llvm.loop.mustprogress"}76!2 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}77!3 = !{!"llvm.loop.vectorize.enable", i1 true}78!4 = !{!"llvm.loop.vectorize.width", i32 4}79!5 = !{!"llvm.loop.interleave.count", i32 1}80