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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --filter-out-after "^scalar.ph:"2; RUN: opt -passes=loop-vectorize -S -prefer-predicate-over-epilogue=scalar-epilogue < %s | FileCheck %s3 4target triple = "aarch64-unknown-linux-gnu"5 6define void @inv_store_i16(ptr noalias %dst, ptr noalias readonly %src, i64 %N) #0 {7; CHECK-LABEL: @inv_store_i16(8; CHECK-NEXT: entry:9; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()10; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 211; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], [[TMP1]]12; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]13; CHECK: vector.ph:14; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()15; CHECK-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 416; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP3]]17; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]18; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]19; CHECK: vector.body:20; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]21; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i16, ptr [[SRC:%.*]], i64 [[INDEX]]22; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x i16>, ptr [[TMP7]], align 223; CHECK-NEXT: [[TMP9:%.*]] = call i32 @llvm.vscale.i32()24; CHECK-NEXT: [[TMP10:%.*]] = mul nuw i32 [[TMP9]], 425; CHECK-NEXT: [[TMP11:%.*]] = sub i32 [[TMP10]], 126; CHECK-NEXT: [[TMP12:%.*]] = extractelement <vscale x 4 x i16> [[WIDE_LOAD]], i32 [[TMP11]]27; CHECK-NEXT: store i16 [[TMP12]], ptr [[DST:%.*]], align 228; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP3]]29; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]30; CHECK-NEXT: br i1 [[TMP13]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]31; CHECK: middle.block:32; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]33; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_INC24:%.*]], label [[SCALAR_PH]]34; CHECK: scalar.ph:35;36entry:37 br label %for.body1438 39for.body14: ; preds = %for.body14, %entry40 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body14 ]41 %arrayidx = getelementptr inbounds i16, ptr %src, i64 %indvars.iv42 %ld = load i16, ptr %arrayidx43 store i16 %ld, ptr %dst, align 244 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 145 %exitcond.not = icmp eq i64 %indvars.iv.next, %N46 br i1 %exitcond.not, label %for.inc24, label %for.body14, !llvm.loop !047 48for.inc24: ; preds = %for.body14, %for.body49 ret void50}51 52 53define void @cond_inv_store_i32(ptr noalias %dst, ptr noalias readonly %src, i64 %N) #0 {54; CHECK-LABEL: @cond_inv_store_i32(55; CHECK-NEXT: entry:56; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()57; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 258; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], [[TMP1]]59; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]60; CHECK: vector.ph:61; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()62; CHECK-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 463; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP3]]64; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]65; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 4 x ptr> poison, ptr [[DST:%.*]], i64 066; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 4 x ptr> [[BROADCAST_SPLATINSERT]], <vscale x 4 x ptr> poison, <vscale x 4 x i32> zeroinitializer67; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]68; CHECK: vector.body:69; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]70; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[SRC:%.*]], i64 [[INDEX]]71; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x i32>, ptr [[TMP7]], align 472; CHECK-NEXT: [[TMP9:%.*]] = icmp sgt <vscale x 4 x i32> [[WIDE_LOAD]], zeroinitializer73; CHECK-NEXT: call void @llvm.masked.scatter.nxv4i32.nxv4p0(<vscale x 4 x i32> [[WIDE_LOAD]], <vscale x 4 x ptr> align 4 [[BROADCAST_SPLAT]], <vscale x 4 x i1> [[TMP9]])74; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP3]]75; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]76; CHECK-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]77; CHECK: middle.block:78; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]79; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]80; CHECK: scalar.ph:81;82entry:83 br label %for.body84 85for.body: ; preds = %entry, %for.inc86 %i.09 = phi i64 [ %inc, %for.inc ], [ 0, %entry ]87 %arrayidx = getelementptr inbounds i32, ptr %src, i64 %i.0988 %0 = load i32, ptr %arrayidx, align 489 %cmp1 = icmp sgt i32 %0, 090 br i1 %cmp1, label %if.then, label %for.inc91 92if.then: ; preds = %for.body93 store i32 %0, ptr %dst, align 494 br label %for.inc95 96for.inc: ; preds = %for.body, %if.then97 %inc = add nuw nsw i64 %i.09, 198 %exitcond.not = icmp eq i64 %inc, %N99 br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0100 101for.end: ; preds = %for.inc, %entry102 ret void103}104 105attributes #0 = { "target-features"="+neon,+sve" vscale_range(1, 16) }106 107!0 = distinct !{!0, !1, !2, !3, !4, !5}108!1 = !{!"llvm.loop.mustprogress"}109!2 = !{!"llvm.loop.vectorize.width", i32 4}110!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}111!4 = !{!"llvm.loop.vectorize.enable", i1 true}112!5 = !{!"llvm.loop.interleave.count", i32 1}113