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1; REQUIRES: asserts2; RUN: opt -S -passes=loop-vectorize -prefer-predicate-over-epilogue=predicate-else-scalar-epilogue \3; RUN: -debug-only=loop-vectorize < %s 2>%t | FileCheck %s4; RUN: cat %t | FileCheck --check-prefix=COST %s5 6target triple = "aarch64-unknown-linux-gnu"7 8; The uniform load of %d in the following loop triggers the special9; branch costing code in LoopVectorizationCostModel::getInstructionCost.10; However, this should only affect the fixed-width cost because for11; NEON it needs to scalarize the load, whereas for SVE it can use a predicated load.12; Because of how the LoopVectorizer annotates the load to need scalarization with13; predicated blocks, this leads to different costs for the branch instruction.14;15; NOTE: This test assumes we will never use a fixed-width VF due to16; the high cost of scalarizing the masked store, however this assumption may17; break in future if we permit the use of SVE loads and stores to perform the18; fixed-width operations.19define i32 @uniform_load(i64 %n, ptr readnone %c, ptr %d) #0 {20; CHECK-LABEL: @uniform_load(21; CHECK: call void @llvm.masked.store.nxv4f32.p0(<vscale x 4 x float>22entry:23 br label %for.body24 25for.body: ; preds = %entry, %for.body26 %indvars.iv = phi i64 [ 1, %entry ], [ %indvars.iv.next, %for.body ]27 %load2 = load float, ptr %d, align 428 %arrayidx2 = getelementptr inbounds float, ptr %c, i64 %indvars.iv29 store float %load2, ptr %arrayidx2, align 430 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 131 %exitcond.not = icmp eq i64 %indvars.iv.next, %n32 br i1 %exitcond.not, label %for.end, label %for.body33 34for.end: ; preds = %for.body35 ret i32 036}37 38; COST: LV: Checking a loop in 'simple_memset'39; COST: Cost of 4 for VF 2: EMIT{{.*}}active lane mask40; COST: Cost of 8 for VF 4: EMIT{{.*}}active lane mask41; COST: Cost of Invalid for VF vscale x 1: EMIT{{.*}}active lane mask42; COST: Cost of 1 for VF vscale x 2: EMIT{{.*}}active lane mask43; COST: Cost of 1 for VF vscale x 4: EMIT{{.*}}active lane mask44 45define void @simple_memset(i32 %val, ptr %ptr, i64 %n) #0 {46; CHECK-LABEL: @simple_memset(47; CHECK: call void @llvm.masked.store.nxv4i32.p0(<vscale x 4 x i32>48entry:49 br label %while.body50 51while.body: ; preds = %while.body, %entry52 %index = phi i64 [ %index.next, %while.body ], [ 0, %entry ]53 %gep = getelementptr i32, ptr %ptr, i64 %index54 store i32 %val, ptr %gep55 %index.next = add nsw i64 %index, 156 %cmp10 = icmp ult i64 %index.next, %n57 br i1 %cmp10, label %while.body, label %while.end.loopexit58 59while.end.loopexit: ; preds = %while.body60 ret void61}62 63attributes #0 = { vscale_range(1,16) "target-features"="+sve" }64